commit bbb5fa7e3808221c5580b4d410f8b5c17f095f04
author Mohit Bhakkad <mohit.bhakkad@imgtec.com> Wed Jun 29 06:51:08 2016 -0700
committer Jim Stichnoth <stichnot@chromium.org> Wed Jun 29 06:51:08 2016 -0700
tree 9b290bb5f1e6674a989bd9ff92b3c5b3f53d34c0
parent eeb9220b781cb8e17766b900a3e7575a4fe4c41a

Subzero: Fix Calling Convention for MIPS O32 abi

We should take care of alignment while discarding GPR registers, I have written larger explanation in a comment.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2101093003 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

src/IceTargetLoweringMIPS32.h

diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index 7fe3863..96f0554 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -496,6 +496,7 @@
     /// types.
     bool argInVFP(Type Ty, RegNumT *Reg);
     inline void discardNextGPRAndItsAliases(CfgVector<RegNumT> *Regs);
+    inline void alignGPR(CfgVector<RegNumT> *Regs);
     void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs);
     SmallBitVector GPRegsUsed;
     CfgVector<RegNumT> GPRArgs;