commit b9f272299f3ef78a3657ffcb2cb727116a17435e
author Karl Schimpf <kschimpf@google.com> Mon Nov 09 12:09:58 2015 -0800
committer Karl Schimpf <kschimpf@google.com> Mon Nov 09 12:09:58 2015 -0800
tree 62177648f09aaa4804be84f540a9d50806c8bb18
parent c59288b334b91f4c0b2edf0de7415c68c760aa12

Fixes LDR and STR instructions. Two types of mistakes were being made.

First, the width was not being correctly defined for non-vector
instructions.

Second, the order of the width/condition was incorrect when the
instruction was prefixed with a V. That is, for V prefixed instructions,
the order is predicate/width while for non-V prefixed instructions the
order is width/predicate.

Also fixes bug in target lowering that did not always convert results
of a compare to i1.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1415953007 .

src/IceTargetLoweringARM32.cpp

diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 31ef0c0..d2aa74e 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -2506,7 +2506,7 @@
     return;
   }
 
-  Variable *T = makeReg(IceType_i32);
+  Variable *T = makeReg(IceType_i1);
   Operand *_1 = Ctx->getConstantInt32(1);
   Operand *_0 = Ctx->getConstantZero(IceType_i32);
 
@@ -2672,7 +2672,7 @@
 
   Constant *_0 = Ctx->getConstantZero(IceType_i32);
   Constant *_1 = Ctx->getConstantInt32(1);
-  Variable *T = makeReg(IceType_i32);
+  Variable *T = makeReg(IceType_i1);
 
   CondARM32::Cond CondIfTrue, CondIfFalse;
   lowerIcmpCond(Inst, &CondIfTrue, &CondIfFalse);