Handle ARM "ret void" and function alignment with proper padding.

Modify run-pnacl-sz to pass in the correct assembler/disasembler flags
for ARM when not using the integrated assembler.

Model the "ret" pseudo instruction (special form of
"bx" inst). Separate from "bx" to allow epilogue
insertion to find the terminator.

Add a flag "--skip-unimplemented" to skip through all of the
"Not yet implemented" assertions, and use that in the test.

Set up a stack trace printer when ALLOW_DUMP so that the
UnimplementedError prints out some useful information of
*which* case is unimplemented.

Change the .type ...,@function from @function to %function.
ARM assembler seems to only like %function because
"@" is a comment character.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1136793002

tests_lit/llvm2ice_tests/function_aligned.ll

diff --git a/tests_lit/llvm2ice_tests/function_aligned.ll b/tests_lit/llvm2ice_tests/function_aligned.ll
index 02b460b..2b3da9a 100644
--- a/tests_lit/llvm2ice_tests/function_aligned.ll
+++ b/tests_lit/llvm2ice_tests/function_aligned.ll
@@ -4,6 +4,12 @@
 ; Also, we are currently using hlts for non-executable padding.
 
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
+; once enough infrastructure is in. Also, switch to --filetype=obj
+; when possible.
+; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
+; RUN:   | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s
 
 define void @foo() {
   ret void
@@ -11,9 +17,16 @@
 ; CHECK-LABEL: foo
 ; CHECK-NEXT: 0: {{.*}} ret
 ; CHECK-NEXT: 1: {{.*}} hlt
+; ARM32-LABEL: foo
+; ARM32-NEXT: 0: {{.*}} bx lr
+; ARM32-NEXT: 4: e7fedef0 udf
+; ARM32-NEXT: 8: e7fedef0 udf
+; ARM32-NEXT: c: e7fedef0 udf
 
 define void @bar() {
   ret void
 }
 ; CHECK-LABEL: bar
 ; CHECK-NEXT: 20: {{.*}} ret
+; ARM32-LABEL: bar
+; ARM32-NEXT: 10: {{.*}} bx lr