Rename AssemblerX86 to AssemblerX8632 so it works with SZTargets.def.
This is to conditionally (ifdef) include only the enabled
target assemblers. Also rename the assembler's "x86"
namespace to "X8632" for similar reasons. The namespace was
created to hide generic sounding classes like "Address"
which are used all over the assembler.
Plop the somewhat empty AssemblerARM32 in an ARM32
namespace for consistency.
BUG=none
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/1114223002
diff --git a/src/IceInstX8632.cpp b/src/IceInstX8632.cpp
index 2fbb370..fc31921 100644
--- a/src/IceInstX8632.cpp
+++ b/src/IceInstX8632.cpp
@@ -371,7 +371,7 @@
}
void InstX8632Label::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->BindLocalLabel(Number);
}
@@ -409,9 +409,9 @@
}
void InstX8632Br::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
if (Label) {
- x86::Label *L = Asm->GetOrCreateLocalLabel(Label->getNumber());
+ X8632::Label *L = Asm->GetOrCreateLocalLabel(Label->getNumber());
// In all these cases, local Labels should only be used for Near.
const bool Near = true;
if (Condition == CondX86::Br_None) {
@@ -424,15 +424,16 @@
// are not Bound.
const bool Near = false;
if (Condition == CondX86::Br_None) {
- x86::Label *L =
+ X8632::Label *L =
Asm->GetOrCreateCfgNodeLabel(getTargetFalse()->getIndex());
assert(!getTargetTrue());
Asm->jmp(L, Near);
} else {
- x86::Label *L = Asm->GetOrCreateCfgNodeLabel(getTargetTrue()->getIndex());
+ X8632::Label *L =
+ Asm->GetOrCreateCfgNodeLabel(getTargetTrue()->getIndex());
Asm->j(Condition, L, Near);
if (getTargetFalse()) {
- x86::Label *L2 =
+ X8632::Label *L2 =
Asm->GetOrCreateCfgNodeLabel(getTargetFalse()->getIndex());
Asm->jmp(L2, Near);
}
@@ -474,7 +475,7 @@
void InstX8632Jmp::emitIAS(const Cfg *Func) const {
// Note: Adapted (mostly copied) from InstX8632Call::emitIAS().
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Operand *Target = getJmpTarget();
if (const auto Var = llvm::dyn_cast<Variable>(Target)) {
if (Var->hasReg()) {
@@ -532,7 +533,7 @@
}
void InstX8632Call::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Operand *Target = getCallTarget();
if (const auto Var = llvm::dyn_cast<Variable>(Target)) {
if (Var->hasReg()) {
@@ -548,7 +549,7 @@
assert(CR->getOffset() == 0 && "We only support calling a function");
Asm->call(CR);
} else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Target)) {
- Asm->call(x86::Immediate(Imm->getValue()));
+ Asm->call(X8632::Immediate(Imm->getValue()));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -591,8 +592,8 @@
}
void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
- const x86::AssemblerX86::GPREmitterOneOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::GPREmitterOneOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
if (const auto Var = llvm::dyn_cast<Variable>(Op)) {
if (Var->hasReg()) {
// We cheat a little and use GPRRegister even for byte operations.
@@ -600,8 +601,8 @@
RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
(Asm->*(Emitter.Reg))(Ty, VarReg);
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Var));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Var));
(Asm->*(Emitter.Addr))(Ty, StackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Op)) {
@@ -615,8 +616,8 @@
template <bool VarCanBeByte, bool SrcCanBeByte>
void emitIASRegOpTyGPR(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::GPREmitterRegOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::GPREmitterRegOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(Var->hasReg());
// We cheat a little and use GPRRegister even for byte operations.
RegX8632::GPRRegister VarReg =
@@ -630,19 +631,20 @@
: RegX8632::getEncodedGPR(SrcVar->getRegNum());
(Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr =
+ static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
(Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
Mem->emitSegmentOverride(Asm);
(Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
} else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
- (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
+ (Asm->*(Emitter.GPRImm))(Ty, VarReg, X8632::Immediate(Imm->getValue()));
} else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc);
(Asm->*(Emitter.GPRImm))(Ty, VarReg,
- x86::Immediate(Reloc->getOffset(), Fixup));
+ X8632::Immediate(Reloc->getOffset(), Fixup));
} else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) {
(Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func));
} else {
@@ -650,10 +652,10 @@
}
}
-void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr,
- const Operand *Src,
- const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+void emitIASAddrOpTyGPR(
+ const Cfg *Func, Type Ty, const X8632::Address &Addr, const Operand *Src,
+ const X8632::AssemblerX8632::GPREmitterAddrOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
// Src can only be Reg or Immediate.
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
assert(SrcVar->hasReg());
@@ -661,26 +663,26 @@
RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
(Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
} else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
- (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue()));
+ (Asm->*(Emitter.AddrImm))(Ty, Addr, X8632::Immediate(Imm->getValue()));
} else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc);
(Asm->*(Emitter.AddrImm))(Ty, Addr,
- x86::Immediate(Reloc->getOffset(), Fixup));
+ X8632::Immediate(Reloc->getOffset(), Fixup));
} else {
llvm_unreachable("Unexpected operand type");
}
}
-void emitIASAsAddrOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op0,
- const Operand *Op1,
- const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
+void emitIASAsAddrOpTyGPR(
+ const Cfg *Func, Type Ty, const Operand *Op0, const Operand *Op1,
+ const X8632::AssemblerX8632::GPREmitterAddrOp &Emitter) {
if (const auto Op0Var = llvm::dyn_cast<Variable>(Op0)) {
assert(!Op0Var->hasReg());
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Op0Var));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Op0Var));
emitIASAddrOpTyGPR(Func, Ty, StackAddr, Op1, Emitter);
} else if (const auto Op0Mem = llvm::dyn_cast<OperandX8632Mem>(Op0)) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Op0Mem->emitSegmentOverride(Asm);
emitIASAddrOpTyGPR(Func, Ty, Op0Mem->toAsmAddress(Asm), Op1, Emitter);
} else if (const auto Split = llvm::dyn_cast<VariableSplit>(Op0)) {
@@ -692,8 +694,8 @@
void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::GPREmitterShiftOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::GPREmitterShiftOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
// Technically, the Dest Var can be mem as well, but we only use Reg.
// We can extend this to check Dest if we decide to use that form.
assert(Var->hasReg());
@@ -708,16 +710,17 @@
RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
(Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
} else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
- (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
+ (Asm->*(Emitter.GPRImm))(Ty, VarReg, X8632::Immediate(Imm->getValue()));
} else {
llvm_unreachable("Unexpected operand type");
}
}
-void emitIASGPRShiftDouble(const Cfg *Func, const Variable *Dest,
- const Operand *Src1Op, const Operand *Src2Op,
- const x86::AssemblerX86::GPREmitterShiftD &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+void emitIASGPRShiftDouble(
+ const Cfg *Func, const Variable *Dest, const Operand *Src1Op,
+ const Operand *Src2Op,
+ const X8632::AssemblerX8632::GPREmitterShiftD &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
// Dest can be reg or mem, but we only use the reg variant.
assert(Dest->hasReg());
RegX8632::GPRRegister DestReg = RegX8632::getEncodedGPR(Dest->getRegNum());
@@ -729,7 +732,7 @@
// Src2 can be the implicit CL register or an immediate.
if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src2Op)) {
(Asm->*(Emitter.GPRGPRImm))(Ty, DestReg, SrcReg,
- x86::Immediate(Imm->getValue()));
+ X8632::Immediate(Imm->getValue()));
} else {
assert(llvm::cast<Variable>(Src2Op)->getRegNum() == RegX8632::Reg_ecx);
(Asm->*(Emitter.GPRGPR))(Ty, DestReg, SrcReg);
@@ -738,8 +741,8 @@
void emitIASXmmShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::XmmEmitterShiftOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::XmmEmitterShiftOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(Var->hasReg());
RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
@@ -748,15 +751,16 @@
RegX8632::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr =
+ static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
} else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
- (Asm->*(Emitter.XmmImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
+ (Asm->*(Emitter.XmmImm))(Ty, VarReg, X8632::Immediate(Imm->getValue()));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -764,8 +768,8 @@
void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::XmmEmitterRegOp &Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(Var->hasReg());
RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
@@ -774,15 +778,17 @@
RegX8632::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr =
+ static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
} else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
- (Asm->*(Emitter.XmmAddr))(Ty, VarReg, x86::Address::ofConstPool(Asm, Imm));
+ (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
+ X8632::Address::ofConstPool(Asm, Imm));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -792,8 +798,8 @@
SReg_t (*srcEnc)(int32_t)>
void emitIASCastRegOp(
const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src,
- const x86::AssemblerX86::CastEmitterRegOp<DReg_t, SReg_t> Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::CastEmitterRegOp<DReg_t, SReg_t> Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(Dest->hasReg());
DReg_t DestReg = destEnc(Dest->getRegNum());
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
@@ -801,8 +807,9 @@
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegReg))(DispatchTy, DestReg, SrcReg);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr =
+ static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
(Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, SrcStackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
@@ -818,19 +825,20 @@
void emitIASThreeOpImmOps(
const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src0,
const Operand *Src1,
- const x86::AssemblerX86::ThreeOpImmEmitter<DReg_t, SReg_t> Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::ThreeOpImmEmitter<DReg_t, SReg_t> Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
// This only handles Dest being a register, and Src1 being an immediate.
assert(Dest->hasReg());
DReg_t DestReg = destEnc(Dest->getRegNum());
- x86::Immediate Imm(llvm::cast<ConstantInteger32>(Src1)->getValue());
+ X8632::Immediate Imm(llvm::cast<ConstantInteger32>(Src1)->getValue());
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src0)) {
if (SrcVar->hasReg()) {
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegRegImm))(DispatchTy, DestReg, SrcReg, Imm);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr =
+ static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
(Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, SrcStackAddr, Imm);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src0)) {
@@ -844,8 +852,8 @@
void emitIASMovlikeXMM(const Cfg *Func, const Variable *Dest,
const Operand *Src,
- const x86::AssemblerX86::XmmEmitterMovOps Emitter) {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ const X8632::AssemblerX8632::XmmEmitterMovOps Emitter) {
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
if (Dest->hasReg()) {
RegX8632::XmmRegister DestReg = RegX8632::getEncodedXmm(Dest->getRegNum());
if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
@@ -853,8 +861,8 @@
(Asm->*(Emitter.XmmXmm))(DestReg,
RegX8632::getEncodedXmm(SrcVar->getRegNum()));
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar));
(Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
}
} else if (const auto SrcMem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
@@ -864,8 +872,8 @@
llvm_unreachable("Unexpected operand type");
}
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Dest));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Dest));
// Src must be a register in this case.
const auto SrcVar = llvm::cast<Variable>(Src);
assert(SrcVar->hasReg());
@@ -955,142 +963,149 @@
// Inplace GPR ops
template <>
-const x86::AssemblerX86::GPREmitterOneOp InstX8632Bswap::Emitter = {
- &x86::AssemblerX86::bswap, nullptr /* only a reg form exists */
+const X8632::AssemblerX8632::GPREmitterOneOp InstX8632Bswap::Emitter = {
+ &X8632::AssemblerX8632::bswap, nullptr /* only a reg form exists */
};
template <>
-const x86::AssemblerX86::GPREmitterOneOp InstX8632Neg::Emitter = {
- &x86::AssemblerX86::neg, &x86::AssemblerX86::neg};
+const X8632::AssemblerX8632::GPREmitterOneOp InstX8632Neg::Emitter = {
+ &X8632::AssemblerX8632::neg, &X8632::AssemblerX8632::neg};
// Unary GPR ops
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Bsf::Emitter = {
- &x86::AssemblerX86::bsf, &x86::AssemblerX86::bsf, nullptr};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Bsf::Emitter = {
+ &X8632::AssemblerX8632::bsf, &X8632::AssemblerX8632::bsf, nullptr};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Bsr::Emitter = {
- &x86::AssemblerX86::bsr, &x86::AssemblerX86::bsr, nullptr};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Bsr::Emitter = {
+ &X8632::AssemblerX8632::bsr, &X8632::AssemblerX8632::bsr, nullptr};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Lea::Emitter = {
- /* reg/reg and reg/imm are illegal */ nullptr, &x86::AssemblerX86::lea,
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Lea::Emitter = {
+ /* reg/reg and reg/imm are illegal */ nullptr, &X8632::AssemblerX8632::lea,
nullptr};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Movsx::Emitter = {
- &x86::AssemblerX86::movsx, &x86::AssemblerX86::movsx, nullptr};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Movsx::Emitter = {
+ &X8632::AssemblerX8632::movsx, &X8632::AssemblerX8632::movsx, nullptr};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Movzx::Emitter = {
- &x86::AssemblerX86::movzx, &x86::AssemblerX86::movzx, nullptr};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Movzx::Emitter = {
+ &X8632::AssemblerX8632::movzx, &X8632::AssemblerX8632::movzx, nullptr};
// Unary XMM ops
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Sqrtss::Emitter = {
- &x86::AssemblerX86::sqrtss, &x86::AssemblerX86::sqrtss};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Sqrtss::Emitter = {
+ &X8632::AssemblerX8632::sqrtss, &X8632::AssemblerX8632::sqrtss};
// Binary GPR ops
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Add::Emitter = {
- &x86::AssemblerX86::add, &x86::AssemblerX86::add, &x86::AssemblerX86::add};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Add::Emitter = {
+ &X8632::AssemblerX8632::add, &X8632::AssemblerX8632::add,
+ &X8632::AssemblerX8632::add};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Adc::Emitter = {
- &x86::AssemblerX86::adc, &x86::AssemblerX86::adc, &x86::AssemblerX86::adc};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Adc::Emitter = {
+ &X8632::AssemblerX8632::adc, &X8632::AssemblerX8632::adc,
+ &X8632::AssemblerX8632::adc};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632And::Emitter = {
- &x86::AssemblerX86::And, &x86::AssemblerX86::And, &x86::AssemblerX86::And};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632And::Emitter = {
+ &X8632::AssemblerX8632::And, &X8632::AssemblerX8632::And,
+ &X8632::AssemblerX8632::And};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Or::Emitter = {
- &x86::AssemblerX86::Or, &x86::AssemblerX86::Or, &x86::AssemblerX86::Or};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Or::Emitter = {
+ &X8632::AssemblerX8632::Or, &X8632::AssemblerX8632::Or,
+ &X8632::AssemblerX8632::Or};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Sbb::Emitter = {
- &x86::AssemblerX86::sbb, &x86::AssemblerX86::sbb, &x86::AssemblerX86::sbb};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Sbb::Emitter = {
+ &X8632::AssemblerX8632::sbb, &X8632::AssemblerX8632::sbb,
+ &X8632::AssemblerX8632::sbb};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Sub::Emitter = {
- &x86::AssemblerX86::sub, &x86::AssemblerX86::sub, &x86::AssemblerX86::sub};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Sub::Emitter = {
+ &X8632::AssemblerX8632::sub, &X8632::AssemblerX8632::sub,
+ &X8632::AssemblerX8632::sub};
template <>
-const x86::AssemblerX86::GPREmitterRegOp InstX8632Xor::Emitter = {
- &x86::AssemblerX86::Xor, &x86::AssemblerX86::Xor, &x86::AssemblerX86::Xor};
+const X8632::AssemblerX8632::GPREmitterRegOp InstX8632Xor::Emitter = {
+ &X8632::AssemblerX8632::Xor, &X8632::AssemblerX8632::Xor,
+ &X8632::AssemblerX8632::Xor};
// Binary Shift GPR ops
template <>
-const x86::AssemblerX86::GPREmitterShiftOp InstX8632Rol::Emitter = {
- &x86::AssemblerX86::rol, &x86::AssemblerX86::rol};
+const X8632::AssemblerX8632::GPREmitterShiftOp InstX8632Rol::Emitter = {
+ &X8632::AssemblerX8632::rol, &X8632::AssemblerX8632::rol};
template <>
-const x86::AssemblerX86::GPREmitterShiftOp InstX8632Sar::Emitter = {
- &x86::AssemblerX86::sar, &x86::AssemblerX86::sar};
+const X8632::AssemblerX8632::GPREmitterShiftOp InstX8632Sar::Emitter = {
+ &X8632::AssemblerX8632::sar, &X8632::AssemblerX8632::sar};
template <>
-const x86::AssemblerX86::GPREmitterShiftOp InstX8632Shl::Emitter = {
- &x86::AssemblerX86::shl, &x86::AssemblerX86::shl};
+const X8632::AssemblerX8632::GPREmitterShiftOp InstX8632Shl::Emitter = {
+ &X8632::AssemblerX8632::shl, &X8632::AssemblerX8632::shl};
template <>
-const x86::AssemblerX86::GPREmitterShiftOp InstX8632Shr::Emitter = {
- &x86::AssemblerX86::shr, &x86::AssemblerX86::shr};
+const X8632::AssemblerX8632::GPREmitterShiftOp InstX8632Shr::Emitter = {
+ &X8632::AssemblerX8632::shr, &X8632::AssemblerX8632::shr};
// Binary XMM ops
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Addss::Emitter = {
- &x86::AssemblerX86::addss, &x86::AssemblerX86::addss};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Addss::Emitter = {
+ &X8632::AssemblerX8632::addss, &X8632::AssemblerX8632::addss};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Addps::Emitter = {
- &x86::AssemblerX86::addps, &x86::AssemblerX86::addps};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Addps::Emitter = {
+ &X8632::AssemblerX8632::addps, &X8632::AssemblerX8632::addps};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Divss::Emitter = {
- &x86::AssemblerX86::divss, &x86::AssemblerX86::divss};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Divss::Emitter = {
+ &X8632::AssemblerX8632::divss, &X8632::AssemblerX8632::divss};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Divps::Emitter = {
- &x86::AssemblerX86::divps, &x86::AssemblerX86::divps};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Divps::Emitter = {
+ &X8632::AssemblerX8632::divps, &X8632::AssemblerX8632::divps};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Mulss::Emitter = {
- &x86::AssemblerX86::mulss, &x86::AssemblerX86::mulss};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Mulss::Emitter = {
+ &X8632::AssemblerX8632::mulss, &X8632::AssemblerX8632::mulss};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Mulps::Emitter = {
- &x86::AssemblerX86::mulps, &x86::AssemblerX86::mulps};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Mulps::Emitter = {
+ &X8632::AssemblerX8632::mulps, &X8632::AssemblerX8632::mulps};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Padd::Emitter = {
- &x86::AssemblerX86::padd, &x86::AssemblerX86::padd};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Padd::Emitter = {
+ &X8632::AssemblerX8632::padd, &X8632::AssemblerX8632::padd};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pand::Emitter = {
- &x86::AssemblerX86::pand, &x86::AssemblerX86::pand};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pand::Emitter = {
+ &X8632::AssemblerX8632::pand, &X8632::AssemblerX8632::pand};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pandn::Emitter = {
- &x86::AssemblerX86::pandn, &x86::AssemblerX86::pandn};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pandn::Emitter = {
+ &X8632::AssemblerX8632::pandn, &X8632::AssemblerX8632::pandn};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pcmpeq::Emitter = {
- &x86::AssemblerX86::pcmpeq, &x86::AssemblerX86::pcmpeq};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pcmpeq::Emitter = {
+ &X8632::AssemblerX8632::pcmpeq, &X8632::AssemblerX8632::pcmpeq};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pcmpgt::Emitter = {
- &x86::AssemblerX86::pcmpgt, &x86::AssemblerX86::pcmpgt};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pcmpgt::Emitter = {
+ &X8632::AssemblerX8632::pcmpgt, &X8632::AssemblerX8632::pcmpgt};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pmull::Emitter = {
- &x86::AssemblerX86::pmull, &x86::AssemblerX86::pmull};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pmull::Emitter = {
+ &X8632::AssemblerX8632::pmull, &X8632::AssemblerX8632::pmull};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pmuludq::Emitter = {
- &x86::AssemblerX86::pmuludq, &x86::AssemblerX86::pmuludq};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pmuludq::Emitter = {
+ &X8632::AssemblerX8632::pmuludq, &X8632::AssemblerX8632::pmuludq};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Por::Emitter = {
- &x86::AssemblerX86::por, &x86::AssemblerX86::por};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Por::Emitter = {
+ &X8632::AssemblerX8632::por, &X8632::AssemblerX8632::por};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Psub::Emitter = {
- &x86::AssemblerX86::psub, &x86::AssemblerX86::psub};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Psub::Emitter = {
+ &X8632::AssemblerX8632::psub, &X8632::AssemblerX8632::psub};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pxor::Emitter = {
- &x86::AssemblerX86::pxor, &x86::AssemblerX86::pxor};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Pxor::Emitter = {
+ &X8632::AssemblerX8632::pxor, &X8632::AssemblerX8632::pxor};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Subss::Emitter = {
- &x86::AssemblerX86::subss, &x86::AssemblerX86::subss};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Subss::Emitter = {
+ &X8632::AssemblerX8632::subss, &X8632::AssemblerX8632::subss};
template <>
-const x86::AssemblerX86::XmmEmitterRegOp InstX8632Subps::Emitter = {
- &x86::AssemblerX86::subps, &x86::AssemblerX86::subps};
+const X8632::AssemblerX8632::XmmEmitterRegOp InstX8632Subps::Emitter = {
+ &X8632::AssemblerX8632::subps, &X8632::AssemblerX8632::subps};
// Binary XMM Shift ops
template <>
-const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psll::Emitter = {
- &x86::AssemblerX86::psll, &x86::AssemblerX86::psll,
- &x86::AssemblerX86::psll};
+const X8632::AssemblerX8632::XmmEmitterShiftOp InstX8632Psll::Emitter = {
+ &X8632::AssemblerX8632::psll, &X8632::AssemblerX8632::psll,
+ &X8632::AssemblerX8632::psll};
template <>
-const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psra::Emitter = {
- &x86::AssemblerX86::psra, &x86::AssemblerX86::psra,
- &x86::AssemblerX86::psra};
+const X8632::AssemblerX8632::XmmEmitterShiftOp InstX8632Psra::Emitter = {
+ &X8632::AssemblerX8632::psra, &X8632::AssemblerX8632::psra,
+ &X8632::AssemblerX8632::psra};
template <>
-const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psrl::Emitter = {
- &x86::AssemblerX86::psrl, &x86::AssemblerX86::psrl,
- &x86::AssemblerX86::psrl};
+const X8632::AssemblerX8632::XmmEmitterShiftOp InstX8632Psrl::Emitter = {
+ &X8632::AssemblerX8632::psrl, &X8632::AssemblerX8632::psrl,
+ &X8632::AssemblerX8632::psrl};
template <> void InstX8632Sqrtss::emit(const Cfg *Func) const {
if (!ALLOW_DUMP)
@@ -1216,8 +1231,8 @@
assert(getSrcSize() == 3);
const Operand *Src = getSrc(1);
Type Ty = Src->getType();
- const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
- &x86::AssemblerX86::div, &x86::AssemblerX86::div};
+ const static X8632::AssemblerX8632::GPREmitterOneOp Emitter = {
+ &X8632::AssemblerX8632::div, &X8632::AssemblerX8632::div};
emitIASOpTyGPR(Func, Ty, Src, Emitter);
}
@@ -1235,8 +1250,8 @@
assert(getSrcSize() == 3);
const Operand *Src = getSrc(1);
Type Ty = Src->getType();
- const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
- &x86::AssemblerX86::idiv, &x86::AssemblerX86::idiv};
+ const static X8632::AssemblerX8632::GPREmitterOneOp Emitter = {
+ &X8632::AssemblerX8632::idiv, &X8632::AssemblerX8632::idiv};
emitIASOpTyGPR(Func, Ty, Src, Emitter);
}
@@ -1259,7 +1274,7 @@
void emitIASVariableBlendInst(
const Inst *Inst, const Cfg *Func,
- const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
+ const X8632::AssemblerX8632::XmmEmitterRegOp &Emitter) {
assert(Inst->getSrcSize() == 3);
assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
RegX8632::Reg_xmm0);
@@ -1281,8 +1296,8 @@
template <> void InstX8632Blendvps::emitIAS(const Cfg *Func) const {
assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
TargetX8632::SSE4_1);
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::blendvps, &x86::AssemblerX86::blendvps};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::blendvps, &X8632::AssemblerX8632::blendvps};
emitIASVariableBlendInst(this, Func, Emitter);
}
@@ -1297,8 +1312,8 @@
template <> void InstX8632Pblendvb::emitIAS(const Cfg *Func) const {
assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
TargetX8632::SSE4_1);
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::pblendvb, &x86::AssemblerX86::pblendvb};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::pblendvb, &X8632::AssemblerX8632::pblendvb};
emitIASVariableBlendInst(this, Func, Emitter);
}
@@ -1337,16 +1352,16 @@
const auto Src0Var = llvm::dyn_cast<Variable>(getSrc(0));
(void)Src0Var;
assert(Src0Var && Src0Var->getRegNum() == RegX8632::Reg_eax);
- const x86::AssemblerX86::GPREmitterOneOp Emitter = {
- &x86::AssemblerX86::imul, &x86::AssemblerX86::imul};
+ const X8632::AssemblerX8632::GPREmitterOneOp Emitter = {
+ &X8632::AssemblerX8632::imul, &X8632::AssemblerX8632::imul};
emitIASOpTyGPR(Func, Ty, getSrc(1), Emitter);
} else {
// We only use imul as a two-address instruction even though
// there is a 3 operand version when one of the operands is a constant.
assert(Var == getSrc(0));
- const x86::AssemblerX86::GPREmitterRegOp Emitter = {
- &x86::AssemblerX86::imul, &x86::AssemblerX86::imul,
- &x86::AssemblerX86::imul};
+ const X8632::AssemblerX8632::GPREmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::imul, &X8632::AssemblerX8632::imul,
+ &X8632::AssemblerX8632::imul};
emitIASRegOpTyGPR(Func, Ty, Var, Src, Emitter);
}
}
@@ -1358,9 +1373,9 @@
const Variable *Dest = getDest();
assert(Dest == getSrc(0));
Type Ty = Dest->getType();
- static const x86::AssemblerX86::ThreeOpImmEmitter<
+ static const X8632::AssemblerX8632::ThreeOpImmEmitter<
RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
- &x86::AssemblerX86::insertps, &x86::AssemblerX86::insertps};
+ &X8632::AssemblerX8632::insertps, &X8632::AssemblerX8632::insertps};
emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
@@ -1394,7 +1409,7 @@
}
template <> void InstX8632Cbwdq::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 1);
Operand *Src0 = getSrc(0);
assert(llvm::isa<Variable>(Src0));
@@ -1437,8 +1452,8 @@
assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
const Operand *Src = getSrc(1);
Type Ty = Src->getType();
- const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
- &x86::AssemblerX86::mul, &x86::AssemblerX86::mul};
+ const static X8632::AssemblerX8632::GPREmitterOneOp Emitter = {
+ &X8632::AssemblerX8632::mul, &X8632::AssemblerX8632::mul};
emitIASOpTyGPR(Func, Ty, Src, Emitter);
}
@@ -1478,8 +1493,8 @@
const Variable *Dest = getDest();
const Operand *Src1 = getSrc(1);
const Operand *Src2 = getSrc(2);
- static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
- &x86::AssemblerX86::shld, &x86::AssemblerX86::shld};
+ static const X8632::AssemblerX8632::GPREmitterShiftD Emitter = {
+ &X8632::AssemblerX8632::shld, &X8632::AssemblerX8632::shld};
emitIASGPRShiftDouble(Func, Dest, Src1, Src2, Emitter);
}
@@ -1519,8 +1534,8 @@
const Variable *Dest = getDest();
const Operand *Src1 = getSrc(1);
const Operand *Src2 = getSrc(2);
- static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
- &x86::AssemblerX86::shrd, &x86::AssemblerX86::shrd};
+ static const X8632::AssemblerX8632::GPREmitterShiftD Emitter = {
+ &X8632::AssemblerX8632::shrd, &X8632::AssemblerX8632::shrd};
emitIASGPRShiftDouble(Func, Dest, Src1, Src2, Emitter);
}
@@ -1556,7 +1571,7 @@
const auto SrcVar = llvm::cast<Variable>(getSrc(1));
assert(SrcVar->hasReg());
assert(SrcVar->getType() == IceType_i32);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->cmov(Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()),
RegX8632::getEncodedGPR(SrcVar->getRegNum()));
}
@@ -1587,7 +1602,7 @@
}
void InstX8632Cmpps::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 2);
assert(Condition < CondX86::Cmpps_Invalid);
// Assuming there isn't any load folding for cmpps, and vector constants
@@ -1598,8 +1613,8 @@
Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()),
RegX8632::getEncodedXmm(SrcVar->getRegNum()), Condition);
} else {
- x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar);
+ X8632::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar);
Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()), SrcStackAddr,
Condition);
}
@@ -1632,11 +1647,11 @@
void InstX8632Cmpxchg::emitIAS(const Cfg *Func) const {
assert(getSrcSize() == 3);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Type Ty = getSrc(0)->getType();
const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
- const x86::Address Addr = Mem->toAsmAddress(Asm);
+ const X8632::Address Addr = Mem->toAsmAddress(Asm);
const auto VarReg = llvm::cast<Variable>(getSrc(2));
assert(VarReg->hasReg());
const RegX8632::GPRRegister Reg =
@@ -1669,10 +1684,10 @@
void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
assert(getSrcSize() == 5);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
- const x86::Address Addr = Mem->toAsmAddress(Asm);
+ const X8632::Address Addr = Mem->toAsmAddress(Asm);
Asm->cmpxchg8b(Addr, Locked);
}
@@ -1713,9 +1728,9 @@
assert(isScalarIntegerType(SrcTy));
assert(typeWidthInBytes(SrcTy) <= 4);
assert(isScalarFloatingType(DestTy));
- static const x86::AssemblerX86::CastEmitterRegOp<
+ static const X8632::AssemblerX8632::CastEmitterRegOp<
RegX8632::XmmRegister, RegX8632::GPRRegister> Emitter = {
- &x86::AssemblerX86::cvtsi2ss, &x86::AssemblerX86::cvtsi2ss};
+ &X8632::AssemblerX8632::cvtsi2ss, &X8632::AssemblerX8632::cvtsi2ss};
emitIASCastRegOp<RegX8632::XmmRegister, RegX8632::GPRRegister,
RegX8632::getEncodedXmm, RegX8632::getEncodedGPR>(
Func, DestTy, Dest, Src, Emitter);
@@ -1725,9 +1740,9 @@
assert(isScalarFloatingType(SrcTy));
assert(isScalarIntegerType(DestTy));
assert(typeWidthInBytes(DestTy) <= 4);
- static const x86::AssemblerX86::CastEmitterRegOp<
+ static const X8632::AssemblerX8632::CastEmitterRegOp<
RegX8632::GPRRegister, RegX8632::XmmRegister> Emitter = {
- &x86::AssemblerX86::cvttss2si, &x86::AssemblerX86::cvttss2si};
+ &X8632::AssemblerX8632::cvttss2si, &X8632::AssemblerX8632::cvttss2si};
emitIASCastRegOp<RegX8632::GPRRegister, RegX8632::XmmRegister,
RegX8632::getEncodedGPR, RegX8632::getEncodedXmm>(
Func, SrcTy, Dest, Src, Emitter);
@@ -1737,24 +1752,25 @@
assert(isScalarFloatingType(SrcTy));
assert(isScalarFloatingType(DestTy));
assert(DestTy != SrcTy);
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::cvtfloat2float, &x86::AssemblerX86::cvtfloat2float};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::cvtfloat2float,
+ &X8632::AssemblerX8632::cvtfloat2float};
emitIASRegOpTyXMM(Func, SrcTy, Dest, Src, Emitter);
return;
}
case Dq2ps: {
assert(isVectorIntegerType(SrcTy));
assert(isVectorFloatingType(DestTy));
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::cvtdq2ps, &x86::AssemblerX86::cvtdq2ps};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::cvtdq2ps, &X8632::AssemblerX8632::cvtdq2ps};
emitIASRegOpTyXMM(Func, DestTy, Dest, Src, Emitter);
return;
}
case Tps2dq: {
assert(isVectorFloatingType(SrcTy));
assert(isVectorIntegerType(DestTy));
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::cvttps2dq, &x86::AssemblerX86::cvttps2dq};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::cvttps2dq, &X8632::AssemblerX8632::cvttps2dq};
emitIASRegOpTyXMM(Func, DestTy, Dest, Src, Emitter);
return;
}
@@ -1790,11 +1806,11 @@
const Operand *Src0 = getSrc(0);
const Operand *Src1 = getSrc(1);
Type Ty = Src0->getType();
- static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
- &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp,
- &x86::AssemblerX86::cmp};
- static const x86::AssemblerX86::GPREmitterAddrOp AddrEmitter = {
- &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp};
+ static const X8632::AssemblerX8632::GPREmitterRegOp RegEmitter = {
+ &X8632::AssemblerX8632::cmp, &X8632::AssemblerX8632::cmp,
+ &X8632::AssemblerX8632::cmp};
+ static const X8632::AssemblerX8632::GPREmitterAddrOp AddrEmitter = {
+ &X8632::AssemblerX8632::cmp, &X8632::AssemblerX8632::cmp};
if (const auto SrcVar0 = llvm::dyn_cast<Variable>(Src0)) {
if (SrcVar0->hasReg()) {
emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
@@ -1831,8 +1847,8 @@
assert(llvm::isa<Variable>(getSrc(0)));
const auto Src0Var = llvm::cast<Variable>(getSrc(0));
Type Ty = Src0Var->getType();
- const static x86::AssemblerX86::XmmEmitterRegOp Emitter = {
- &x86::AssemblerX86::ucomiss, &x86::AssemblerX86::ucomiss};
+ const static X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
+ &X8632::AssemblerX8632::ucomiss, &X8632::AssemblerX8632::ucomiss};
emitIASRegOpTyXMM(Func, Ty, Src0Var, getSrc(1), Emitter);
}
@@ -1853,7 +1869,7 @@
}
void InstX8632UD2::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->ud2();
}
@@ -1881,10 +1897,10 @@
const Operand *Src1 = getSrc(1);
Type Ty = Src0->getType();
// The Reg/Addr form of test is not encodeable.
- static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
- &x86::AssemblerX86::test, nullptr, &x86::AssemblerX86::test};
- static const x86::AssemblerX86::GPREmitterAddrOp AddrEmitter = {
- &x86::AssemblerX86::test, &x86::AssemblerX86::test};
+ static const X8632::AssemblerX8632::GPREmitterRegOp RegEmitter = {
+ &X8632::AssemblerX8632::test, nullptr, &X8632::AssemblerX8632::test};
+ static const X8632::AssemblerX8632::GPREmitterAddrOp AddrEmitter = {
+ &X8632::AssemblerX8632::test, &X8632::AssemblerX8632::test};
if (const auto SrcVar0 = llvm::dyn_cast<Variable>(Src0)) {
if (SrcVar0->hasReg()) {
emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
@@ -1912,7 +1928,7 @@
}
void InstX8632Mfence::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->mfence();
}
@@ -1946,11 +1962,11 @@
const auto SrcVar = llvm::cast<Variable>(Src);
assert(SrcVar->hasReg());
RegX8632::XmmRegister SrcReg = RegX8632::getEncodedXmm(SrcVar->getRegNum());
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
if (const auto DestVar = llvm::dyn_cast<Variable>(Dest)) {
assert(!DestVar->hasReg());
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(DestVar));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(DestVar));
Asm->movss(DestTy, StackAddr, SrcReg);
} else {
const auto DestMem = llvm::cast<OperandX8632Mem>(Dest);
@@ -1960,8 +1976,8 @@
return;
} else {
assert(isScalarIntegerType(DestTy));
- static const x86::AssemblerX86::GPREmitterAddrOp GPRAddrEmitter = {
- &x86::AssemblerX86::mov, &x86::AssemblerX86::mov};
+ static const X8632::AssemblerX8632::GPREmitterAddrOp GPRAddrEmitter = {
+ &X8632::AssemblerX8632::mov, &X8632::AssemblerX8632::mov};
emitIASAsAddrOpTyGPR(Func, DestTy, Dest, Src, GPRAddrEmitter);
}
}
@@ -1988,7 +2004,7 @@
}
void InstX8632StoreP::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 2);
const auto SrcVar = llvm::cast<Variable>(getSrc(0));
const auto DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
@@ -2022,7 +2038,7 @@
}
void InstX8632StoreQ::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 2);
const auto SrcVar = llvm::cast<Variable>(getSrc(0));
const auto DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
@@ -2103,13 +2119,13 @@
// then use that register's type to decide on which emitter set to use.
// The emitter set will include reg-reg movs, but that case should
// be unused when the types don't match.
- static const x86::AssemblerX86::XmmEmitterRegOp XmmRegEmitter = {
- &x86::AssemblerX86::movss, &x86::AssemblerX86::movss};
- static const x86::AssemblerX86::GPREmitterRegOp GPRRegEmitter = {
- &x86::AssemblerX86::mov, &x86::AssemblerX86::mov,
- &x86::AssemblerX86::mov};
- static const x86::AssemblerX86::GPREmitterAddrOp GPRAddrEmitter = {
- &x86::AssemblerX86::mov, &x86::AssemblerX86::mov};
+ static const X8632::AssemblerX8632::XmmEmitterRegOp XmmRegEmitter = {
+ &X8632::AssemblerX8632::movss, &X8632::AssemblerX8632::movss};
+ static const X8632::AssemblerX8632::GPREmitterRegOp GPRRegEmitter = {
+ &X8632::AssemblerX8632::mov, &X8632::AssemblerX8632::mov,
+ &X8632::AssemblerX8632::mov};
+ static const X8632::AssemblerX8632::GPREmitterAddrOp GPRAddrEmitter = {
+ &X8632::AssemblerX8632::mov, &X8632::AssemblerX8632::mov};
// For an integer truncation operation, src is wider than dest.
// Ideally, we use a mov instruction whose data width matches the
// narrower dest. This is a problem if e.g. src is a register like
@@ -2139,13 +2155,13 @@
} else {
// Dest must be Stack and Src *could* be a register. Use Src's type
// to decide on the emitters.
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Dest));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Dest));
if (isScalarFloatingType(SrcTy)) {
// Src must be a register.
const auto SrcVar = llvm::cast<Variable>(Src);
assert(SrcVar->hasReg());
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->movss(SrcTy, StackAddr,
RegX8632::getEncodedXmm(SrcVar->getRegNum()));
return;
@@ -2160,7 +2176,7 @@
}
template <> void InstX8632Movd::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 1);
const Variable *Dest = getDest();
const auto SrcVar = llvm::cast<Variable>(getSrc(0));
@@ -2173,8 +2189,8 @@
if (SrcVar->hasReg()) {
Asm->movd(DestReg, RegX8632::getEncodedGPR(SrcVar->getRegNum()));
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(SrcVar));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(SrcVar));
Asm->movd(DestReg, StackAddr);
}
} else {
@@ -2185,8 +2201,8 @@
if (Dest->hasReg()) {
Asm->movd(RegX8632::getEncodedGPR(Dest->getRegNum()), SrcReg);
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Dest));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Dest));
Asm->movd(StackAddr, SrcReg);
}
}
@@ -2212,9 +2228,9 @@
assert(isVectorType(getDest()->getType()));
const Variable *Dest = getDest();
const Operand *Src = getSrc(0);
- const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
- &x86::AssemblerX86::movups, &x86::AssemblerX86::movups,
- &x86::AssemblerX86::movups};
+ const static X8632::AssemblerX8632::XmmEmitterMovOps Emitter = {
+ &X8632::AssemblerX8632::movups, &X8632::AssemblerX8632::movups,
+ &X8632::AssemblerX8632::movups};
emitIASMovlikeXMM(Func, Dest, Src, Emitter);
}
@@ -2237,9 +2253,9 @@
getDest()->getType() == IceType_f64);
const Variable *Dest = getDest();
const Operand *Src = getSrc(0);
- const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
- &x86::AssemblerX86::movq, &x86::AssemblerX86::movq,
- &x86::AssemblerX86::movq};
+ const static X8632::AssemblerX8632::XmmEmitterMovOps Emitter = {
+ &X8632::AssemblerX8632::movq, &X8632::AssemblerX8632::movq,
+ &X8632::AssemblerX8632::movq};
emitIASMovlikeXMM(Func, Dest, Src, Emitter);
}
@@ -2251,7 +2267,7 @@
assert(Dest == getSrc(0));
const auto SrcVar = llvm::cast<Variable>(getSrc(1));
assert(Dest->hasReg() && SrcVar->hasReg());
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->movss(IceType_f32, RegX8632::getEncodedXmm(Dest->getRegNum()),
RegX8632::getEncodedXmm(SrcVar->getRegNum()));
}
@@ -2288,7 +2304,7 @@
}
void InstX8632Nop::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
// TODO: Emit the right code for the variant.
Asm->nop();
}
@@ -2326,7 +2342,7 @@
}
void InstX8632Fld::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 1);
const Operand *Src = getSrc(0);
Type Ty = Src->getType();
@@ -2334,22 +2350,22 @@
if (Var->hasReg()) {
// This is a physical xmm register, so we need to spill it to a
// temporary stack slot.
- x86::Immediate Width(typeWidthInBytes(Ty));
+ X8632::Immediate Width(typeWidthInBytes(Ty));
Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
- x86::Address StackSlot = x86::Address(RegX8632::Encoded_Reg_esp, 0);
+ X8632::Address StackSlot = X8632::Address(RegX8632::Encoded_Reg_esp, 0);
Asm->movss(Ty, StackSlot, RegX8632::getEncodedXmm(Var->getRegNum()));
Asm->fld(Ty, StackSlot);
Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
} else {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Var));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Var));
Asm->fld(Ty, StackAddr);
}
} else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
Asm->fld(Ty, Mem->toAsmAddress(Asm));
} else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
- Asm->fld(Ty, x86::Address::ofConstPool(Asm, Imm));
+ Asm->fld(Ty, X8632::Address::ofConstPool(Asm, Imm));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -2398,7 +2414,7 @@
}
void InstX8632Fstp::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
assert(getSrcSize() == 0);
const Variable *Dest = getDest();
// TODO(jvoung,stichnot): Utilize this by setting Dest to nullptr to
@@ -2411,17 +2427,17 @@
}
Type Ty = Dest->getType();
if (!Dest->hasReg()) {
- x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
- ->stackVarToAsmOperand(Dest));
+ X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+ ->stackVarToAsmOperand(Dest));
Asm->fstp(Ty, StackAddr);
} else {
// Dest is a physical (xmm) register, so st(0) needs to go through
// memory. Hack this by creating a temporary stack slot, spilling
// st(0) there, loading it into the xmm register, and deallocating
// the stack slot.
- x86::Immediate Width(typeWidthInBytes(Ty));
+ X8632::Immediate Width(typeWidthInBytes(Ty));
Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
- x86::Address StackSlot = x86::Address(RegX8632::Encoded_Reg_esp, 0);
+ X8632::Address StackSlot = X8632::Address(RegX8632::Encoded_Reg_esp, 0);
Asm->fstp(Ty, StackSlot);
Asm->movss(Ty, RegX8632::getEncodedXmm(Dest->getRegNum()), StackSlot);
Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
@@ -2493,9 +2509,9 @@
assert(Dest->hasReg());
// pextrw's Src(0) must be a register (both SSE4.1 and SSE2).
assert(llvm::cast<Variable>(getSrc(0))->hasReg());
- static const x86::AssemblerX86::ThreeOpImmEmitter<
+ static const X8632::AssemblerX8632::ThreeOpImmEmitter<
RegX8632::GPRRegister, RegX8632::XmmRegister> Emitter = {
- &x86::AssemblerX86::pextr, nullptr};
+ &X8632::AssemblerX8632::pextr, nullptr};
emitIASThreeOpImmOps<RegX8632::GPRRegister, RegX8632::XmmRegister,
RegX8632::getEncodedGPR, RegX8632::getEncodedXmm>(
Func, DispatchTy, Dest, getSrc(0), getSrc(1), Emitter);
@@ -2543,9 +2559,9 @@
// from the encodings for ByteRegs overlapping the encodings for r32),
// but we have to trust the regalloc to not choose "ah", where it
// doesn't overlap.
- static const x86::AssemblerX86::ThreeOpImmEmitter<
+ static const X8632::AssemblerX8632::ThreeOpImmEmitter<
RegX8632::XmmRegister, RegX8632::GPRRegister> Emitter = {
- &x86::AssemblerX86::pinsr, &x86::AssemblerX86::pinsr};
+ &X8632::AssemblerX8632::pinsr, &X8632::AssemblerX8632::pinsr};
emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::GPRRegister,
RegX8632::getEncodedXmm, RegX8632::getEncodedGPR>(
Func, DispatchTy, getDest(), Src0, getSrc(2), Emitter);
@@ -2555,9 +2571,9 @@
assert(getSrcSize() == 2);
const Variable *Dest = getDest();
Type Ty = Dest->getType();
- static const x86::AssemblerX86::ThreeOpImmEmitter<
+ static const X8632::AssemblerX8632::ThreeOpImmEmitter<
RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
- &x86::AssemblerX86::pshufd, &x86::AssemblerX86::pshufd};
+ &X8632::AssemblerX8632::pshufd, &X8632::AssemblerX8632::pshufd};
emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
Func, Ty, Dest, getSrc(0), getSrc(1), Emitter);
@@ -2568,9 +2584,9 @@
const Variable *Dest = getDest();
assert(Dest == getSrc(0));
Type Ty = Dest->getType();
- static const x86::AssemblerX86::ThreeOpImmEmitter<
+ static const X8632::AssemblerX8632::ThreeOpImmEmitter<
RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
- &x86::AssemblerX86::shufps, &x86::AssemblerX86::shufps};
+ &X8632::AssemblerX8632::shufps, &X8632::AssemblerX8632::shufps};
emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
@@ -2587,7 +2603,7 @@
void InstX8632Pop::emitIAS(const Cfg *Func) const {
assert(getSrcSize() == 0);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
if (getDest()->hasReg()) {
Asm->popl(RegX8632::getEncodedGPR(getDest()->getRegNum()));
} else {
@@ -2613,8 +2629,8 @@
}
void InstX8632AdjustStack::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
- Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
+ Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, X8632::Immediate(Amount));
Func->getTarget()->updateStackAdjustment(Amount);
}
@@ -2642,7 +2658,7 @@
// Push is currently only used for saving GPRs.
const auto Var = llvm::cast<Variable>(getSrc(0));
assert(Var->hasReg());
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->pushl(RegX8632::getEncodedGPR(Var->getRegNum()));
}
@@ -2697,7 +2713,7 @@
}
void InstX8632Ret::emitIAS(const Cfg *Func) const {
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Asm->ret();
}
@@ -2725,11 +2741,11 @@
void InstX8632Xadd::emitIAS(const Cfg *Func) const {
assert(getSrcSize() == 2);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Type Ty = getSrc(0)->getType();
const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
- const x86::Address Addr = Mem->toAsmAddress(Asm);
+ const X8632::Address Addr = Mem->toAsmAddress(Asm);
const auto VarReg = llvm::cast<Variable>(getSrc(1));
assert(VarReg->hasReg());
const RegX8632::GPRRegister Reg =
@@ -2761,11 +2777,11 @@
void InstX8632Xchg::emitIAS(const Cfg *Func) const {
assert(getSrcSize() == 2);
- x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+ X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
Type Ty = getSrc(0)->getType();
const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
- const x86::Address Addr = Mem->toAsmAddress(Asm);
+ const X8632::Address Addr = Mem->toAsmAddress(Asm);
const auto VarReg = llvm::cast<Variable>(getSrc(1));
assert(VarReg->hasReg());
const RegX8632::GPRRegister Reg =
@@ -2869,14 +2885,14 @@
Str << "]";
}
-void OperandX8632Mem::emitSegmentOverride(x86::AssemblerX86 *Asm) const {
+void OperandX8632Mem::emitSegmentOverride(X8632::AssemblerX8632 *Asm) const {
if (SegmentReg != DefaultSegment) {
assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
Asm->EmitSegmentOverride(InstX8632SegmentPrefixes[SegmentReg]);
}
}
-x86::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
+X8632::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
int32_t Disp = 0;
AssemblerFixup *Fixup = nullptr;
// Determine the offset (is it relocatable?)
@@ -2894,28 +2910,29 @@
// Now convert to the various possible forms.
if (getBase() && getIndex()) {
- return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
- RegX8632::getEncodedGPR(getIndex()->getRegNum()),
- x86::ScaleFactor(getShift()), Disp);
+ return X8632::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
+ RegX8632::getEncodedGPR(getIndex()->getRegNum()),
+ X8632::ScaleFactor(getShift()), Disp);
} else if (getBase()) {
- return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp);
+ return X8632::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
+ Disp);
} else if (getIndex()) {
- return x86::Address(RegX8632::getEncodedGPR(getIndex()->getRegNum()),
- x86::ScaleFactor(getShift()), Disp);
+ return X8632::Address(RegX8632::getEncodedGPR(getIndex()->getRegNum()),
+ X8632::ScaleFactor(getShift()), Disp);
} else if (Fixup) {
- return x86::Address::Absolute(Disp, Fixup);
+ return X8632::Address::Absolute(Disp, Fixup);
} else {
- return x86::Address::Absolute(Disp);
+ return X8632::Address::Absolute(Disp);
}
}
-x86::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
+X8632::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
assert(!Var->hasReg());
const TargetLowering *Target = Func->getTarget();
int32_t Offset =
Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
- return x86::Address(RegX8632::getEncodedGPR(Target->getFrameOrStackReg()),
- Offset);
+ return X8632::Address(RegX8632::getEncodedGPR(Target->getFrameOrStackReg()),
+ Offset);
}
void VariableSplit::emit(const Cfg *Func) const {
diff --git a/src/IceInstX8632.h b/src/IceInstX8632.h
index f0824b5..fca32c6 100644
--- a/src/IceInstX8632.h
+++ b/src/IceInstX8632.h
@@ -76,8 +76,8 @@
Variable *getIndex() const { return Index; }
uint16_t getShift() const { return Shift; }
SegmentRegisters getSegmentRegister() const { return SegmentReg; }
- void emitSegmentOverride(x86::AssemblerX86 *Asm) const;
- x86::Address toAsmAddress(Assembler *Asm) const;
+ void emitSegmentOverride(X8632::AssemblerX8632 *Asm) const;
+ X8632::Address toAsmAddress(Assembler *Asm) const;
void emit(const Cfg *Func) const override;
using OperandX8632::dump;
void dump(const Cfg *Func, Ostream &Str) const override;
@@ -115,7 +115,7 @@
}
int32_t getOffset() const { return Part == High ? 4 : 0; }
- x86::Address toAsmAddress(const Cfg *Func) const;
+ X8632::Address toAsmAddress(const Cfg *Func) const;
void emit(const Cfg *Func) const override;
using OperandX8632::dump;
void dump(const Cfg *Func, Ostream &Str) const override;
@@ -501,7 +501,7 @@
// Emit a one-operand (GPR) instruction.
void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Var,
- const x86::AssemblerX86::GPREmitterOneOp &Emitter);
+ const X8632::AssemblerX8632::GPREmitterOneOp &Emitter);
// Instructions of the form x := op(x).
template <InstX8632::InstKindX8632 K>
@@ -546,7 +546,7 @@
}
~InstX8632InplaceopGPR() override {}
static const char *Opcode;
- static const x86::AssemblerX86::GPREmitterOneOp Emitter;
+ static const X8632::AssemblerX8632::GPREmitterOneOp Emitter;
};
// Emit a two-operand (GPR) instruction, where the dest operand is a
@@ -554,7 +554,7 @@
template <bool VarCanBeByte = true, bool SrcCanBeByte = true>
void emitIASRegOpTyGPR(const Cfg *Func, Type Ty, const Variable *Dst,
const Operand *Src,
- const x86::AssemblerX86::GPREmitterRegOp &Emitter);
+ const X8632::AssemblerX8632::GPREmitterRegOp &Emitter);
// Instructions of the form x := op(y).
template <InstX8632::InstKindX8632 K>
@@ -610,12 +610,12 @@
}
~InstX8632UnaryopGPR() override {}
static const char *Opcode;
- static const x86::AssemblerX86::GPREmitterRegOp Emitter;
+ static const X8632::AssemblerX8632::GPREmitterRegOp Emitter;
};
void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::XmmEmitterRegOp &Emitter);
+ const X8632::AssemblerX8632::XmmEmitterRegOp &Emitter);
template <InstX8632::InstKindX8632 K>
class InstX8632UnaryopXmm : public InstX8632 {
@@ -660,7 +660,7 @@
}
~InstX8632UnaryopXmm() override {}
static const char *Opcode;
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter;
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter;
};
// See the definition of emitTwoAddress() for a description of
@@ -670,7 +670,7 @@
void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::GPREmitterShiftOp &Emitter);
+ const X8632::AssemblerX8632::GPREmitterShiftOp &Emitter);
template <InstX8632::InstKindX8632 K>
class InstX8632BinopGPRShift : public InstX8632 {
@@ -714,7 +714,7 @@
}
~InstX8632BinopGPRShift() override {}
static const char *Opcode;
- static const x86::AssemblerX86::GPREmitterShiftOp Emitter;
+ static const X8632::AssemblerX8632::GPREmitterShiftOp Emitter;
};
template <InstX8632::InstKindX8632 K>
@@ -758,7 +758,7 @@
}
~InstX8632BinopGPR() override {}
static const char *Opcode;
- static const x86::AssemblerX86::GPREmitterRegOp Emitter;
+ static const X8632::AssemblerX8632::GPREmitterRegOp Emitter;
};
template <InstX8632::InstKindX8632 K, bool NeedsElementType>
@@ -806,12 +806,12 @@
}
~InstX8632BinopXmm() override {}
static const char *Opcode;
- static const x86::AssemblerX86::XmmEmitterRegOp Emitter;
+ static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter;
};
void emitIASXmmShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src,
- const x86::AssemblerX86::XmmEmitterShiftOp &Emitter);
+ const X8632::AssemblerX8632::XmmEmitterShiftOp &Emitter);
template <InstX8632::InstKindX8632 K, bool AllowAllTypes = false>
class InstX8632BinopXmmShift : public InstX8632 {
@@ -859,7 +859,7 @@
}
~InstX8632BinopXmmShift() override {}
static const char *Opcode;
- static const x86::AssemblerX86::XmmEmitterShiftOp Emitter;
+ static const X8632::AssemblerX8632::XmmEmitterShiftOp Emitter;
};
template <InstX8632::InstKindX8632 K> class InstX8632Ternop : public InstX8632 {
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index 93b4884..22f698a 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -80,15 +80,10 @@
std::unique_ptr<Assembler> TargetLowering::createAssembler(TargetArch Target,
Cfg *Func) {
- // These statements can be #ifdef'd to specialize the assembler
- // to a subset of the available targets. TODO: use CRTP.
- // TODO(jvoung): use SZTargets.def (rename AssemblerX86 -> AssemblerX8632),
- // and make the namespaces consistent.
- if (Target == Target_X8632)
- return std::unique_ptr<Assembler>(new x86::AssemblerX86());
-
- if (Target == Target_ARM32)
- return std::unique_ptr<Assembler>(new AssemblerARM32());
+#define SUBZERO_TARGET(X) \
+ if (Target == Target_##X) \
+ return std::unique_ptr<Assembler>(new X::Assembler##X());
+#include "llvm/Config/SZTargets.def"
Func->setError("Unsupported target assembler");
return nullptr;
diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index 82b0f7c..582e441 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -518,7 +518,7 @@
Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")";
}
-x86::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
+X8632::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
if (Var->hasReg())
llvm_unreachable("Stack Variable has a register assigned");
if (Var->getWeight().isInf())
@@ -526,7 +526,7 @@
int32_t Offset = Var->getStackOffset();
if (!hasFramePointer())
Offset += getStackAdjustment();
- return x86::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset);
+ return X8632::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset);
}
void TargetX8632::lowerArguments() {
diff --git a/src/IceTargetLoweringX8632.h b/src/IceTargetLoweringX8632.h
index 286e380..34f187c 100644
--- a/src/IceTargetLoweringX8632.h
+++ b/src/IceTargetLoweringX8632.h
@@ -67,7 +67,7 @@
size_t BasicFrameOffset, size_t &InArgsSizeBytes);
Operand *loOperand(Operand *Operand);
Operand *hiOperand(Operand *Operand);
- x86::Address stackVarToAsmOperand(const Variable *Var) const;
+ X8632::Address stackVarToAsmOperand(const Variable *Var) const;
enum X86InstructionSet {
Begin,
diff --git a/src/assembler_arm32.h b/src/assembler_arm32.h
index 5452d4a..6c8a958 100644
--- a/src/assembler_arm32.h
+++ b/src/assembler_arm32.h
@@ -28,6 +28,7 @@
#include "assembler.h"
namespace Ice {
+namespace ARM32 {
class AssemblerARM32 : public Assembler {
AssemblerARM32(const AssemblerARM32 &) = delete;
@@ -67,6 +68,7 @@
}
};
+} // end of namespace ARM32
} // end of namespace Ice
#endif // SUBZERO_SRC_ASSEMBLER_ARM32_H
diff --git a/src/assembler_ia32.cpp b/src/assembler_ia32.cpp
index f18714e..b49f63a 100644
--- a/src/assembler_ia32.cpp
+++ b/src/assembler_ia32.cpp
@@ -23,15 +23,15 @@
#include "IceOperand.h"
namespace Ice {
-namespace x86 {
+namespace X8632 {
Address Address::ofConstPool(Assembler *Asm, const Constant *Imm) {
AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Imm);
const RelocOffsetT Offset = 0;
- return x86::Address::Absolute(Offset, Fixup);
+ return Address::Absolute(Offset, Fixup);
}
-AssemblerX86::~AssemblerX86() {
+AssemblerX8632::~AssemblerX8632() {
#ifndef NDEBUG
for (const Label *Label : CfgNodeLabels) {
Label->FinalCheck();
@@ -42,7 +42,7 @@
#endif
}
-void AssemblerX86::alignFunction() {
+void AssemblerX8632::alignFunction() {
SizeT Align = 1 << getBundleAlignLog2Bytes();
SizeT BytesNeeded = Utils::OffsetToAlignment(buffer_.GetPosition(), Align);
const SizeT HltSize = 1;
@@ -52,7 +52,7 @@
}
}
-Label *AssemblerX86::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
+Label *AssemblerX8632::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
Label *L = nullptr;
if (Number == Labels.size()) {
L = new (this->Allocate<Label>()) Label();
@@ -70,39 +70,39 @@
return L;
}
-Label *AssemblerX86::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
+Label *AssemblerX8632::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
return GetOrCreateLabel(NodeNumber, CfgNodeLabels);
}
-Label *AssemblerX86::GetOrCreateLocalLabel(SizeT Number) {
+Label *AssemblerX8632::GetOrCreateLocalLabel(SizeT Number) {
return GetOrCreateLabel(Number, LocalLabels);
}
-void AssemblerX86::BindCfgNodeLabel(SizeT NodeNumber) {
+void AssemblerX8632::BindCfgNodeLabel(SizeT NodeNumber) {
assert(!getPreliminary());
Label *L = GetOrCreateCfgNodeLabel(NodeNumber);
this->Bind(L);
}
-void AssemblerX86::BindLocalLabel(SizeT Number) {
+void AssemblerX8632::BindLocalLabel(SizeT Number) {
Label *L = GetOrCreateLocalLabel(Number);
if (!getPreliminary())
this->Bind(L);
}
-void AssemblerX86::call(GPRRegister reg) {
+void AssemblerX8632::call(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xFF);
EmitRegisterOperand(2, reg);
}
-void AssemblerX86::call(const Address &address) {
+void AssemblerX8632::call(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xFF);
EmitOperand(2, address);
}
-void AssemblerX86::call(const ConstantRelocatable *label) {
+void AssemblerX8632::call(const ConstantRelocatable *label) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
intptr_t call_start = buffer_.GetPosition();
EmitUint8(0xE8);
@@ -112,7 +112,7 @@
(void)call_start;
}
-void AssemblerX86::call(const Immediate &abs_address) {
+void AssemblerX8632::call(const Immediate &abs_address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
intptr_t call_start = buffer_.GetPosition();
EmitUint8(0xE8);
@@ -123,40 +123,40 @@
(void)call_start;
}
-void AssemblerX86::pushl(GPRRegister reg) {
+void AssemblerX8632::pushl(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x50 + reg);
}
-void AssemblerX86::popl(GPRRegister reg) {
+void AssemblerX8632::popl(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x58 + reg);
}
-void AssemblerX86::popl(const Address &address) {
+void AssemblerX8632::popl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x8F);
EmitOperand(0, address);
}
-void AssemblerX86::pushal() {
+void AssemblerX8632::pushal() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x60);
}
-void AssemblerX86::popal() {
+void AssemblerX8632::popal() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x61);
}
-void AssemblerX86::setcc(CondX86::BrCond condition, ByteRegister dst) {
+void AssemblerX8632::setcc(CondX86::BrCond condition, ByteRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x90 + condition);
EmitUint8(0xC0 + dst);
}
-void AssemblerX86::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
+void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitUint8(0xB0 + dst);
@@ -169,7 +169,7 @@
EmitImmediate(Ty, imm);
}
-void AssemblerX86::mov(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::mov(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -181,7 +181,7 @@
EmitRegisterOperand(src, dst);
}
-void AssemblerX86::mov(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -193,7 +193,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::mov(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8632::mov(Type Ty, const Address &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -205,7 +205,7 @@
EmitOperand(src, dst);
}
-void AssemblerX86::mov(Type Ty, const Address &dst, const Immediate &imm) {
+void AssemblerX8632::mov(Type Ty, const Address &dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -220,7 +220,7 @@
}
}
-void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -229,7 +229,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -238,7 +238,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -247,7 +247,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -256,7 +256,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::lea(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::lea(Type Ty, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -265,21 +265,21 @@
EmitOperand(dst, src);
}
-void AssemblerX86::cmov(CondX86::BrCond cond, GPRRegister dst,
- GPRRegister src) {
+void AssemblerX8632::cmov(CondX86::BrCond cond, GPRRegister dst,
+ GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x40 + cond);
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::rep_movsb() {
+void AssemblerX8632::rep_movsb() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF3);
EmitUint8(0xA4);
}
-void AssemblerX86::movss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::movss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -287,7 +287,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::movss(Type Ty, const Address &dst, XmmRegister src) {
+void AssemblerX8632::movss(Type Ty, const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -295,7 +295,7 @@
EmitOperand(src, dst);
}
-void AssemblerX86::movss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -303,7 +303,7 @@
EmitXmmRegisterOperand(src, dst);
}
-void AssemblerX86::movd(XmmRegister dst, GPRRegister src) {
+void AssemblerX8632::movd(XmmRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -311,7 +311,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::movd(XmmRegister dst, const Address &src) {
+void AssemblerX8632::movd(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -319,7 +319,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::movd(GPRRegister dst, XmmRegister src) {
+void AssemblerX8632::movd(GPRRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -327,7 +327,7 @@
EmitRegisterOperand(src, dst);
}
-void AssemblerX86::movd(const Address &dst, XmmRegister src) {
+void AssemblerX8632::movd(const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -335,7 +335,7 @@
EmitOperand(src, dst);
}
-void AssemblerX86::movq(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movq(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF3);
EmitUint8(0x0F);
@@ -343,7 +343,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::movq(const Address &dst, XmmRegister src) {
+void AssemblerX8632::movq(const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -351,7 +351,7 @@
EmitOperand(src, dst);
}
-void AssemblerX86::movq(XmmRegister dst, const Address &src) {
+void AssemblerX8632::movq(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF3);
EmitUint8(0x0F);
@@ -359,7 +359,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::addss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::addss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -367,7 +367,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::addss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::addss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -375,7 +375,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::subss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::subss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -383,7 +383,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::subss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::subss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -391,7 +391,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -399,7 +399,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::mulss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -407,7 +407,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::divss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -415,7 +415,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::divss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::divss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -423,53 +423,53 @@
EmitOperand(dst, src);
}
-void AssemblerX86::fld(Type Ty, const Address &src) {
+void AssemblerX8632::fld(Type Ty, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
EmitOperand(0, src);
}
-void AssemblerX86::fstp(Type Ty, const Address &dst) {
+void AssemblerX8632::fstp(Type Ty, const Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
EmitOperand(3, dst);
}
-void AssemblerX86::fstp(X87STRegister st) {
+void AssemblerX8632::fstp(X87STRegister st) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xDD);
EmitUint8(0xD8 + st);
}
-void AssemblerX86::movaps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movaps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x28);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::movups(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movups(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x10);
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::movups(XmmRegister dst, const Address &src) {
+void AssemblerX8632::movups(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x10);
EmitOperand(dst, src);
}
-void AssemblerX86::movups(const Address &dst, XmmRegister src) {
+void AssemblerX8632::movups(const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x11);
EmitOperand(src, dst);
}
-void AssemblerX86::padd(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::padd(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -483,7 +483,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::padd(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::padd(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -497,7 +497,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -505,7 +505,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -513,7 +513,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -521,7 +521,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -529,7 +529,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -543,7 +543,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pmull(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -557,7 +557,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -565,7 +565,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -573,7 +574,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -581,7 +582,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::por(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -589,7 +590,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::psub(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::psub(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -603,7 +604,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::psub(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psub(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -617,7 +618,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -625,7 +626,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -633,7 +634,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::psll(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::psll(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -646,7 +647,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::psll(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -659,7 +660,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
+void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_int8());
EmitUint8(0x66);
@@ -674,7 +675,7 @@
EmitUint8(imm.value() & 0xFF);
}
-void AssemblerX86::psra(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::psra(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -687,7 +688,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::psra(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -700,7 +701,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
+void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_int8());
EmitUint8(0x66);
@@ -715,7 +716,7 @@
EmitUint8(imm.value() & 0xFF);
}
-void AssemblerX86::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -730,7 +731,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -745,7 +746,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
+void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_int8());
EmitUint8(0x66);
@@ -766,98 +767,98 @@
// {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows
// addpd, etc., we can use the Ty parameter to decide on adding
// a 0x66 prefix.
-void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x58);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x58);
EmitOperand(dst, src);
}
-void AssemblerX86::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5C);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5C);
EmitOperand(dst, src);
}
-void AssemblerX86::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5E);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5E);
EmitOperand(dst, src);
}
-void AssemblerX86::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x59);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x59);
EmitOperand(dst, src);
}
-void AssemblerX86::minps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::minps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5D);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::maxps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::maxps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5F);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::andps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::andps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x54);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::andps(XmmRegister dst, const Address &src) {
+void AssemblerX8632::andps(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x54);
EmitOperand(dst, src);
}
-void AssemblerX86::orps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::orps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x56);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -866,8 +867,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -876,7 +877,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -885,8 +886,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -895,8 +896,8 @@
EmitOperand(dst, src);
}
-void AssemblerX86::cmpps(XmmRegister dst, XmmRegister src,
- CondX86::CmppsCond CmpCondition) {
+void AssemblerX8632::cmpps(XmmRegister dst, XmmRegister src,
+ CondX86::CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xC2);
@@ -904,8 +905,8 @@
EmitUint8(CmpCondition);
}
-void AssemblerX86::cmpps(XmmRegister dst, const Address &src,
- CondX86::CmppsCond CmpCondition) {
+void AssemblerX8632::cmpps(XmmRegister dst, const Address &src,
+ CondX86::CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xC2);
@@ -913,56 +914,56 @@
EmitUint8(CmpCondition);
}
-void AssemblerX86::sqrtps(XmmRegister dst) {
+void AssemblerX8632::sqrtps(XmmRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x51);
EmitXmmRegisterOperand(dst, dst);
}
-void AssemblerX86::rsqrtps(XmmRegister dst) {
+void AssemblerX8632::rsqrtps(XmmRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x52);
EmitXmmRegisterOperand(dst, dst);
}
-void AssemblerX86::reciprocalps(XmmRegister dst) {
+void AssemblerX8632::reciprocalps(XmmRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x53);
EmitXmmRegisterOperand(dst, dst);
}
-void AssemblerX86::movhlps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movhlps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x12);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::movlhps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::movlhps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x16);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::unpcklps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::unpcklps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x14);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::unpckhps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::unpckhps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x15);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::unpcklpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::unpcklpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -970,7 +971,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::unpckhpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::unpckhpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -978,8 +979,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::set1ps(XmmRegister dst, GPRRegister tmp1,
- const Immediate &imm) {
+void AssemblerX8632::set1ps(XmmRegister dst, GPRRegister tmp1,
+ const Immediate &imm) {
// Load 32-bit immediate value into tmp1.
mov(IceType_i32, tmp1, imm);
// Move value from tmp1 into dst.
@@ -988,8 +989,8 @@
shufps(dst, dst, Immediate(0x0));
}
-void AssemblerX86::shufps(XmmRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::shufps(XmmRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xC6);
@@ -998,8 +999,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1009,8 +1010,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
- const Immediate &imm) {
+void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1020,8 +1021,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xC6);
@@ -1030,8 +1031,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
- const Immediate &imm) {
+void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xC6);
@@ -1040,7 +1041,7 @@
EmitUint8(imm.value());
}
-void AssemblerX86::minpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::minpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1048,7 +1049,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::maxpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::maxpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1056,7 +1057,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::sqrtpd(XmmRegister dst) {
+void AssemblerX8632::sqrtpd(XmmRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1064,8 +1065,8 @@
EmitXmmRegisterOperand(dst, dst);
}
-void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::shufpd(XmmRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1075,24 +1076,24 @@
EmitUint8(imm.value());
}
-void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
- XmmRegister src) {
+void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
+ XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5B);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x5B);
EmitOperand(dst, src);
}
-void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
- XmmRegister src) {
+void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
+ XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF3);
EmitUint8(0x0F);
@@ -1100,8 +1101,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF3);
EmitUint8(0x0F);
@@ -1109,7 +1110,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
+void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1117,7 +1118,8 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, const Address &src) {
+void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1125,8 +1127,8 @@
EmitOperand(dst, src);
}
-void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
- XmmRegister src) {
+void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
+ XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
// ss2sd or sd2ss
EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
@@ -1135,8 +1137,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
- const Address &src) {
+void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1144,7 +1146,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
+void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1152,7 +1154,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst,
+ const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1160,7 +1163,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
+void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_f64)
EmitUint8(0x66);
@@ -1169,7 +1172,7 @@
EmitXmmRegisterOperand(a, b);
}
-void AssemblerX86::ucomiss(Type Ty, XmmRegister a, const Address &b) {
+void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const Address &b) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_f64)
EmitUint8(0x66);
@@ -1178,7 +1181,7 @@
EmitOperand(a, b);
}
-void AssemblerX86::movmskpd(GPRRegister dst, XmmRegister src) {
+void AssemblerX8632::movmskpd(GPRRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1186,14 +1189,14 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::movmskps(GPRRegister dst, XmmRegister src) {
+void AssemblerX8632::movmskps(GPRRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x50);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1201,7 +1204,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
@@ -1209,7 +1212,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::xorpd(XmmRegister dst, const Address &src) {
+void AssemblerX8632::xorpd(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1217,7 +1220,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::xorpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::xorpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1225,7 +1228,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::orpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::orpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1233,21 +1236,21 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::xorps(XmmRegister dst, const Address &src) {
+void AssemblerX8632::xorps(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x57);
EmitOperand(dst, src);
}
-void AssemblerX86::xorps(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::xorps(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x57);
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::andpd(XmmRegister dst, const Address &src) {
+void AssemblerX8632::andpd(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1255,7 +1258,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::andpd(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::andpd(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1263,8 +1266,8 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::insertps(Type Ty, XmmRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::insertps(Type Ty, XmmRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_uint8());
assert(isVectorFloatingType(Ty));
@@ -1277,8 +1280,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::insertps(Type Ty, XmmRegister dst, const Address &src,
- const Immediate &imm) {
+void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const Address &src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_uint8());
assert(isVectorFloatingType(Ty));
@@ -1291,8 +1294,8 @@
EmitUint8(imm.value());
}
-void AssemblerX86::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
- const Immediate &imm) {
+void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_uint8());
if (Ty == IceType_i16) {
@@ -1311,8 +1314,8 @@
}
}
-void AssemblerX86::pinsr(Type Ty, XmmRegister dst, const Address &src,
- const Immediate &imm) {
+void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const Address &src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_uint8());
if (Ty == IceType_i16) {
@@ -1331,8 +1334,8 @@
}
}
-void AssemblerX86::pextr(Type Ty, GPRRegister dst, XmmRegister src,
- const Immediate &imm) {
+void AssemblerX8632::pextr(Type Ty, GPRRegister dst, XmmRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_uint8());
if (Ty == IceType_i16) {
@@ -1353,7 +1356,7 @@
}
}
-void AssemblerX86::pmovsxdq(XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pmovsxdq(XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1362,7 +1365,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1376,7 +1379,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1390,7 +1393,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
+void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1404,7 +1407,7 @@
EmitXmmRegisterOperand(dst, src);
}
-void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1418,8 +1421,8 @@
EmitOperand(dst, src);
}
-void AssemblerX86::roundsd(XmmRegister dst, XmmRegister src,
- RoundingMode mode) {
+void AssemblerX8632::roundsd(XmmRegister dst, XmmRegister src,
+ RoundingMode mode) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
@@ -1430,49 +1433,49 @@
EmitUint8(static_cast<uint8_t>(mode) | 0x8);
}
-void AssemblerX86::fnstcw(const Address &dst) {
+void AssemblerX8632::fnstcw(const Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xD9);
EmitOperand(7, dst);
}
-void AssemblerX86::fldcw(const Address &src) {
+void AssemblerX8632::fldcw(const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xD9);
EmitOperand(5, src);
}
-void AssemblerX86::fistpl(const Address &dst) {
+void AssemblerX8632::fistpl(const Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xDF);
EmitOperand(7, dst);
}
-void AssemblerX86::fistps(const Address &dst) {
+void AssemblerX8632::fistps(const Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xDB);
EmitOperand(3, dst);
}
-void AssemblerX86::fildl(const Address &src) {
+void AssemblerX8632::fildl(const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xDF);
EmitOperand(5, src);
}
-void AssemblerX86::filds(const Address &src) {
+void AssemblerX8632::filds(const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xDB);
EmitOperand(0, src);
}
-void AssemblerX86::fincstp() {
+void AssemblerX8632::fincstp() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xD9);
EmitUint8(0xF7);
}
-void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitComplexI8(7, Operand(reg), imm);
@@ -1483,7 +1486,7 @@
EmitComplex(Ty, 7, Operand(reg), imm);
}
-void AssemblerX86::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
+void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1494,7 +1497,7 @@
EmitRegisterOperand(reg0, reg1);
}
-void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1505,7 +1508,7 @@
EmitOperand(reg, address);
}
-void AssemblerX86::cmp(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1516,7 +1519,8 @@
EmitOperand(reg, address);
}
-void AssemblerX86::cmp(Type Ty, const Address &address, const Immediate &imm) {
+void AssemblerX8632::cmp(Type Ty, const Address &address,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitComplexI8(7, address, imm);
@@ -1527,7 +1531,7 @@
EmitComplex(Ty, 7, address, imm);
}
-void AssemblerX86::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
+void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1538,7 +1542,7 @@
EmitRegisterOperand(reg1, reg2);
}
-void AssemblerX86::test(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8632::test(Type Ty, const Address &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1549,7 +1553,8 @@
EmitOperand(reg, addr);
}
-void AssemblerX86::test(Type Ty, GPRRegister reg, const Immediate &immediate) {
+void AssemblerX8632::test(Type Ty, GPRRegister reg,
+ const Immediate &immediate) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
// For registers that have a byte variant (EAX, EBX, ECX, and EDX)
// we only test the byte register to keep the encoding short.
@@ -1580,8 +1585,8 @@
}
}
-void AssemblerX86::test(Type Ty, const Address &addr,
- const Immediate &immediate) {
+void AssemblerX8632::test(Type Ty, const Address &addr,
+ const Immediate &immediate) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
// If the immediate is short, we only test the byte addr to keep the
// encoding short.
@@ -1599,7 +1604,7 @@
}
}
-void AssemblerX86::And(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1610,7 +1615,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::And(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1621,7 +1626,7 @@
EmitOperand(dst, address);
}
-void AssemblerX86::And(Type Ty, GPRRegister dst, const Immediate &imm) {
+void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitComplexI8(4, Operand(dst), imm);
@@ -1632,7 +1637,7 @@
EmitComplex(Ty, 4, Operand(dst), imm);
}
-void AssemblerX86::Or(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1643,7 +1648,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::Or(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1654,7 +1659,7 @@
EmitOperand(dst, address);
}
-void AssemblerX86::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
+void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitComplexI8(1, Operand(dst), imm);
@@ -1665,7 +1670,7 @@
EmitComplex(Ty, 1, Operand(dst), imm);
}
-void AssemblerX86::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1676,7 +1681,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1687,7 +1692,7 @@
EmitOperand(dst, address);
}
-void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
+void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedType(Ty)) {
EmitComplexI8(6, Operand(dst), imm);
@@ -1698,7 +1703,7 @@
EmitComplex(Ty, 6, Operand(dst), imm);
}
-void AssemblerX86::add(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1709,7 +1714,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::add(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1720,7 +1725,7 @@
EmitOperand(reg, address);
}
-void AssemblerX86::add(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedArithType(Ty)) {
EmitComplexI8(0, Operand(reg), imm);
@@ -1731,7 +1736,7 @@
EmitComplex(Ty, 0, Operand(reg), imm);
}
-void AssemblerX86::adc(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1742,7 +1747,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::adc(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1753,7 +1758,7 @@
EmitOperand(dst, address);
}
-void AssemblerX86::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedArithType(Ty)) {
EmitComplexI8(2, Operand(reg), imm);
@@ -1764,7 +1769,7 @@
EmitComplex(Ty, 2, Operand(reg), imm);
}
-void AssemblerX86::sub(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1775,7 +1780,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::sub(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1786,7 +1791,7 @@
EmitOperand(reg, address);
}
-void AssemblerX86::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedArithType(Ty)) {
EmitComplexI8(5, Operand(reg), imm);
@@ -1797,7 +1802,7 @@
EmitComplex(Ty, 5, Operand(reg), imm);
}
-void AssemblerX86::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1808,7 +1813,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::sbb(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1819,7 +1824,7 @@
EmitOperand(dst, address);
}
-void AssemblerX86::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (isByteSizedArithType(Ty)) {
EmitComplexI8(3, Operand(reg), imm);
@@ -1830,24 +1835,24 @@
EmitComplex(Ty, 3, Operand(reg), imm);
}
-void AssemblerX86::cbw() {
+void AssemblerX8632::cbw() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitOperandSizeOverride();
EmitUint8(0x98);
}
-void AssemblerX86::cwd() {
+void AssemblerX8632::cwd() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitOperandSizeOverride();
EmitUint8(0x99);
}
-void AssemblerX86::cdq() {
+void AssemblerX8632::cdq() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x99);
}
-void AssemblerX86::div(Type Ty, GPRRegister reg) {
+void AssemblerX8632::div(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1858,7 +1863,7 @@
EmitRegisterOperand(6, reg);
}
-void AssemblerX86::div(Type Ty, const Address &addr) {
+void AssemblerX8632::div(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1869,7 +1874,7 @@
EmitOperand(6, addr);
}
-void AssemblerX86::idiv(Type Ty, GPRRegister reg) {
+void AssemblerX8632::idiv(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1880,7 +1885,7 @@
EmitRegisterOperand(7, reg);
}
-void AssemblerX86::idiv(Type Ty, const Address &addr) {
+void AssemblerX8632::idiv(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1891,7 +1896,7 @@
EmitOperand(7, addr);
}
-void AssemblerX86::imul(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::imul(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -1901,7 +1906,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::imul(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -1911,7 +1916,7 @@
EmitOperand(reg, address);
}
-void AssemblerX86::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -1927,7 +1932,7 @@
}
}
-void AssemblerX86::imul(Type Ty, GPRRegister reg) {
+void AssemblerX8632::imul(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1938,7 +1943,7 @@
EmitRegisterOperand(5, reg);
}
-void AssemblerX86::imul(Type Ty, const Address &address) {
+void AssemblerX8632::imul(Type Ty, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1949,7 +1954,7 @@
EmitOperand(5, address);
}
-void AssemblerX86::mul(Type Ty, GPRRegister reg) {
+void AssemblerX8632::mul(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1960,7 +1965,7 @@
EmitRegisterOperand(4, reg);
}
-void AssemblerX86::mul(Type Ty, const Address &address) {
+void AssemblerX8632::mul(Type Ty, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -1971,77 +1976,77 @@
EmitOperand(4, address);
}
-void AssemblerX86::incl(GPRRegister reg) {
+void AssemblerX8632::incl(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x40 + reg);
}
-void AssemblerX86::incl(const Address &address) {
+void AssemblerX8632::incl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xFF);
EmitOperand(0, address);
}
-void AssemblerX86::decl(GPRRegister reg) {
+void AssemblerX8632::decl(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x48 + reg);
}
-void AssemblerX86::decl(const Address &address) {
+void AssemblerX8632::decl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xFF);
EmitOperand(1, address);
}
-void AssemblerX86::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
EmitGenericShift(0, Ty, reg, imm);
}
-void AssemblerX86::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
+void AssemblerX8632::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
EmitGenericShift(0, Ty, Operand(operand), shifter);
}
-void AssemblerX86::rol(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::rol(Type Ty, const Address &operand, GPRRegister shifter) {
EmitGenericShift(0, Ty, operand, shifter);
}
-void AssemblerX86::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
EmitGenericShift(4, Ty, reg, imm);
}
-void AssemblerX86::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
+void AssemblerX8632::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
EmitGenericShift(4, Ty, Operand(operand), shifter);
}
-void AssemblerX86::shl(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::shl(Type Ty, const Address &operand, GPRRegister shifter) {
EmitGenericShift(4, Ty, operand, shifter);
}
-void AssemblerX86::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
EmitGenericShift(5, Ty, reg, imm);
}
-void AssemblerX86::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
+void AssemblerX8632::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
EmitGenericShift(5, Ty, Operand(operand), shifter);
}
-void AssemblerX86::shr(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::shr(Type Ty, const Address &operand, GPRRegister shifter) {
EmitGenericShift(5, Ty, operand, shifter);
}
-void AssemblerX86::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
+void AssemblerX8632::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
EmitGenericShift(7, Ty, reg, imm);
}
-void AssemblerX86::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
+void AssemblerX8632::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
EmitGenericShift(7, Ty, Operand(operand), shifter);
}
-void AssemblerX86::sar(Type Ty, const Address &address, GPRRegister shifter) {
+void AssemblerX8632::sar(Type Ty, const Address &address, GPRRegister shifter) {
EmitGenericShift(7, Ty, address, shifter);
}
-void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2051,8 +2056,8 @@
EmitRegisterOperand(src, dst);
}
-void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src,
- const Immediate &imm) {
+void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
assert(imm.is_int8());
@@ -2064,7 +2069,7 @@
EmitUint8(imm.value() & 0xFF);
}
-void AssemblerX86::shld(Type Ty, const Address &operand, GPRRegister src) {
+void AssemblerX8632::shld(Type Ty, const Address &operand, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2074,7 +2079,7 @@
EmitOperand(src, operand);
}
-void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2084,8 +2089,8 @@
EmitRegisterOperand(src, dst);
}
-void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src,
- const Immediate &imm) {
+void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
assert(imm.is_int8());
@@ -2097,7 +2102,7 @@
EmitUint8(imm.value() & 0xFF);
}
-void AssemblerX86::shrd(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8632::shrd(Type Ty, const Address &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2107,7 +2112,7 @@
EmitOperand(src, dst);
}
-void AssemblerX86::neg(Type Ty, GPRRegister reg) {
+void AssemblerX8632::neg(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -2118,7 +2123,7 @@
EmitRegisterOperand(3, reg);
}
-void AssemblerX86::neg(Type Ty, const Address &addr) {
+void AssemblerX8632::neg(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -2129,13 +2134,13 @@
EmitOperand(3, addr);
}
-void AssemblerX86::notl(GPRRegister reg) {
+void AssemblerX8632::notl(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF7);
EmitUint8(0xD0 | reg);
}
-void AssemblerX86::bswap(Type Ty, GPRRegister reg) {
+void AssemblerX8632::bswap(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i32);
(void)Ty;
@@ -2143,7 +2148,7 @@
EmitUint8(0xC8 | reg);
}
-void AssemblerX86::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2153,7 +2158,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::bsf(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2163,7 +2168,7 @@
EmitOperand(dst, src);
}
-void AssemblerX86::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
+void AssemblerX8632::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2173,7 +2178,7 @@
EmitRegisterOperand(dst, src);
}
-void AssemblerX86::bsr(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2183,19 +2188,19 @@
EmitOperand(dst, src);
}
-void AssemblerX86::bt(GPRRegister base, GPRRegister offset) {
+void AssemblerX8632::bt(GPRRegister base, GPRRegister offset) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xA3);
EmitRegisterOperand(offset, base);
}
-void AssemblerX86::ret() {
+void AssemblerX8632::ret() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xC3);
}
-void AssemblerX86::ret(const Immediate &imm) {
+void AssemblerX8632::ret(const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xC2);
assert(imm.is_uint16());
@@ -2203,7 +2208,7 @@
EmitUint8((imm.value() >> 8) & 0xFF);
}
-void AssemblerX86::nop(int size) {
+void AssemblerX8632::nop(int size) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
// There are nops up to size 15, but for now just provide up to size 8.
assert(0 < size && size <= MAX_NOP_SIZE);
@@ -2265,23 +2270,23 @@
}
}
-void AssemblerX86::int3() {
+void AssemblerX8632::int3() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xCC);
}
-void AssemblerX86::hlt() {
+void AssemblerX8632::hlt() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF4);
}
-void AssemblerX86::ud2() {
+void AssemblerX8632::ud2() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x0B);
}
-void AssemblerX86::j(CondX86::BrCond condition, Label *label, bool near) {
+void AssemblerX8632::j(CondX86::BrCond condition, Label *label, bool near) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (label->IsBound()) {
static const int kShortSize = 2;
@@ -2313,8 +2318,8 @@
}
}
-void AssemblerX86::j(CondX86::BrCond condition,
- const ConstantRelocatable *label) {
+void AssemblerX8632::j(CondX86::BrCond condition,
+ const ConstantRelocatable *label) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0x80 + condition);
@@ -2322,13 +2327,13 @@
EmitInt32(-4);
}
-void AssemblerX86::jmp(GPRRegister reg) {
+void AssemblerX8632::jmp(GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xFF);
EmitRegisterOperand(4, reg);
}
-void AssemblerX86::jmp(Label *label, bool near) {
+void AssemblerX8632::jmp(Label *label, bool near) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (label->IsBound()) {
static const int kShortSize = 2;
@@ -2351,27 +2356,27 @@
}
}
-void AssemblerX86::jmp(const ConstantRelocatable *label) {
+void AssemblerX8632::jmp(const ConstantRelocatable *label) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xE9);
EmitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
EmitInt32(-4);
}
-void AssemblerX86::mfence() {
+void AssemblerX8632::mfence() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);
EmitUint8(0xAE);
EmitUint8(0xF0);
}
-void AssemblerX86::lock() {
+void AssemblerX8632::lock() {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0xF0);
}
-void AssemblerX86::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
- bool Locked) {
+void AssemblerX8632::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
+ bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -2385,7 +2390,7 @@
EmitOperand(reg, address);
}
-void AssemblerX86::cmpxchg8b(const Address &address, bool Locked) {
+void AssemblerX8632::cmpxchg8b(const Address &address, bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Locked)
EmitUint8(0xF0);
@@ -2394,8 +2399,8 @@
EmitOperand(1, address);
}
-void AssemblerX86::xadd(Type Ty, const Address &addr, GPRRegister reg,
- bool Locked) {
+void AssemblerX8632::xadd(Type Ty, const Address &addr, GPRRegister reg,
+ bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -2409,7 +2414,7 @@
EmitOperand(reg, addr);
}
-void AssemblerX86::xchg(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8632::xchg(Type Ty, const Address &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
@@ -2420,12 +2425,12 @@
EmitOperand(reg, addr);
}
-void AssemblerX86::EmitSegmentOverride(uint8_t prefix) {
+void AssemblerX8632::EmitSegmentOverride(uint8_t prefix) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(prefix);
}
-void AssemblerX86::Align(intptr_t alignment, intptr_t offset) {
+void AssemblerX8632::Align(intptr_t alignment, intptr_t offset) {
assert(llvm::isPowerOf2_32(alignment));
intptr_t pos = offset + buffer_.GetPosition();
intptr_t mod = pos & (alignment - 1);
@@ -2443,7 +2448,7 @@
assert(((offset + buffer_.GetPosition()) & (alignment - 1)) == 0);
}
-void AssemblerX86::Bind(Label *label) {
+void AssemblerX8632::Bind(Label *label) {
intptr_t bound = buffer_.Size();
assert(!label->IsBound()); // Labels can only be bound once.
while (label->IsLinked()) {
@@ -2461,7 +2466,7 @@
label->BindTo(bound);
}
-void AssemblerX86::EmitOperand(int rm, const Operand &operand) {
+void AssemblerX8632::EmitOperand(int rm, const Operand &operand) {
assert(rm >= 0 && rm < 8);
const intptr_t length = operand.length_;
assert(length > 0);
@@ -2477,7 +2482,7 @@
}
}
-void AssemblerX86::EmitImmediate(Type Ty, const Immediate &imm) {
+void AssemblerX8632::EmitImmediate(Type Ty, const Immediate &imm) {
if (Ty == IceType_i16) {
assert(!imm.fixup());
EmitInt16(imm.value());
@@ -2489,8 +2494,8 @@
}
}
-void AssemblerX86::EmitComplexI8(int rm, const Operand &operand,
- const Immediate &immediate) {
+void AssemblerX8632::EmitComplexI8(int rm, const Operand &operand,
+ const Immediate &immediate) {
assert(rm >= 0 && rm < 8);
assert(immediate.is_int8());
if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
@@ -2505,8 +2510,8 @@
}
}
-void AssemblerX86::EmitComplex(Type Ty, int rm, const Operand &operand,
- const Immediate &immediate) {
+void AssemblerX8632::EmitComplex(Type Ty, int rm, const Operand &operand,
+ const Immediate &immediate) {
assert(rm >= 0 && rm < 8);
if (immediate.is_int8()) {
// Use sign-extended 8-bit immediate.
@@ -2524,7 +2529,7 @@
}
}
-void AssemblerX86::EmitLabel(Label *label, intptr_t instruction_size) {
+void AssemblerX8632::EmitLabel(Label *label, intptr_t instruction_size) {
if (label->IsBound()) {
intptr_t offset = label->Position() - buffer_.Size();
assert(offset <= 0);
@@ -2534,7 +2539,7 @@
}
}
-void AssemblerX86::EmitLabelLink(Label *label) {
+void AssemblerX8632::EmitLabelLink(Label *label) {
assert(!label->IsBound());
intptr_t position = buffer_.Size();
EmitInt32(label->position_);
@@ -2542,7 +2547,7 @@
label->LinkTo(position);
}
-void AssemblerX86::EmitNearLabelLink(Label *label) {
+void AssemblerX8632::EmitNearLabelLink(Label *label) {
assert(!label->IsBound());
intptr_t position = buffer_.Size();
EmitUint8(0);
@@ -2550,8 +2555,8 @@
label->NearLinkTo(position);
}
-void AssemblerX86::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
- const Immediate &imm) {
+void AssemblerX8632::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
+ const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(imm.is_int8());
if (Ty == IceType_i16)
@@ -2566,8 +2571,8 @@
}
}
-void AssemblerX86::EmitGenericShift(int rm, Type Ty, const Operand &operand,
- GPRRegister shifter) {
+void AssemblerX8632::EmitGenericShift(int rm, Type Ty, const Operand &operand,
+ GPRRegister shifter) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
assert(shifter == RegX8632::Encoded_Reg_ecx);
(void)shifter;
@@ -2577,5 +2582,5 @@
EmitOperand(rm, operand);
}
-} // end of namespace x86
+} // end of namespace X8632
} // end of namespace Ice
diff --git a/src/assembler_ia32.h b/src/assembler_ia32.h
index be19162..291ccdc 100644
--- a/src/assembler_ia32.h
+++ b/src/assembler_ia32.h
@@ -38,7 +38,7 @@
using RegX8632::ByteRegister;
using RegX8632::X87STRegister;
-namespace x86 {
+namespace X8632 {
const int MAX_NOP_SIZE = 8;
@@ -170,7 +170,7 @@
&& ((encoding_[0] & 0x07) == reg); // Register codes match.
}
- friend class AssemblerX86;
+ friend class AssemblerX8632;
};
class Address : public Operand {
@@ -330,20 +330,20 @@
// llvm::SmallVector<intptr_t, kMaxUnresolvedBranches> ?
intptr_t unresolved_near_positions_[kMaxUnresolvedBranches];
- friend class AssemblerX86;
+ friend class AssemblerX8632;
};
-class AssemblerX86 : public Assembler {
- AssemblerX86(const AssemblerX86 &) = delete;
- AssemblerX86 &operator=(const AssemblerX86 &) = delete;
+class AssemblerX8632 : public Assembler {
+ AssemblerX8632(const AssemblerX8632 &) = delete;
+ AssemblerX8632 &operator=(const AssemblerX8632 &) = delete;
public:
- explicit AssemblerX86(bool use_far_branches = false) : Assembler() {
+ explicit AssemblerX8632(bool use_far_branches = false) : Assembler() {
// This mode is only needed and implemented for MIPS and ARM.
assert(!use_far_branches);
(void)use_far_branches;
}
- ~AssemblerX86() override;
+ ~AssemblerX8632() override;
static const bool kNearJump = true;
static const bool kFarJump = false;
@@ -377,18 +377,19 @@
}
// Operations to emit GPR instructions (and dispatch on operand type).
- typedef void (AssemblerX86::*TypedEmitGPR)(Type, GPRRegister);
- typedef void (AssemblerX86::*TypedEmitAddr)(Type, const Address &);
+ typedef void (AssemblerX8632::*TypedEmitGPR)(Type, GPRRegister);
+ typedef void (AssemblerX8632::*TypedEmitAddr)(Type, const Address &);
struct GPREmitterOneOp {
TypedEmitGPR Reg;
TypedEmitAddr Addr;
};
- typedef void (AssemblerX86::*TypedEmitGPRGPR)(Type, GPRRegister, GPRRegister);
- typedef void (AssemblerX86::*TypedEmitGPRAddr)(Type, GPRRegister,
- const Address &);
- typedef void (AssemblerX86::*TypedEmitGPRImm)(Type, GPRRegister,
- const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitGPRGPR)(Type, GPRRegister,
+ GPRRegister);
+ typedef void (AssemblerX8632::*TypedEmitGPRAddr)(Type, GPRRegister,
+ const Address &);
+ typedef void (AssemblerX8632::*TypedEmitGPRImm)(Type, GPRRegister,
+ const Immediate &);
struct GPREmitterRegOp {
TypedEmitGPRGPR GPRGPR;
TypedEmitGPRAddr GPRAddr;
@@ -402,9 +403,9 @@
TypedEmitGPRImm GPRImm;
};
- typedef void (AssemblerX86::*TypedEmitGPRGPRImm)(Type, GPRRegister,
- GPRRegister,
- const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitGPRGPRImm)(Type, GPRRegister,
+ GPRRegister,
+ const Immediate &);
struct GPREmitterShiftD {
// Technically AddrGPR and AddrGPRImm are also allowed, but in practice
// we always normalize Dest to a Register first.
@@ -412,35 +413,36 @@
TypedEmitGPRGPRImm GPRGPRImm;
};
- typedef void (AssemblerX86::*TypedEmitAddrGPR)(Type, const Address &,
- GPRRegister);
- typedef void (AssemblerX86::*TypedEmitAddrImm)(Type, const Address &,
- const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitAddrGPR)(Type, const Address &,
+ GPRRegister);
+ typedef void (AssemblerX8632::*TypedEmitAddrImm)(Type, const Address &,
+ const Immediate &);
struct GPREmitterAddrOp {
TypedEmitAddrGPR AddrGPR;
TypedEmitAddrImm AddrImm;
};
// Operations to emit XMM instructions (and dispatch on operand type).
- typedef void (AssemblerX86::*TypedEmitXmmXmm)(Type, XmmRegister, XmmRegister);
- typedef void (AssemblerX86::*TypedEmitXmmAddr)(Type, XmmRegister,
- const Address &);
+ typedef void (AssemblerX8632::*TypedEmitXmmXmm)(Type, XmmRegister,
+ XmmRegister);
+ typedef void (AssemblerX8632::*TypedEmitXmmAddr)(Type, XmmRegister,
+ const Address &);
struct XmmEmitterRegOp {
TypedEmitXmmXmm XmmXmm;
TypedEmitXmmAddr XmmAddr;
};
- typedef void (AssemblerX86::*EmitXmmXmm)(XmmRegister, XmmRegister);
- typedef void (AssemblerX86::*EmitXmmAddr)(XmmRegister, const Address &);
- typedef void (AssemblerX86::*EmitAddrXmm)(const Address &, XmmRegister);
+ typedef void (AssemblerX8632::*EmitXmmXmm)(XmmRegister, XmmRegister);
+ typedef void (AssemblerX8632::*EmitXmmAddr)(XmmRegister, const Address &);
+ typedef void (AssemblerX8632::*EmitAddrXmm)(const Address &, XmmRegister);
struct XmmEmitterMovOps {
EmitXmmXmm XmmXmm;
EmitXmmAddr XmmAddr;
EmitAddrXmm AddrXmm;
};
- typedef void (AssemblerX86::*TypedEmitXmmImm)(Type, XmmRegister,
- const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitXmmImm)(Type, XmmRegister,
+ const Immediate &);
struct XmmEmitterShiftOp {
TypedEmitXmmXmm XmmXmm;
@@ -450,8 +452,9 @@
// Cross Xmm/GPR cast instructions.
template <typename DReg_t, typename SReg_t> struct CastEmitterRegOp {
- typedef void (AssemblerX86::*TypedEmitRegs)(Type, DReg_t, SReg_t);
- typedef void (AssemblerX86::*TypedEmitAddr)(Type, DReg_t, const Address &);
+ typedef void (AssemblerX8632::*TypedEmitRegs)(Type, DReg_t, SReg_t);
+ typedef void (AssemblerX8632::*TypedEmitAddr)(Type, DReg_t,
+ const Address &);
TypedEmitRegs RegReg;
TypedEmitAddr RegAddr;
@@ -460,11 +463,11 @@
// Three operand (potentially) cross Xmm/GPR instructions.
// The last operand must be an immediate.
template <typename DReg_t, typename SReg_t> struct ThreeOpImmEmitter {
- typedef void (AssemblerX86::*TypedEmitRegRegImm)(Type, DReg_t, SReg_t,
- const Immediate &);
- typedef void (AssemblerX86::*TypedEmitRegAddrImm)(Type, DReg_t,
- const Address &,
- const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitRegRegImm)(Type, DReg_t, SReg_t,
+ const Immediate &);
+ typedef void (AssemblerX8632::*TypedEmitRegAddrImm)(Type, DReg_t,
+ const Address &,
+ const Immediate &);
TypedEmitRegRegImm RegRegImm;
TypedEmitRegAddrImm RegAddrImm;
@@ -853,34 +856,34 @@
Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
};
-inline void AssemblerX86::EmitUint8(uint8_t value) {
+inline void AssemblerX8632::EmitUint8(uint8_t value) {
buffer_.Emit<uint8_t>(value);
}
-inline void AssemblerX86::EmitInt16(int16_t value) {
+inline void AssemblerX8632::EmitInt16(int16_t value) {
buffer_.Emit<int16_t>(value);
}
-inline void AssemblerX86::EmitInt32(int32_t value) {
+inline void AssemblerX8632::EmitInt32(int32_t value) {
buffer_.Emit<int32_t>(value);
}
-inline void AssemblerX86::EmitRegisterOperand(int rm, int reg) {
+inline void AssemblerX8632::EmitRegisterOperand(int rm, int reg) {
assert(rm >= 0 && rm < 8);
buffer_.Emit<uint8_t>(0xC0 + (rm << 3) + reg);
}
-inline void AssemblerX86::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
+inline void AssemblerX8632::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
EmitRegisterOperand(rm, static_cast<GPRRegister>(reg));
}
-inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) {
+inline void AssemblerX8632::EmitFixup(AssemblerFixup *fixup) {
buffer_.EmitFixup(fixup);
}
-inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); }
+inline void AssemblerX8632::EmitOperandSizeOverride() { EmitUint8(0x66); }
-} // end of namespace x86
+} // end of namespace X8632
} // end of namespace Ice
#endif // SUBZERO_SRC_ASSEMBLER_IA32_H
