commit 89d7956d7dcc007fa29bea5c64150602feab47ee
author Jim Stichnoth <stichnot@chromium.org> Wed Aug 27 13:50:03 2014 -0700
committer Jim Stichnoth <stichnot@chromium.org> Wed Aug 27 13:50:03 2014 -0700
tree bcc538b74610b509103aa5350e18ba72b4a3782b
parent 14c3f417815e19f91706fafa779faca457fa35da

Subzero: Fix address mode optimization involving phi temporaries.

Also adds much-needed logging of the decision process that goes into the address mode optimization.

BUG= none
R=jvoung@chromium.org

Review URL: https://codereview.chromium.org/490333003

src/IceTargetLoweringX8632.cpp

diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index 7ed8abf..b4e1b3e 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -2607,13 +2607,13 @@
   if (InstBr *NextBr = llvm::dyn_cast_or_null<InstBr>(Context.getNextInst())) {
     if (Src0->getType() != IceType_i64 && !NextBr->isUnconditional() &&
         Dest == NextBr->getSrc(0) && NextBr->isLastUse(Dest)) {
+      NextBr->setDeleted();
       Operand *Src0RM = legalize(
           Src0, IsSrc1ImmOrReg ? (Legal_Reg | Legal_Mem) : Legal_Reg, true);
       _cmp(Src0RM, Src1);
       _br(getIcmp32Mapping(Inst->getCondition()), NextBr->getTargetTrue(),
           NextBr->getTargetFalse());
       // Skip over the following branch instruction.
-      NextBr->setDeleted();
       Context.advanceNext();
       return;
     }
@@ -3194,8 +3194,8 @@
           // Lower the phi assignments now, before the branch (same placement
           // as before).
           InstAssign *PhiAssign = PhiAssigns[i];
-          lowerAssign(PhiAssign);
           PhiAssign->setDeleted();
+          lowerAssign(PhiAssign);
           Context.advanceNext();
         }
         _br(InstX8632::Br_e, NextBr->getTargetTrue(), NextBr->getTargetFalse());
@@ -3482,8 +3482,35 @@
   return false;
 }
 
-void computeAddressOpt(Variable *&Base, Variable *&Index, uint16_t &Shift,
-                       int32_t &Offset) {
+void dumpAddressOpt(const Cfg *Func, const Variable *Base,
+                    const Variable *Index, uint16_t Shift, int32_t Offset,
+                    const Inst *Reason) {
+  if (!Func->getContext()->isVerbose(IceV_AddrOpt))
+    return;
+  Ostream &Str = Func->getContext()->getStrDump();
+  Str << "Instruction: ";
+  Reason->dumpDecorated(Func);
+  Str << "  results in Base=";
+  if (Base)
+    Base->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Index=";
+  if (Index)
+    Index->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Shift=" << Shift << ", Offset=" << Offset << "\n";
+}
+
+void computeAddressOpt(Cfg *Func, const Inst *Instr, Variable *&Base,
+                       Variable *&Index, uint16_t &Shift, int32_t &Offset) {
+  Func->setCurrentNode(NULL);
+  if (Func->getContext()->isVerbose(IceV_AddrOpt)) {
+    Ostream &Str = Func->getContext()->getStrDump();
+    Str << "\nStarting computeAddressOpt for instruction:\n  ";
+    Instr->dumpDecorated(Func);
+  }
   (void)Offset; // TODO: pattern-match for non-zero offsets.
   if (Base == NULL)
     return;
@@ -3506,6 +3533,7 @@
         // TODO: ensure BaseVariable0 stays single-BB
         true) {
       Base = BaseVariable0;
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
@@ -3523,6 +3551,7 @@
       Base = BaseVariable0;
       Index = BaseVariable1;
       Shift = 0; // should already have been 0
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
@@ -3560,6 +3589,7 @@
         if (Shift + LogMult <= 3) {
           Index = IndexVariable0;
           Shift += LogMult;
+          dumpAddressOpt(Func, Base, Index, Shift, Offset, IndexInst);
           continue;
         }
       }
@@ -3589,6 +3619,7 @@
       }
       Base = Var;
       Offset += IsAdd ? Const->getValue() : -Const->getValue();
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
@@ -3684,12 +3715,12 @@
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
+    Inst->setDeleted();
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Dest->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
-    Inst->setDeleted();
     Context.insert(InstLoad::create(Func, Dest, Addr));
   }
 }
@@ -3866,12 +3897,12 @@
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
+    Inst->setDeleted();
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Data->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
-    Inst->setDeleted();
     Context.insert(InstStore::create(Func, Data, Addr));
   }
 }
@@ -3943,9 +3974,9 @@
           llvm::dyn_cast_or_null<InstCast>(Context.getNextInst())) {
     if (NextCast->getCastKind() == InstCast::Sext &&
         NextCast->getSrc(0) == SignExtendedResult) {
+      NextCast->setDeleted();
       _movp(NextCast->getDest(), legalizeToVar(SignExtendedResult));
       // Skip over the instruction.
-      NextCast->setDeleted();
       Context.advanceNext();
     }
   }