Subzero: Clean up function header emission.
1. Don't do anything in Cfg::emitTextHeader() in MINIMAL mode. (Reduces binary size by 1KB.) This actually broke a number of lit tests for the MINIMAL build, so "--assemble --disassemble" was changed to "--filetype=obj --disassemble". This allowed (or required) better precision in checking for data symbols.
1a. For the lit files touched, go ahead and remove "-verbose none" since that will forevermore by the default.
2. Don't emit the ".bundle_align_mode" directive. This is not
necessary when assembling with the right -triple argument.
BUG= none
R=jvoung@chromium.org, kschimpf@google.com
Review URL: https://codereview.chromium.org/955003002
diff --git a/src/IceCfg.cpp b/src/IceCfg.cpp
index 2900a76..2a1fdb6 100644
--- a/src/IceCfg.cpp
+++ b/src/IceCfg.cpp
@@ -423,7 +423,8 @@
// the target lowering class.
void Cfg::emitTextHeader(const IceString &MangledName, GlobalContext *Ctx,
const Assembler *Asm) {
- // Note: Still used by emit IAS.
+ if (!ALLOW_DUMP)
+ return;
Ostream &Str = Ctx->getStrEmit();
Str << "\t.text\n";
if (Ctx->getFlags().getFunctionSections())
@@ -436,8 +437,6 @@
for (uint8_t I : Asm->getNonExecBundlePadding())
Str.write_hex(I);
Str << "\n";
- if (Ctx->getFlags().getUseSandboxing())
- Str << "\t.bundle_align_mode " << Asm->getBundleAlignLog2Bytes() << "\n";
Str << MangledName << ":\n";
}
diff --git a/src/IceELFObjectWriter.cpp b/src/IceELFObjectWriter.cpp
index b8f678e..ff68ba2 100644
--- a/src/IceELFObjectWriter.cpp
+++ b/src/IceELFObjectWriter.cpp
@@ -370,6 +370,8 @@
if (!Var->hasInitializer())
continue;
Elf64_Xword Align = Var->getAlignment();
+ const Elf64_Xword MinAlign = 1;
+ Align = std::max(Align, MinAlign);
Section->padToAlignment(Str, Align);
SizeT SymbolSize = Var->getNumBytes();
bool IsExternal = Var->isExternal() || Ctx.getFlags().getDisableInternal();
diff --git a/tests_lit/assembler/x86/immediate_encodings.ll b/tests_lit/assembler/x86/immediate_encodings.ll
index 2dc7710..c829f1b 100644
--- a/tests_lit/assembler/x86/immediate_encodings.ll
+++ b/tests_lit/assembler/x86/immediate_encodings.ll
@@ -2,8 +2,7 @@
; For example, the encoding is shorter for 8-bit immediates or when using EAX.
; This assumes that EAX is chosen as the first free register in O2 mode.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
define internal i32 @testXor8Imm8(i32 %arg) {
entry:
diff --git a/tests_lit/assembler/x86/jump_encodings.ll b/tests_lit/assembler/x86/jump_encodings.ll
index d594ae9..d94be0a 100644
--- a/tests_lit/assembler/x86/jump_encodings.ll
+++ b/tests_lit/assembler/x86/jump_encodings.ll
@@ -2,7 +2,7 @@
; forward vs backward, using CFG labels, or local labels).
; Use -ffunction-sections so that the offsets reset for each function.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: -ffunction-sections | FileCheck %s
; Use atomic ops as filler, which shouldn't get optimized out.
diff --git a/tests_lit/assembler/x86/opcode_register_encodings.ll b/tests_lit/assembler/x86/opcode_register_encodings.ll
index 642e034..bc98b04 100644
--- a/tests_lit/assembler/x86/opcode_register_encodings.ll
+++ b/tests_lit/assembler/x86/opcode_register_encodings.ll
@@ -2,8 +2,8 @@
; those for pmull vary more wildly depending on operand size (rather than
; follow a usual pattern).
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 -mattr=sse4.1 -sandbox \
-; RUN: --verbose none | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 -mattr=sse4.1 \
+; RUN: -sandbox | FileCheck %s
define <8 x i16> @test_mul_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {
entry:
diff --git a/tests_lit/assembler/x86/sandboxing.ll b/tests_lit/assembler/x86/sandboxing.ll
index 5eeb57f..2b33d40 100644
--- a/tests_lit/assembler/x86/sandboxing.ll
+++ b/tests_lit/assembler/x86/sandboxing.ll
@@ -3,7 +3,7 @@
; we try to limit to a few instructions with well known sizes and
; minimal use of registers and stack slots in the lowering sequence.
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: -ffunction-sections -sandbox | FileCheck %s
declare void @call_target()
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
index e4f4cb0..d0bcf83 100644
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
@@ -2,9 +2,9 @@
; particular the patterns for lowering i64 operations into constituent
; i32 operations on x86-32.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
diff --git a/tests_lit/llvm2ice_tests/8bit.pnacl.ll b/tests_lit/llvm2ice_tests/8bit.pnacl.ll
index a60512d..e47a709 100644
--- a/tests_lit/llvm2ice_tests/8bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/8bit.pnacl.ll
@@ -1,9 +1,7 @@
; This tries to be a comprehensive test of i8 operations.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
define internal i32 @add8Bit(i32 %a, i32 %b) {
entry:
diff --git a/tests_lit/llvm2ice_tests/address-mode-opt.ll b/tests_lit/llvm2ice_tests/address-mode-opt.ll
index 6b40f26..c8c2802 100644
--- a/tests_lit/llvm2ice_tests/address-mode-opt.ll
+++ b/tests_lit/llvm2ice_tests/address-mode-opt.ll
@@ -1,9 +1,9 @@
; This file checks support for address mode optimization.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
define float @load_arg_plus_200000(float* %arg) {
entry:
diff --git a/tests_lit/llvm2ice_tests/align-spill-locations.ll b/tests_lit/llvm2ice_tests/align-spill-locations.ll
index 9092596..62770e7 100644
--- a/tests_lit/llvm2ice_tests/align-spill-locations.ll
+++ b/tests_lit/llvm2ice_tests/align-spill-locations.ll
@@ -1,9 +1,7 @@
; This checks to ensure that Subzero aligns spill slots.
-; RUN: %p2i --assemble --disassemble -i %s --args --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
; The location of the stack slot for a variable is inferred from the
; return sequence.
diff --git a/tests_lit/llvm2ice_tests/alloc.ll b/tests_lit/llvm2ice_tests/alloc.ll
index bf9dfde..ce197cc 100644
--- a/tests_lit/llvm2ice_tests/alloc.ll
+++ b/tests_lit/llvm2ice_tests/alloc.ll
@@ -1,9 +1,7 @@
; This is a basic test of the alloca instruction.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
define void @fixed_416_align_16(i32 %n) {
entry:
diff --git a/tests_lit/llvm2ice_tests/bitcast.ll b/tests_lit/llvm2ice_tests/bitcast.ll
index 2a1e4cd..3e7c778 100644
--- a/tests_lit/llvm2ice_tests/bitcast.ll
+++ b/tests_lit/llvm2ice_tests/bitcast.ll
@@ -1,9 +1,7 @@
; Trivial smoke test of bitcast between integer and FP types.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
define internal i32 @cast_f2i(float %f) {
entry:
diff --git a/tests_lit/llvm2ice_tests/bool-opt.ll b/tests_lit/llvm2ice_tests/bool-opt.ll
index 79760a6..a574758 100644
--- a/tests_lit/llvm2ice_tests/bool-opt.ll
+++ b/tests_lit/llvm2ice_tests/bool-opt.ll
@@ -1,6 +1,6 @@
; Trivial smoke test of icmp without fused branch opportunity.
-; RUN: %p2i -i %s --args --verbose none | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args | FileCheck %s
; Check that correct addressing modes are used for comparing two
; immediates.
diff --git a/tests_lit/llvm2ice_tests/branch-opt.ll b/tests_lit/llvm2ice_tests/branch-opt.ll
index ad8ea9a..580a900 100644
--- a/tests_lit/llvm2ice_tests/branch-opt.ll
+++ b/tests_lit/llvm2ice_tests/branch-opt.ll
@@ -1,9 +1,9 @@
; Tests the branch optimizations under O2 (against a lack of
; optimizations under Om1).
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: | FileCheck --check-prefix=O2 %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
; RUN: | FileCheck --check-prefix=OM1 %s
declare void @dummy()
diff --git a/tests_lit/llvm2ice_tests/callindirect.pnacl.ll b/tests_lit/llvm2ice_tests/callindirect.pnacl.ll
index b6c70ed..dfa605b 100644
--- a/tests_lit/llvm2ice_tests/callindirect.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/callindirect.pnacl.ll
@@ -2,9 +2,9 @@
; should be to the same operand, whether it's in a register or on the
; stack.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
diff --git a/tests_lit/llvm2ice_tests/cmp-opt.ll b/tests_lit/llvm2ice_tests/cmp-opt.ll
index 339d2f8..99c2efd 100644
--- a/tests_lit/llvm2ice_tests/cmp-opt.ll
+++ b/tests_lit/llvm2ice_tests/cmp-opt.ll
@@ -1,8 +1,8 @@
; Simple test of non-fused compare/branch.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
define void @testBool(i32 %a, i32 %b) {
diff --git a/tests_lit/llvm2ice_tests/convert.ll b/tests_lit/llvm2ice_tests/convert.ll
index 86d69eb..7f03994 100644
--- a/tests_lit/llvm2ice_tests/convert.ll
+++ b/tests_lit/llvm2ice_tests/convert.ll
@@ -1,9 +1,7 @@
; Simple test of signed and unsigned integer conversions.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
@i8v = internal global [1 x i8] zeroinitializer, align 1
@i16v = internal global [2 x i8] zeroinitializer, align 2
@@ -37,9 +35,8 @@
; CHECK: mov DWORD PTR
; CHECK: movsx
; CHECK: sar {{.*}},0x1f
-; This appears to be a bug in llvm-mc. It should be i64v and i64+4.
-; CHECK-DAG: .bss
-; CHECK-DAG: .bss
+; CHECK-DAG: ds:0x0,{{.*}}i64v
+; CHECK-DAG: ds:0x4,{{.*}}i64v
define void @from_int16() {
entry:
@@ -58,12 +55,12 @@
}
; CHECK-LABEL: from_int16
; CHECK: mov {{.*}},WORD PTR
-; CHECK: .bss
+; CHECK: 0x0 {{.*}}i16v
; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}}
-; CHECK: .bss
+; CHECK: 0x0,{{.*}}i32v
; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}}
; CHECK: sar {{.*}},0x1f
-; CHECK: .bss
+; CHECK: 0x0,{{.*}}i64v
define void @from_int32() {
entry:
@@ -81,11 +78,11 @@
ret void
}
; CHECK-LABEL: from_int32
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} i32v
+; CHECK: 0x0,{{.*}} i8v
+; CHECK: 0x0,{{.*}} i16v
; CHECK: sar {{.*}},0x1f
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i64v
define void @from_int64() {
entry:
@@ -103,10 +100,10 @@
ret void
}
; CHECK-LABEL: from_int64
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} i64v
+; CHECK: 0x0,{{.*}} i8v
+; CHECK: 0x0,{{.*}} i16v
+; CHECK: 0x0,{{.*}} i32v
define void @from_uint8() {
@@ -125,14 +122,14 @@
ret void
}
; CHECK-LABEL: from_uint8
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} u8v
; CHECK: movzx e{{.*}},{{[a-d]l|BYTE PTR}}
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i16v
; CHECK: movzx
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i32v
; CHECK: movzx
; CHECK: mov {{.*}},0x0
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i64v
define void @from_uint16() {
entry:
@@ -150,13 +147,13 @@
ret void
}
; CHECK-LABEL: from_uint16
-; CHECK: .bss
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} u16v
+; CHECK: 0x0,{{.*}} i8v
; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}}
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i32v
; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}}
; CHECK: mov {{.*}},0x0
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i64v
define void @from_uint32() {
entry:
@@ -174,11 +171,11 @@
ret void
}
; CHECK-LABEL: from_uint32
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} u32v
+; CHECK: 0x0,{{.*}} i8v
+; CHECK: 0x0,{{.*}} i16v
; CHECK: mov {{.*}},0x0
-; CHECK: .bss
+; CHECK: 0x0,{{.*}} i64v
define void @from_uint64() {
entry:
@@ -196,7 +193,7 @@
ret void
}
; CHECK-LABEL: from_uint64
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
-; CHECK: .bss
+; CHECK: 0x0 {{.*}} u64v
+; CHECK: 0x0,{{.*}} i8v
+; CHECK: 0x0,{{.*}} i16v
+; CHECK: 0x0,{{.*}} i32v
diff --git a/tests_lit/llvm2ice_tests/div_legalization.ll b/tests_lit/llvm2ice_tests/div_legalization.ll
index 9e1f774..dec388d 100644
--- a/tests_lit/llvm2ice_tests/div_legalization.ll
+++ b/tests_lit/llvm2ice_tests/div_legalization.ll
@@ -1,10 +1,8 @@
; This is a regression test that idiv and div operands are legalized
; (they cannot be constants and can only be reg/mem for x86).
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
define i32 @Sdiv_const8_b(i8 %a) {
; CHECK-LABEL: Sdiv_const8_b
diff --git a/tests_lit/llvm2ice_tests/ebp_args.ll b/tests_lit/llvm2ice_tests/ebp_args.ll
index 6533fbb..6cbf334 100644
--- a/tests_lit/llvm2ice_tests/ebp_args.ll
+++ b/tests_lit/llvm2ice_tests/ebp_args.ll
@@ -3,8 +3,7 @@
; adjustment was incorrectly added to the stack/frame offset for
; ebp-based frames.
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
declare i32 @memcpy_helper2(i32 %buf, i32 %buf2, i32 %n)
diff --git a/tests_lit/llvm2ice_tests/elf_function_sections.ll b/tests_lit/llvm2ice_tests/elf_function_sections.ll
index 599eb20..36ee1b0 100644
--- a/tests_lit/llvm2ice_tests/elf_function_sections.ll
+++ b/tests_lit/llvm2ice_tests/elf_function_sections.ll
@@ -1,14 +1,17 @@
; Tests filetype=obj with -ffunction-sections.
-; RUN: %p2i -i %s --filetype=obj --args -O2 --verbose none -o %t \
-; RUN: -ffunction-sections && \
+; RUN: %p2i -i %s --filetype=obj --args -O2 -o %t -ffunction-sections && \
; RUN: llvm-readobj -file-headers -sections -section-data \
; RUN: -relocations -symbols %t | FileCheck %s
-; RUN: %p2i -i %s --args -O2 --verbose none -ffunction-sections \
-; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj -o - \
-; RUN: | llvm-readobj -file-headers -sections -section-data \
-; RUN: -relocations -symbols - | FileCheck %s
+; RUN: %if --need=allow_dump --command \
+; RUN: %p2i -i %s --args -O2 -ffunction-sections \
+; RUN: | %if --need=allow_dump --command \
+; RUN: llvm-mc -triple=i686-none-nacl -filetype=obj -o - \
+; RUN: | %if --need=allow_dump --command \
+; RUN: llvm-readobj -file-headers -sections -section-data \
+; RUN: -relocations -symbols - \
+; RUN: | %if --need=allow_dump --command FileCheck %s
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
diff --git a/tests_lit/llvm2ice_tests/elf_nodata.ll b/tests_lit/llvm2ice_tests/elf_nodata.ll
index 14e1083..a28639a 100644
--- a/tests_lit/llvm2ice_tests/elf_nodata.ll
+++ b/tests_lit/llvm2ice_tests/elf_nodata.ll
@@ -1,14 +1,17 @@
; Tests that we generate an ELF container correctly when there
; is no data section.
-; RUN: %p2i -i %s --filetype=obj --args -O2 --verbose none -o %t \
+; RUN: %p2i -i %s --filetype=obj --args -O2 -o %t \
; RUN: && llvm-readobj -file-headers -sections -section-data \
; RUN: -relocations -symbols %t | FileCheck %s
-; RUN: %p2i -i %s --args -O2 --verbose none \
-; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj -o - \
-; RUN: | llvm-readobj -file-headers -sections -section-data \
-; RUN: -relocations -symbols - | FileCheck %s
+; RUN: %if --need=allow_dump --command %p2i -i %s --args -O2 \
+; RUN: | %if --need=allow_dump --command \
+; RUN: llvm-mc -triple=i686-none-nacl -filetype=obj -o - \
+; RUN: | %if --need=allow_dump --command \
+; RUN: llvm-readobj -file-headers -sections -section-data \
+; RUN: -relocations -symbols - \
+; RUN: | %if --need=allow_dump --command FileCheck %s
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
diff --git a/tests_lit/llvm2ice_tests/fp.pnacl.ll b/tests_lit/llvm2ice_tests/fp.pnacl.ll
index 1beb3eb..ad898af 100644
--- a/tests_lit/llvm2ice_tests/fp.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/fp.pnacl.ll
@@ -3,10 +3,8 @@
; that should be present regardless of the optimization level, so
; there are no special OPTM1 match lines.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
@__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
diff --git a/tests_lit/llvm2ice_tests/fpcall.ll b/tests_lit/llvm2ice_tests/fpcall.ll
index 5f737ae..969ca8d 100644
--- a/tests_lit/llvm2ice_tests/fpcall.ll
+++ b/tests_lit/llvm2ice_tests/fpcall.ll
@@ -3,10 +3,8 @@
; particular, the top-of-stack must be popped regardless of whether
; its value is used.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i --assemble --disassemble -i %s --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
declare float @dummy()
diff --git a/tests_lit/llvm2ice_tests/function_aligned.ll b/tests_lit/llvm2ice_tests/function_aligned.ll
index 44bdf08..02b460b 100644
--- a/tests_lit/llvm2ice_tests/function_aligned.ll
+++ b/tests_lit/llvm2ice_tests/function_aligned.ll
@@ -3,8 +3,7 @@
; but typically you want to align functions anyway.
; Also, we are currently using hlts for non-executable padding.
-; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
define void @foo() {
ret void
diff --git a/tests_lit/llvm2ice_tests/ias-multi-reloc.ll b/tests_lit/llvm2ice_tests/ias-multi-reloc.ll
index 2d3f6bf..8de1b36 100644
--- a/tests_lit/llvm2ice_tests/ias-multi-reloc.ll
+++ b/tests_lit/llvm2ice_tests/ias-multi-reloc.ll
@@ -1,7 +1,8 @@
; Tests the integrated assembler for instructions with multiple
; relocations.
-; RUN: %p2i -i %s --args -O2 | FileCheck %s
+; RUN: %if --need=allow_dump --command %p2i -i %s --args -O2 \
+; RUN: | %if --need=allow_dump --command FileCheck %s
; char global_char;
; char *p_global_char;
diff --git a/tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll b/tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll
index 9cadd21..53d2eca 100644
--- a/tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll
+++ b/tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll
@@ -1,8 +1,8 @@
; This tests the optimization of atomic cmpxchg w/ following cmp + branches.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck --check-prefix=O2 %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck --check-prefix=OM1 %s
declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
diff --git a/tests_lit/llvm2ice_tests/nacl-atomic-fence-all.ll b/tests_lit/llvm2ice_tests/nacl-atomic-fence-all.ll
index 0b9b5b7..ec89067 100644
--- a/tests_lit/llvm2ice_tests/nacl-atomic-fence-all.ll
+++ b/tests_lit/llvm2ice_tests/nacl-atomic-fence-all.ll
@@ -3,8 +3,7 @@
; (unlike the non-"all" variety of nacl.atomic.fence, which only
; applies to atomic load/stores).
;
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
declare void @llvm.nacl.atomic.fence.all()
declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)
@@ -45,12 +44,12 @@
; CHECK: mov DWORD PTR {{.*}},0x3e7
; atomic store (w/ its own mfence)
; The load + add are optimized into one everywhere.
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_a
; CHECK: mov DWORD PTR
; CHECK: mfence
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_b
; CHECK: mov DWORD PTR
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_c
; CHECK: mfence
; CHECK: mov DWORD PTR
@@ -84,15 +83,15 @@
; CHECK: mov {{.*}},esp
; CHECK: mov DWORD PTR {{.*}},0x3e7
; atomic store (w/ its own mfence)
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_a
; CHECK: mov DWORD PTR
; CHECK: mfence
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_b
; CHECK: mov DWORD PTR
; CHECK: mfence
; Load + add can still be optimized into one instruction
; because it is not separated by a fence.
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_c
; CHECK: mov DWORD PTR
; Test with the fence splitting a load/add.
@@ -125,17 +124,17 @@
; CHECK: mov {{.*}},esp
; CHECK: mov DWORD PTR {{.*}},0x3e7
; atomic store (w/ its own mfence)
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_a
; CHECK: mov DWORD PTR
; CHECK: mfence
; This load + add are no longer optimized into one,
; though perhaps it should be legal as long as
; the load stays on the same side of the fence.
-; CHECK: mov {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: mov {{.*}},DWORD PTR {{.*}}g32_b
; CHECK: mfence
; CHECK: add {{.*}},0x1
; CHECK: mov DWORD PTR
-; CHECK: add {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: add {{.*}},DWORD PTR {{.*}}g32_c
; CHECK: mov DWORD PTR
@@ -198,8 +197,8 @@
}
; CHECK-LABEL: could_have_hoisted_loads
; CHECK: jne {{.*}}
-; CHECK: mov {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: mov {{.*}},DWORD PTR {{.*}}g32_d
; CHECK: ret
; CHECK: mfence
-; CHECK: mov {{.*}},DWORD PTR {{.*}}.bss
+; CHECK: mov {{.*}},DWORD PTR {{.*}}g32_d
; CHECK: ret
diff --git a/tests_lit/llvm2ice_tests/nacl-atomic-intrinsics.ll b/tests_lit/llvm2ice_tests/nacl-atomic-intrinsics.ll
index fdd1d65..6e27527 100644
--- a/tests_lit/llvm2ice_tests/nacl-atomic-intrinsics.ll
+++ b/tests_lit/llvm2ice_tests/nacl-atomic-intrinsics.ll
@@ -1,11 +1,11 @@
; This tests each of the supported NaCl atomic instructions for every
; size allowed.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck --check-prefix=O2 %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck %s
declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)
diff --git a/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll b/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
index 98373ee..124fa2e 100644
--- a/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
+++ b/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
@@ -1,20 +1,20 @@
; This tests the NaCl intrinsics not related to atomic operations.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none -sandbox \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -sandbox \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none -sandbox \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -sandbox \
; RUN: | FileCheck %s
; Do another run w/ O2 and a different check-prefix (otherwise O2 and Om1
; share the same "CHECK" prefix). This separate run helps check that
; some code is optimized out.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none -sandbox \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -sandbox \
; RUN: | FileCheck --check-prefix=CHECKO2REM %s
; Do O2 runs without -sandbox to make sure llvm.nacl.read.tp gets
; lowered to __nacl_read_tp instead of gs:0x0.
; We also know that because it's O2, it'll have the O2REM optimizations.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck --check-prefix=CHECKO2UNSANDBOXEDREM %s
declare i8* @llvm.nacl.read.tp()
diff --git a/tests_lit/llvm2ice_tests/phi.ll b/tests_lit/llvm2ice_tests/phi.ll
index 133ba0f..abdc1b3 100644
--- a/tests_lit/llvm2ice_tests/phi.ll
+++ b/tests_lit/llvm2ice_tests/phi.ll
@@ -2,8 +2,7 @@
; it tests that it does the right thing when it tries to enable
; compare/branch fusing.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: --phi-edge-split=0 \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 --phi-edge-split=0 \
; RUN: | FileCheck %s
define internal i32 @testPhi1(i32 %arg) {
diff --git a/tests_lit/llvm2ice_tests/randomize-regalloc.ll b/tests_lit/llvm2ice_tests/randomize-regalloc.ll
index b40734d..f393938 100644
--- a/tests_lit/llvm2ice_tests/randomize-regalloc.ll
+++ b/tests_lit/llvm2ice_tests/randomize-regalloc.ll
@@ -2,18 +2,18 @@
; of this test will change with changes to the random number generator
; implementation.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 -sz-seed=1 \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -sz-seed=1 \
; RUN: -randomize-regalloc \
; RUN: | FileCheck %s --check-prefix=CHECK_1
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 -sz-seed=1 \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -sz-seed=1 \
; RUN: -randomize-regalloc \
; RUN: | FileCheck %s --check-prefix=OPTM1_1
; Same tests but with a different seed, just to verify randomness.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 -sz-seed=123 \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -sz-seed=123 \
; RUN: -randomize-regalloc \
; RUN: | FileCheck %s --check-prefix=CHECK_123
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 -sz-seed=123 \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -sz-seed=123 \
; RUN: -randomize-regalloc \
; RUN: | FileCheck %s --check-prefix=OPTM1_123
diff --git a/tests_lit/llvm2ice_tests/returns_twice_no_coalesce.ll b/tests_lit/llvm2ice_tests/returns_twice_no_coalesce.ll
index 8ffdbfa..8419e0f 100644
--- a/tests_lit/llvm2ice_tests/returns_twice_no_coalesce.ll
+++ b/tests_lit/llvm2ice_tests/returns_twice_no_coalesce.ll
@@ -1,8 +1,7 @@
; This file checks that SimpleCoalescing of local stack slots is not done
; when calling a function with the "returns twice" attribute.
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
; Setjmp is a function with the "returns twice" attribute.
declare i32 @llvm.nacl.setjmp(i8*)
diff --git a/tests_lit/llvm2ice_tests/sdiv.ll b/tests_lit/llvm2ice_tests/sdiv.ll
index 91d9008..43ed073 100644
--- a/tests_lit/llvm2ice_tests/sdiv.ll
+++ b/tests_lit/llvm2ice_tests/sdiv.ll
@@ -1,10 +1,8 @@
; This checks the correctness of the lowering code for the small
; integer variants of sdiv and srem.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
define i32 @sdiv_i8(i32 %a.i32, i32 %b.i32) {
entry:
diff --git a/tests_lit/llvm2ice_tests/select-opt.ll b/tests_lit/llvm2ice_tests/select-opt.ll
index d784379..8e67a6d 100644
--- a/tests_lit/llvm2ice_tests/select-opt.ll
+++ b/tests_lit/llvm2ice_tests/select-opt.ll
@@ -3,10 +3,8 @@
; regardless of the optimization level, so there are no special OPTM1
; match lines.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
define void @testSelect(i32 %a, i32 %b) {
entry:
diff --git a/tests_lit/llvm2ice_tests/shift.ll b/tests_lit/llvm2ice_tests/shift.ll
index 9169b5f..fec0d0f 100644
--- a/tests_lit/llvm2ice_tests/shift.ll
+++ b/tests_lit/llvm2ice_tests/shift.ll
@@ -1,10 +1,10 @@
; This is a test of C-level conversion operations that clang lowers
; into pairs of shifts.
-; RUN: %p2i -i %s --assemble --disassemble --no-local-syms --args -O2 \
-; RUN: --verbose none | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --no-local-syms --args -Om1 \
-; RUN: --verbose none | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --no-local-syms --args -O2 \
+; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --no-local-syms --args -Om1 \
+; RUN: | FileCheck %s
@i1 = internal global [4 x i8] zeroinitializer, align 4
@i2 = internal global [4 x i8] zeroinitializer, align 4
diff --git a/tests_lit/llvm2ice_tests/simple-loop.ll b/tests_lit/llvm2ice_tests/simple-loop.ll
index f6be7a8..b8fd057 100644
--- a/tests_lit/llvm2ice_tests/simple-loop.ll
+++ b/tests_lit/llvm2ice_tests/simple-loop.ll
@@ -1,9 +1,9 @@
; This tests a simple loop that sums the elements of an input array.
; The O2 check patterns represent the best code currently achieved.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
define i32 @simple_loop(i32 %a, i32 %n) {
diff --git a/tests_lit/llvm2ice_tests/switch-opt.ll b/tests_lit/llvm2ice_tests/switch-opt.ll
index 05d3ecb..1fbe064 100644
--- a/tests_lit/llvm2ice_tests/switch-opt.ll
+++ b/tests_lit/llvm2ice_tests/switch-opt.ll
@@ -2,8 +2,7 @@
; same label which also results in phi instructions with multiple
; entries for the same incoming edge.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
define i32 @testSwitch(i32 %a) {
entry:
diff --git a/tests_lit/llvm2ice_tests/test_i1.ll b/tests_lit/llvm2ice_tests/test_i1.ll
index d3934cc..65083b6 100644
--- a/tests_lit/llvm2ice_tests/test_i1.ll
+++ b/tests_lit/llvm2ice_tests/test_i1.ll
@@ -1,9 +1,7 @@
; Tests various aspects of i1 related lowering.
-; RUN: %p2i -i %s --assemble --disassemble -a -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble -a -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
; Test that and with true uses immediate 1, not -1.
define internal i32 @testAndTrue(i32 %arg) {
diff --git a/tests_lit/llvm2ice_tests/undef.ll b/tests_lit/llvm2ice_tests/undef.ll
index b033ce1..1f2dd6b 100644
--- a/tests_lit/llvm2ice_tests/undef.ll
+++ b/tests_lit/llvm2ice_tests/undef.ll
@@ -1,13 +1,13 @@
; This test checks that undef values are represented as zero.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -mattr=sse4.1 \
+; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -mattr=sse4.1 \
+; RUN: | FileCheck %s
define i32 @undef_i32() {
entry:
diff --git a/tests_lit/llvm2ice_tests/unreachable.ll b/tests_lit/llvm2ice_tests/unreachable.ll
index ad055fe..bc08bcd 100644
--- a/tests_lit/llvm2ice_tests/unreachable.ll
+++ b/tests_lit/llvm2ice_tests/unreachable.ll
@@ -1,9 +1,7 @@
; This tests the basic structure of the Unreachable instruction.
-; RUN: %p2i -i %s --assemble --disassemble -a -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble -a -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 | FileCheck %s
define internal i32 @divide(i32 %num, i32 %den) {
entry:
diff --git a/tests_lit/llvm2ice_tests/vector-arg.ll b/tests_lit/llvm2ice_tests/vector-arg.ll
index 2c6c2fc..97b59e2 100644
--- a/tests_lit/llvm2ice_tests/vector-arg.ll
+++ b/tests_lit/llvm2ice_tests/vector-arg.ll
@@ -1,9 +1,9 @@
; This file checks that Subzero generates code in accordance with the
; calling convention for vectors.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
; The first five functions test that vectors are moved from their
diff --git a/tests_lit/llvm2ice_tests/vector-arith.ll b/tests_lit/llvm2ice_tests/vector-arith.ll
index 86e338d..69131df 100644
--- a/tests_lit/llvm2ice_tests/vector-arith.ll
+++ b/tests_lit/llvm2ice_tests/vector-arith.ll
@@ -1,13 +1,13 @@
; This test checks support for vector arithmetic.
-; RUN: %p2i -i %s --assemble --disassemble -a -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble -a -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble -a -O2 -mattr=sse4.1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 -mattr=sse4.1 \
; RUN: | FileCheck --check-prefix=SSE41 %s
-; RUN: %p2i -i %s --assemble --disassemble -a -Om1 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
define <4 x float> @test_fadd(<4 x float> %arg0, <4 x float> %arg1) {
entry:
diff --git a/tests_lit/llvm2ice_tests/vector-bitcast.ll b/tests_lit/llvm2ice_tests/vector-bitcast.ll
index ac9f49e..5d63854 100644
--- a/tests_lit/llvm2ice_tests/vector-bitcast.ll
+++ b/tests_lit/llvm2ice_tests/vector-bitcast.ll
@@ -1,9 +1,9 @@
; This file tests bitcasts of vector type. For most operations, these
; should be lowered to a no-op on -O2.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck --check-prefix=OPTM1 %s
define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) {
diff --git a/tests_lit/llvm2ice_tests/vector-cast.ll b/tests_lit/llvm2ice_tests/vector-cast.ll
index d46e5b8..5cde63c 100644
--- a/tests_lit/llvm2ice_tests/vector-cast.ll
+++ b/tests_lit/llvm2ice_tests/vector-cast.ll
@@ -1,10 +1,8 @@
; This file tests casting / conversion operations that apply to vector types.
; bitcast operations are in vector-bitcast.ll.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
; sext operations
diff --git a/tests_lit/llvm2ice_tests/vector-fcmp.ll b/tests_lit/llvm2ice_tests/vector-fcmp.ll
index a84ef7b..641d715 100644
--- a/tests_lit/llvm2ice_tests/vector-fcmp.ll
+++ b/tests_lit/llvm2ice_tests/vector-fcmp.ll
@@ -1,10 +1,8 @@
; This file checks support for comparing vector values with the fcmp
; instruction.
-; RUN: %p2i -i %s --assemble --disassemble -a -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble -a -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 | FileCheck %s
; Check that sext elimination occurs when the result of the comparison
; instruction is alrady sign extended. Sign extension to 4 x i32 uses
diff --git a/tests_lit/llvm2ice_tests/vector-icmp.ll b/tests_lit/llvm2ice_tests/vector-icmp.ll
index e474976..0830b38 100644
--- a/tests_lit/llvm2ice_tests/vector-icmp.ll
+++ b/tests_lit/llvm2ice_tests/vector-icmp.ll
@@ -1,10 +1,8 @@
; This file checks support for comparing vector values with the icmp
; instruction.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
-; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
-; RUN: | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
; Check that sext elimination occurs when the result of the comparison
; instruction is alrady sign extended. Sign extension to 4 x i32 uses
diff --git a/tests_lit/llvm2ice_tests/vector-ops.ll b/tests_lit/llvm2ice_tests/vector-ops.ll
index ccffd39..48bf1a9 100644
--- a/tests_lit/llvm2ice_tests/vector-ops.ll
+++ b/tests_lit/llvm2ice_tests/vector-ops.ll
@@ -1,13 +1,13 @@
; This checks support for insertelement and extractelement.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
; insertelement operations
diff --git a/tests_lit/llvm2ice_tests/vector-select.ll b/tests_lit/llvm2ice_tests/vector-select.ll
index e3beef3..4ce8f38 100644
--- a/tests_lit/llvm2ice_tests/vector-select.ll
+++ b/tests_lit/llvm2ice_tests/vector-select.ll
@@ -1,13 +1,13 @@
; This file tests support for the select instruction with vector valued inputs.
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
; RUN: | FileCheck %s
-; RUN: %p2i -i %s --assemble --disassemble --args -O2 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
-; RUN: %p2i -i %s --assemble --disassemble --args -Om1 -mattr=sse4.1 \
-; RUN: --verbose none | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -mattr=sse4.1 \
+; RUN: | FileCheck --check-prefix=SSE41 %s
define <16 x i8> @test_select_v16i8(<16 x i1> %cond, <16 x i8> %arg1, <16 x i8> %arg2) {
entry:
