Subzero ARM32: Lower shift and zext, sext, and trunc.
Sext, etc. usually uses shifts (especially for i1 and i64)
so implement shift, then implement those casts.
Implement just enough of bitcast to handle accessing
global addresses (used by some tests). Otherwise,
most other bitcasts are from GPR to FP and FP regs
aren't modeled yet.
Generally following the GCC style for 64-bit shifts.
This takes advantage of the flexible second operand in a "orr",
and takes advantage of the shift-beyond bitwidth saturation.
LLVM is almost the same, but only seems to take advantage
on one side of the 32-bits, not the other side. Should really
get some of the execution tests running to test this behavior!
Fix InstARM32Str::dump(). Str doesn't have a Dest, so use Src.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/1143323013
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 8d282d7..53c9895 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -153,6 +153,10 @@
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32And::create(Func, Dest, Src0, Src1, Pred));
}
+ void _asr(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Asr::create(Func, Dest, Src0, Src1, Pred));
+ }
void _bic(Variable *Dest, Variable *Src0, Operand *Src1,
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Bic::create(Func, Dest, Src0, Src1, Pred));
@@ -181,6 +185,10 @@
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred));
}
+ void _lsr(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Lsr::create(Func, Dest, Src0, Src1, Pred));
+ }
void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc,
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Mla::create(Func, Dest, Src0, Src1, Acc, Pred));
@@ -232,6 +240,10 @@
for (Variable *Dest : Dests)
Context.insert(InstFakeDef::create(Func, Dest));
}
+ void _rsb(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred));
+ }
void _sbc(Variable *Dest, Variable *Src0, Operand *Src1,
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred));
@@ -256,6 +268,10 @@
Context.insert(
InstARM32Sub::create(Func, Dest, Src0, Src1, Pred, SetFlags));
}
+ void _sxt(Variable *Dest, Variable *Src0,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Sxt::create(Func, Dest, Src0, Pred));
+ }
void _ret(Variable *LR, Variable *Src0 = nullptr) {
Context.insert(InstARM32Ret::create(Func, LR, Src0));
}
@@ -267,6 +283,10 @@
// Note that the def is not predicated.
Context.insert(InstFakeDef::create(Func, DestHi, DestLo));
}
+ void _uxt(Variable *Dest, Variable *Src0,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred));
+ }
bool UsesFramePointer;
bool NeedsStackAlignment;
