Add Om1 lowering with no optimizations.
This adds infrastructure for low-level x86-32 instructions, and the target lowering patterns.
Practically no optimizations are performed. Optimizations to be introduced later include liveness analysis, dead-code elimination, global linear-scan register allocation, linear-scan based stack slot coalescing, and compare/branch fusing. One optimization that is present is simple coalescing of stack slots for variables that are only live within a single basic block.
There are also some fairly comprehensive cross tests. This testing infrastructure translates bitcode using both Subzero and llc, and a testing harness calls both versions with a variety of "interesting" inputs and compares the results. Specifically, Arithmetic, Icmp, Fcmp, and Cast instructions are tested this way, across all PNaCl primitive types.
BUG=
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/265703002
diff --git a/src/IceTypes.h b/src/IceTypes.h
index b3d28c3..21c399d 100644
--- a/src/IceTypes.h
+++ b/src/IceTypes.h
@@ -26,6 +26,20 @@
#undef X
};
+enum TargetArch {
+ Target_X8632,
+ Target_X8664,
+ Target_ARM32,
+ Target_ARM64
+};
+
+enum OptLevel {
+ Opt_m1,
+ Opt_0,
+ Opt_1,
+ Opt_2
+};
+
size_t typeWidthInBytes(Type Ty);
size_t typeAlignInBytes(Type Ty);
