SpirvShader: Fix int DBZ failures by masking away zeros.
The Vulkan spec says:
"division by zero produces an unspecified result but must not lead to Vulkan interruption or termination".
Tests: dEQP-VK.glsl.operator.binary_operator.mod.*
Tests: dEQP-VK.glsl.operator.binary_operator.div.*
Bug: b/127962486
Change-Id: I62e7c29a6e944512db7a8a96b0bb87488aa7be73
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/27171
Reviewed-by: Nicolas Capens <nicolascapens@google.com>
Tested-by: Ben Clayton <bclayton@google.com>
Kokoro-Presubmit: kokoro <noreply+kokoro@google.com>
diff --git a/src/Pipeline/SpirvShader.cpp b/src/Pipeline/SpirvShader.cpp
index 4f96fd1..86394ae 100644
--- a/src/Pipeline/SpirvShader.cpp
+++ b/src/Pipeline/SpirvShader.cpp
@@ -1537,16 +1537,23 @@
dst.emplace(i, lhs.Int(i) * rhs.Int(i));
break;
case spv::OpSDiv:
- dst.emplace(i, lhs.Int(i) / rhs.Int(i));
+ {
+ auto zeroMask = CmpEQ(rhs.Int(i), SIMD::Int(0));
+ dst.emplace(i, lhs.Int(i) / (rhs.Int(i) | zeroMask));
break;
+ }
case spv::OpUDiv:
- dst.emplace(i, lhs.UInt(i) / rhs.UInt(i));
+ {
+ auto zeroMask = As<SIMD::UInt>(CmpEQ(rhs.Int(i), SIMD::Int(0)));
+ dst.emplace(i, lhs.UInt(i) / (rhs.UInt(i) | zeroMask));
break;
+ }
case spv::OpSMod:
{
auto a = lhs.Int(i);
auto b = rhs.Int(i);
- auto mod = a % b;
+ auto zeroMask = CmpEQ(b, SIMD::Int(0));
+ auto mod = a % (b | zeroMask);
// If a and b have opposite signs, the remainder operation takes
// the sign from a but OpSMod is supposed to take the sign of b.
// Adding b will ensure that the result has the correct sign and
