//===- TableGen'erated file -------------------------------------*- C++ -*-===//
//
// Assembly Writer Source Fragment
//
// Automatically generated file, do not edit!
//
//===----------------------------------------------------------------------===//

/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description.
void X86IntelInstPrinter::printInstruction(const MCInst *MI, raw_ostream &O) {
  static const unsigned OpInfo[] = {
    0U,	// PHI
    0U,	// INLINEASM
    0U,	// PROLOG_LABEL
    0U,	// EH_LABEL
    0U,	// GC_LABEL
    0U,	// KILL
    0U,	// EXTRACT_SUBREG
    0U,	// INSERT_SUBREG
    0U,	// IMPLICIT_DEF
    0U,	// SUBREG_TO_REG
    0U,	// COPY_TO_REGCLASS
    1U,	// DBG_VALUE
    0U,	// REG_SEQUENCE
    0U,	// COPY
    11U,	// AAA
    134217743U,	// AAD8i8
    134217748U,	// AAM8i8
    25U,	// AAS
    29U,	// ABS_F
    0U,	// ABS_Fp32
    0U,	// ABS_Fp64
    0U,	// ABS_Fp80
    34U,	// ACQUIRE_MOV16rm
    34U,	// ACQUIRE_MOV32rm
    34U,	// ACQUIRE_MOV64rm
    34U,	// ACQUIRE_MOV8rm
    134217783U,	// ADC16i16
    272629824U,	// ADC16mi
    272629824U,	// ADC16mi8
    272629824U,	// ADC16mr
    411041856U,	// ADC16ri
    411041856U,	// ADC16ri8
    415236160U,	// ADC16rm
    411041856U,	// ADC16rr
    138543168U,	// ADC16rr_REV
    134217797U,	// ADC32i32
    541065280U,	// ADC32mi
    541065280U,	// ADC32mi8
    541065280U,	// ADC32mr
    411041856U,	// ADC32ri
    411041856U,	// ADC32ri8
    419430464U,	// ADC32rm
    411041856U,	// ADC32rr
    138543168U,	// ADC32rr_REV
    134217807U,	// ADC64i32
    675283008U,	// ADC64mi32
    675283008U,	// ADC64mi8
    675283008U,	// ADC64mr
    411041856U,	// ADC64ri32
    411041856U,	// ADC64ri8
    423624768U,	// ADC64rm
    411041856U,	// ADC64rr
    138543168U,	// ADC64rr_REV
    134217817U,	// ADC8i8
    809500736U,	// ADC8mi
    809500736U,	// ADC8mr
    411041856U,	// ADC8ri
    427819072U,	// ADC8rm
    411041856U,	// ADC8rr
    138543168U,	// ADC8rr_REV
    134217826U,	// ADD16i16
    272629867U,	// ADD16mi
    272629867U,	// ADD16mi8
    272629867U,	// ADD16mr
    411041899U,	// ADD16ri
    411041899U,	// ADD16ri8
    0U,	// ADD16ri8_DB
    0U,	// ADD16ri_DB
    415236203U,	// ADD16rm
    411041899U,	// ADD16rr
    0U,	// ADD16rr_DB
    138543211U,	// ADD16rr_REV
    134217840U,	// ADD32i32
    541065323U,	// ADD32mi
    541065323U,	// ADD32mi8
    541065323U,	// ADD32mr
    411041899U,	// ADD32ri
    411041899U,	// ADD32ri8
    0U,	// ADD32ri8_DB
    0U,	// ADD32ri_DB
    419430507U,	// ADD32rm
    411041899U,	// ADD32rr
    0U,	// ADD32rr_DB
    138543211U,	// ADD32rr_REV
    134217850U,	// ADD64i32
    675283051U,	// ADD64mi32
    675283051U,	// ADD64mi8
    675283051U,	// ADD64mr
    411041899U,	// ADD64ri32
    0U,	// ADD64ri32_DB
    411041899U,	// ADD64ri8
    0U,	// ADD64ri8_DB
    423624811U,	// ADD64rm
    411041899U,	// ADD64rr
    0U,	// ADD64rr_DB
    138543211U,	// ADD64rr_REV
    134217860U,	// ADD8i8
    809500779U,	// ADD8mi
    809500779U,	// ADD8mr
    411041899U,	// ADD8ri
    427819115U,	// ADD8rm
    411041899U,	// ADD8rr
    138543211U,	// ADD8rr_REV
    138674317U,	// ADDPDrm
    138543245U,	// ADDPDrr
    138674324U,	// ADDPSrm
    138543252U,	// ADDPSrr
    138805403U,	// ADDSDrm
    138805403U,	// ADDSDrm_Int
    138543259U,	// ADDSDrr
    138543259U,	// ADDSDrr_Int
    138936482U,	// ADDSSrm
    138936482U,	// ADDSSrm_Int
    138543266U,	// ADDSSrr
    138543266U,	// ADDSSrr_Int
    138674345U,	// ADDSUBPDrm
    138543273U,	// ADDSUBPDrr
    138674355U,	// ADDSUBPSrm
    138543283U,	// ADDSUBPSrr
    939524285U,	// ADD_F32m
    1073742013U,	// ADD_F64m
    268435651U,	// ADD_FI16m
    536871107U,	// ADD_FI32m
    134217930U,	// ADD_FPrST0
    134217917U,	// ADD_FST0r
    0U,	// ADD_Fp32
    0U,	// ADD_Fp32m
    0U,	// ADD_Fp64
    0U,	// ADD_Fp64m
    0U,	// ADD_Fp64m32
    0U,	// ADD_Fp80
    0U,	// ADD_Fp80m32
    0U,	// ADD_Fp80m64
    0U,	// ADD_FpI16m32
    0U,	// ADD_FpI16m64
    0U,	// ADD_FpI16m80
    0U,	// ADD_FpI32m32
    0U,	// ADD_FpI32m64
    0U,	// ADD_FpI32m80
    163578045U,	// ADD_FrST0
    209U,	// ADJCALLSTACKDOWN32
    209U,	// ADJCALLSTACKDOWN64
    227U,	// ADJCALLSTACKUP32
    227U,	// ADJCALLSTACKUP64
    139067635U,	// AESDECLASTrm
    138543347U,	// AESDECLASTrr
    139067647U,	// AESDECrm
    138543359U,	// AESDECrr
    139067655U,	// AESENCLASTrm
    138543367U,	// AESENCLASTrr
    139067667U,	// AESENCrm
    138543379U,	// AESENCrr
    139198747U,	// AESIMCrm
    139329819U,	// AESIMCrr
    139215139U,	// AESKEYGENASSIST128rm
    139346211U,	// AESKEYGENASSIST128rr
    134218036U,	// AND16i16
    272630077U,	// AND16mi
    272630077U,	// AND16mi8
    272630077U,	// AND16mr
    411042109U,	// AND16ri
    411042109U,	// AND16ri8
    415236413U,	// AND16rm
    411042109U,	// AND16rr
    138543421U,	// AND16rr_REV
    134218050U,	// AND32i32
    541065533U,	// AND32mi
    541065533U,	// AND32mi8
    541065533U,	// AND32mr
    411042109U,	// AND32ri
    411042109U,	// AND32ri8
    419430717U,	// AND32rm
    411042109U,	// AND32rr
    138543421U,	// AND32rr_REV
    134218060U,	// AND64i32
    675283261U,	// AND64mi32
    675283261U,	// AND64mi8
    675283261U,	// AND64mr
    411042109U,	// AND64ri32
    411042109U,	// AND64ri8
    423625021U,	// AND64rm
    411042109U,	// AND64rr
    138543421U,	// AND64rr_REV
    134218070U,	// AND8i8
    809500989U,	// AND8mi
    809500989U,	// AND8mr
    411042109U,	// AND8ri
    427819325U,	// AND8rm
    411042109U,	// AND8rr
    138543421U,	// AND8rr_REV
    139346271U,	// ANDN32rm
    139346271U,	// ANDN32rr
    139346271U,	// ANDN64rm
    139346271U,	// ANDN64rr
    138674533U,	// ANDNPDrm
    138543461U,	// ANDNPDrr
    138674541U,	// ANDNPSrm
    138543469U,	// ANDNPSrr
    138674549U,	// ANDPDrm
    138543477U,	// ANDPDrr
    138674556U,	// ANDPSrm
    138543484U,	// ANDPSrr
    1207959939U,	// ARPL16mr
    436208003U,	// ARPL16rr
    393U,	// ATOMADD6432
    414U,	// ATOMAND16
    433U,	// ATOMAND32
    452U,	// ATOMAND64
    471U,	// ATOMAND6432
    492U,	// ATOMAND8
    510U,	// ATOMMAX16
    529U,	// ATOMMAX32
    548U,	// ATOMMAX64
    567U,	// ATOMMIN16
    586U,	// ATOMMIN32
    605U,	// ATOMMIN64
    624U,	// ATOMNAND16
    644U,	// ATOMNAND32
    664U,	// ATOMNAND64
    684U,	// ATOMNAND6432
    706U,	// ATOMNAND8
    725U,	// ATOMOR16
    743U,	// ATOMOR32
    761U,	// ATOMOR64
    779U,	// ATOMOR6432
    799U,	// ATOMOR8
    816U,	// ATOMSUB6432
    837U,	// ATOMSWAP6432
    859U,	// ATOMUMAX16
    879U,	// ATOMUMAX32
    899U,	// ATOMUMAX64
    919U,	// ATOMUMIN16
    939U,	// ATOMUMIN32
    959U,	// ATOMUMIN64
    979U,	// ATOMXOR16
    998U,	// ATOMXOR32
    1017U,	// ATOMXOR64
    1036U,	// ATOMXOR6432
    1057U,	// ATOMXOR8
    0U,	// AVX_SET0PDY
    0U,	// AVX_SET0PSY
    0U,	// AVX_SETALLONES
    139084851U,	// BLENDPDrmi
    138560563U,	// BLENDPDrri
    139084860U,	// BLENDPSrmi
    138560572U,	// BLENDPSrri
    139068485U,	// BLENDVPDrm0
    138544197U,	// BLENDVPDrr0
    139068495U,	// BLENDVPSrm0
    138544207U,	// BLENDVPSrr0
    139461721U,	// BOUNDS16rm
    139592793U,	// BOUNDS32rm
    139461728U,	// BSF16rm
    139330656U,	// BSF16rr
    139592800U,	// BSF32rm
    139330656U,	// BSF32rr
    139723872U,	// BSF64rm
    139330656U,	// BSF64rr
    139461733U,	// BSR16rm
    139330661U,	// BSR16rr
    139592805U,	// BSR32rm
    139330661U,	// BSR32rr
    139723877U,	// BSR64rm
    139330661U,	// BSR64rr
    134218858U,	// BSWAP32r
    134218858U,	// BSWAP64r
    272630897U,	// BT16mi8
    272630897U,	// BT16mr
    139330673U,	// BT16ri8
    139330673U,	// BT16rr
    541066353U,	// BT32mi8
    541066353U,	// BT32mr
    139330673U,	// BT32ri8
    139330673U,	// BT32rr
    675284081U,	// BT64mi8
    675284081U,	// BT64mr
    139330673U,	// BT64ri8
    139330673U,	// BT64rr
    272630901U,	// BTC16mi8
    272630901U,	// BTC16mr
    139330677U,	// BTC16ri8
    139330677U,	// BTC16rr
    541066357U,	// BTC32mi8
    541066357U,	// BTC32mr
    139330677U,	// BTC32ri8
    139330677U,	// BTC32rr
    675284085U,	// BTC64mi8
    675284085U,	// BTC64mr
    139330677U,	// BTC64ri8
    139330677U,	// BTC64rr
    272630906U,	// BTR16mi8
    272630906U,	// BTR16mr
    139330682U,	// BTR16ri8
    139330682U,	// BTR16rr
    541066362U,	// BTR32mi8
    541066362U,	// BTR32mr
    139330682U,	// BTR32ri8
    139330682U,	// BTR32rr
    675284090U,	// BTR64mi8
    675284090U,	// BTR64mr
    139330682U,	// BTR64ri8
    139330682U,	// BTR64rr
    272630911U,	// BTS16mi8
    272630911U,	// BTS16mr
    139330687U,	// BTS16ri8
    139330687U,	// BTS16rr
    541066367U,	// BTS32mi8
    541066367U,	// BTS32mr
    139330687U,	// BTS32ri8
    139330687U,	// BTS32rr
    675284095U,	// BTS64mi8
    675284095U,	// BTS64mr
    139330687U,	// BTS64ri8
    139330687U,	// BTS64rr
    536872068U,	// CALL32m
    134218884U,	// CALL32r
    671089796U,	// CALL64m
    1342178436U,	// CALL64pcrel32
    134218884U,	// CALL64r
    1342178442U,	// CALLpcrel16
    1342178436U,	// CALLpcrel32
    1169U,	// CBW
    1173U,	// CDQ
    1177U,	// CDQE
    1182U,	// CHS_F
    0U,	// CHS_Fp32
    0U,	// CHS_Fp64
    0U,	// CHS_Fp80
    1187U,	// CLC
    1191U,	// CLD
    805307563U,	// CLFLUSH
    1204U,	// CLI
    1208U,	// CLTS
    1213U,	// CMC
    139855041U,	// CMOVA16rm
    138544321U,	// CMOVA16rr
    139986113U,	// CMOVA32rm
    138544321U,	// CMOVA32rr
    140117185U,	// CMOVA64rm
    138544321U,	// CMOVA64rr
    139855048U,	// CMOVAE16rm
    138544328U,	// CMOVAE16rr
    139986120U,	// CMOVAE32rm
    138544328U,	// CMOVAE32rr
    140117192U,	// CMOVAE64rm
    138544328U,	// CMOVAE64rr
    139855056U,	// CMOVB16rm
    138544336U,	// CMOVB16rr
    139986128U,	// CMOVB32rm
    138544336U,	// CMOVB32rr
    140117200U,	// CMOVB64rm
    138544336U,	// CMOVB64rr
    139855063U,	// CMOVBE16rm
    138544343U,	// CMOVBE16rr
    139986135U,	// CMOVBE32rm
    138544343U,	// CMOVBE32rr
    140117207U,	// CMOVBE64rm
    138544343U,	// CMOVBE64rr
    134218975U,	// CMOVBE_F
    0U,	// CMOVBE_Fp32
    0U,	// CMOVBE_Fp64
    0U,	// CMOVBE_Fp80
    134218992U,	// CMOVB_F
    0U,	// CMOVB_Fp32
    0U,	// CMOVB_Fp64
    0U,	// CMOVB_Fp80
    139855104U,	// CMOVE16rm
    138544384U,	// CMOVE16rr
    139986176U,	// CMOVE32rm
    138544384U,	// CMOVE32rr
    140117248U,	// CMOVE64rm
    138544384U,	// CMOVE64rr
    134219015U,	// CMOVE_F
    0U,	// CMOVE_Fp32
    0U,	// CMOVE_Fp64
    0U,	// CMOVE_Fp80
    139855127U,	// CMOVG16rm
    138544407U,	// CMOVG16rr
    139986199U,	// CMOVG32rm
    138544407U,	// CMOVG32rr
    140117271U,	// CMOVG64rm
    138544407U,	// CMOVG64rr
    139855134U,	// CMOVGE16rm
    138544414U,	// CMOVGE16rr
    139986206U,	// CMOVGE32rm
    138544414U,	// CMOVGE32rr
    140117278U,	// CMOVGE64rm
    138544414U,	// CMOVGE64rr
    139855142U,	// CMOVL16rm
    138544422U,	// CMOVL16rr
    139986214U,	// CMOVL32rm
    138544422U,	// CMOVL32rr
    140117286U,	// CMOVL64rm
    138544422U,	// CMOVL64rr
    139855149U,	// CMOVLE16rm
    138544429U,	// CMOVLE16rr
    139986221U,	// CMOVLE32rm
    138544429U,	// CMOVLE32rr
    140117293U,	// CMOVLE64rm
    138544429U,	// CMOVLE64rr
    134219061U,	// CMOVNBE_F
    0U,	// CMOVNBE_Fp32
    0U,	// CMOVNBE_Fp64
    0U,	// CMOVNBE_Fp80
    134219079U,	// CMOVNB_F
    0U,	// CMOVNB_Fp32
    0U,	// CMOVNB_Fp64
    0U,	// CMOVNB_Fp80
    139855192U,	// CMOVNE16rm
    138544472U,	// CMOVNE16rr
    139986264U,	// CMOVNE32rm
    138544472U,	// CMOVNE32rr
    140117336U,	// CMOVNE64rm
    138544472U,	// CMOVNE64rr
    134219104U,	// CMOVNE_F
    0U,	// CMOVNE_Fp32
    0U,	// CMOVNE_Fp64
    0U,	// CMOVNE_Fp80
    139855217U,	// CMOVNO16rm
    138544497U,	// CMOVNO16rr
    139986289U,	// CMOVNO32rm
    138544497U,	// CMOVNO32rr
    140117361U,	// CMOVNO64rm
    138544497U,	// CMOVNO64rr
    139855225U,	// CMOVNP16rm
    138544505U,	// CMOVNP16rr
    139986297U,	// CMOVNP32rm
    138544505U,	// CMOVNP32rr
    140117369U,	// CMOVNP64rm
    138544505U,	// CMOVNP64rr
    134219137U,	// CMOVNP_F
    0U,	// CMOVNP_Fp32
    0U,	// CMOVNP_Fp64
    0U,	// CMOVNP_Fp80
    139855250U,	// CMOVNS16rm
    138544530U,	// CMOVNS16rr
    139986322U,	// CMOVNS32rm
    138544530U,	// CMOVNS32rr
    140117394U,	// CMOVNS64rm
    138544530U,	// CMOVNS64rr
    139855258U,	// CMOVO16rm
    138544538U,	// CMOVO16rr
    139986330U,	// CMOVO32rm
    138544538U,	// CMOVO32rr
    140117402U,	// CMOVO64rm
    138544538U,	// CMOVO64rr
    139855265U,	// CMOVP16rm
    138544545U,	// CMOVP16rr
    139986337U,	// CMOVP32rm
    138544545U,	// CMOVP32rr
    140117409U,	// CMOVP64rm
    138544545U,	// CMOVP64rr
    134219176U,	// CMOVP_F
    0U,	// CMOVP_Fp32
    0U,	// CMOVP_Fp64
    0U,	// CMOVP_Fp80
    139855289U,	// CMOVS16rm
    138544569U,	// CMOVS16rr
    139986361U,	// CMOVS32rm
    138544569U,	// CMOVS32rr
    140117433U,	// CMOVS64rm
    138544569U,	// CMOVS64rr
    1472U,	// CMOV_FR32
    1491U,	// CMOV_FR64
    1510U,	// CMOV_GR16
    1530U,	// CMOV_GR32
    1550U,	// CMOV_GR8
    1568U,	// CMOV_RFP32
    1588U,	// CMOV_RFP64
    1608U,	// CMOV_RFP80
    1628U,	// CMOV_V2F64
    1648U,	// CMOV_V2I64
    1668U,	// CMOV_V4F32
    1688U,	// CMOV_V4F64
    1708U,	// CMOV_V4I64
    1728U,	// CMOV_V8F32
    134219476U,	// CMP16i16
    272631517U,	// CMP16mi
    272631517U,	// CMP16mi8
    272631517U,	// CMP16mr
    139331293U,	// CMP16ri
    139331293U,	// CMP16ri8
    139462365U,	// CMP16rm
    139331293U,	// CMP16rr
    139331293U,	// CMP16rr_REV
    134219490U,	// CMP32i32
    541066973U,	// CMP32mi
    541066973U,	// CMP32mi8
    541066973U,	// CMP32mr
    139331293U,	// CMP32ri
    139331293U,	// CMP32ri8
    139593437U,	// CMP32rm
    139331293U,	// CMP32rr
    139331293U,	// CMP32rr_REV
    134219500U,	// CMP64i32
    675284701U,	// CMP64mi32
    675284701U,	// CMP64mi8
    675284701U,	// CMP64mr
    139331293U,	// CMP64ri32
    139331293U,	// CMP64ri8
    139724509U,	// CMP64rm
    139331293U,	// CMP64rr
    139331293U,	// CMP64rr_REV
    134219510U,	// CMP8i8
    809502429U,	// CMP8mi
    809502429U,	// CMP8mr
    139331293U,	// CMP8ri
    140248797U,	// CMP8rm
    139331293U,	// CMP8rr
    139331293U,	// CMP8rr_REV
    1514407679U,	// CMPPDrmi
    138692355U,	// CMPPDrmi_alt
    1648494335U,	// CMPPDrri
    138561283U,	// CMPPDrri_alt
    1518601983U,	// CMPPSrmi
    138692362U,	// CMPPSrmi_alt
    1652688639U,	// CMPPSrri
    138561290U,	// CMPPSrri_alt
    1809U,	// CMPS16
    1815U,	// CMPS32
    1821U,	// CMPS64
    1827U,	// CMPS8
    1522927359U,	// CMPSDrm
    138823465U,	// CMPSDrm_alt
    1656882943U,	// CMPSDrr
    138561321U,	// CMPSDrr_alt
    1527252735U,	// CMPSSrm
    138954544U,	// CMPSSrm_alt
    1661077247U,	// CMPSSrr
    138561328U,	// CMPSSrr_alt
    1744832311U,	// CMPXCHG16B
    272631619U,	// CMPXCHG16rm
    139331395U,	// CMPXCHG16rr
    541067075U,	// CMPXCHG32rm
    139331395U,	// CMPXCHG32rr
    675284803U,	// CMPXCHG64rm
    139331395U,	// CMPXCHG64rr
    671090508U,	// CMPXCHG8B
    809502531U,	// CMPXCHG8rm
    139331395U,	// CMPXCHG8rr
    140379991U,	// COMISDrm
    139331415U,	// COMISDrr
    140379999U,	// COMISSrm
    139331423U,	// COMISSrr
    134219623U,	// COMP_FST0r
    134219630U,	// COM_FIPr
    134219638U,	// COM_FIr
    134219645U,	// COM_FST0r
    1923U,	// COS_F
    0U,	// COS_Fp32
    0U,	// COS_Fp64
    0U,	// COS_Fp80
    1928U,	// CPUID
    1934U,	// CQO
    415238034U,	// CRC32r32m16
    419432338U,	// CRC32r32m32
    427820946U,	// CRC32r32m8
    411043730U,	// CRC32r32r16
    411043730U,	// CRC32r32r32
    411043730U,	// CRC32r32r8
    423626642U,	// CRC32r64m64
    427820946U,	// CRC32r64m8
    411043730U,	// CRC32r64r64
    411043730U,	// CRC32r64r8
    1946U,	// CS_PREFIX
    140380061U,	// CVTDQ2PDrm
    139331485U,	// CVTDQ2PDrr
    139200423U,	// CVTDQ2PSrm
    139331495U,	// CVTDQ2PSrr
    140380081U,	// CVTPD2DQrm
    139331505U,	// CVTPD2DQrr
    140380091U,	// CVTPD2PSrm
    139331515U,	// CVTPD2PSrr
    140380101U,	// CVTPS2DQrm
    139331525U,	// CVTPS2DQrr
    140511183U,	// CVTPS2PDrm
    139331535U,	// CVTPS2PDrr
    140380121U,	// CVTSD2SI64rm
    139331545U,	// CVTSD2SI64rr
    140380121U,	// CVTSD2SIrm
    139331545U,	// CVTSD2SIrr
    140511203U,	// CVTSD2SSrm
    139331555U,	// CVTSD2SSrr
    139724781U,	// CVTSI2SD64rm
    139331565U,	// CVTSI2SD64rr
    139593709U,	// CVTSI2SDrm
    139331565U,	// CVTSI2SDrr
    139724791U,	// CVTSI2SS64rm
    139331575U,	// CVTSI2SS64rr
    139593719U,	// CVTSI2SSrm
    139331575U,	// CVTSI2SSrr
    140642305U,	// CVTSS2SDrm
    139331585U,	// CVTSS2SDrr
    140642315U,	// CVTSS2SI64rm
    139331595U,	// CVTSS2SI64rr
    140642315U,	// CVTSS2SIrm
    139331595U,	// CVTSS2SIrr
    140380181U,	// CVTTPD2DQrm
    139331605U,	// CVTTPD2DQrr
    140380192U,	// CVTTPS2DQrm
    139331616U,	// CVTTPS2DQrr
    140511275U,	// CVTTSD2SI64rm
    139331627U,	// CVTTSD2SI64rr
    140511275U,	// CVTTSD2SIrm
    139331627U,	// CVTTSD2SIrr
    140642358U,	// CVTTSS2SI64rm
    139331638U,	// CVTTSS2SI64rr
    140642358U,	// CVTTSS2SIrm
    139331638U,	// CVTTSS2SIrr
    2113U,	// CWD
    2117U,	// CWDE
    2122U,	// DAA
    2126U,	// DAS
    2130U,	// DATA16_PREFIX
    268437593U,	// DEC16m
    134219865U,	// DEC16r
    536873049U,	// DEC32m
    134219865U,	// DEC32r
    268437593U,	// DEC64_16m
    134219865U,	// DEC64_16r
    536873049U,	// DEC64_32m
    134219865U,	// DEC64_32r
    671090777U,	// DEC64m
    134219865U,	// DEC64r
    805308505U,	// DEC8m
    134219865U,	// DEC8r
    268437598U,	// DIV16m
    134219870U,	// DIV16r
    536873054U,	// DIV32m
    134219870U,	// DIV32r
    671090782U,	// DIV64m
    134219870U,	// DIV64r
    805308510U,	// DIV8m
    134219870U,	// DIV8r
    138676323U,	// DIVPDrm
    138545251U,	// DIVPDrr
    138676330U,	// DIVPSrm
    138545258U,	// DIVPSrr
    939526257U,	// DIVR_F32m
    1073743985U,	// DIVR_F64m
    268437624U,	// DIVR_FI16m
    536873080U,	// DIVR_FI32m
    134219904U,	// DIVR_FPrST0
    134219889U,	// DIVR_FST0r
    0U,	// DIVR_Fp32m
    0U,	// DIVR_Fp64m
    0U,	// DIVR_Fp64m32
    0U,	// DIVR_Fp80m32
    0U,	// DIVR_Fp80m64
    0U,	// DIVR_FpI16m32
    0U,	// DIVR_FpI16m64
    0U,	// DIVR_FpI16m80
    0U,	// DIVR_FpI32m32
    0U,	// DIVR_FpI32m64
    0U,	// DIVR_FpI32m80
    163580017U,	// DIVR_FrST0
    138807432U,	// DIVSDrm
    138807432U,	// DIVSDrm_Int
    138545288U,	// DIVSDrr
    138545288U,	// DIVSDrr_Int
    138938511U,	// DIVSSrm
    138938511U,	// DIVSSrm_Int
    138545295U,	// DIVSSrr
    138545295U,	// DIVSSrr_Int
    939526294U,	// DIV_F32m
    1073744022U,	// DIV_F64m
    268437660U,	// DIV_FI16m
    536873116U,	// DIV_FI32m
    134219939U,	// DIV_FPrST0
    134219926U,	// DIV_FST0r
    0U,	// DIV_Fp32
    0U,	// DIV_Fp32m
    0U,	// DIV_Fp64
    0U,	// DIV_Fp64m
    0U,	// DIV_Fp64m32
    0U,	// DIV_Fp80
    0U,	// DIV_Fp80m32
    0U,	// DIV_Fp80m64
    0U,	// DIV_FpI16m32
    0U,	// DIV_FpI16m64
    0U,	// DIV_FpI16m80
    0U,	// DIV_FpI32m32
    0U,	// DIV_FpI32m64
    0U,	// DIV_FpI32m80
    163580054U,	// DIV_FrST0
    139085994U,	// DPPDrmi
    138561706U,	// DPPDrri
    139086000U,	// DPPSrmi
    138561712U,	// DPPSrri
    2230U,	// DS_PREFIX
    134219961U,	// EH_RETURN
    134219961U,	// EH_RETURN64
    139331792U,	// ENTER
    2263U,	// ES_PREFIX
    943737050U,	// EXTRACTPSmr
    139348186U,	// EXTRACTPSrr
    2277U,	// F2XM1
    139331819U,	// FARCALL16i
    1879050475U,	// FARCALL16m
    139331819U,	// FARCALL32i
    1879050475U,	// FARCALL32m
    1879050475U,	// FARCALL64
    139331826U,	// FARJMP16i
    1879050482U,	// FARJMP16m
    139331826U,	// FARJMP32i
    1879050482U,	// FARJMP32m
    1879050482U,	// FARJMP64
    939526392U,	// FBLDm
    939526398U,	// FBSTPm
    939526013U,	// FCOM32m
    1073743741U,	// FCOM64m
    939525991U,	// FCOMP32m
    1073743719U,	// FCOMP64m
    2309U,	// FCOMPP
    2316U,	// FDECSTP
    2324U,	// FEMMS
    134220058U,	// FFREE
    268437793U,	// FICOM16m
    536873249U,	// FICOM32m
    268437800U,	// FICOMP16m
    536873256U,	// FICOMP32m
    2352U,	// FINCSTP
    268437816U,	// FLDCW16m
    939526463U,	// FLDENVm
    2375U,	// FLDL2E
    2382U,	// FLDL2T
    2389U,	// FLDLG2
    2396U,	// FLDLN2
    2403U,	// FLDPI
    2409U,	// FNCLEX
    2416U,	// FNINIT
    2423U,	// FNOP
    268437884U,	// FNSTCW16m
    2436U,	// FNSTSW8r
    939526543U,	// FNSTSWm
    0U,	// FP32_TO_INT16_IN_MEM
    0U,	// FP32_TO_INT32_IN_MEM
    0U,	// FP32_TO_INT64_IN_MEM
    0U,	// FP64_TO_INT16_IN_MEM
    0U,	// FP64_TO_INT32_IN_MEM
    0U,	// FP64_TO_INT64_IN_MEM
    0U,	// FP80_TO_INT16_IN_MEM
    0U,	// FP80_TO_INT32_IN_MEM
    0U,	// FP80_TO_INT64_IN_MEM
    2455U,	// FPATAN
    2462U,	// FPREM
    2468U,	// FPREM1
    2475U,	// FPTAN
    2481U,	// FRNDINT
    939526585U,	// FRSTORm
    939526593U,	// FSAVEm
    2505U,	// FSCALE
    2512U,	// FSINCOS
    939526616U,	// FSTENVm
    2529U,	// FS_PREFIX
    2532U,	// FXAM
    1879050729U,	// FXRSTOR
    1879050738U,	// FXRSTOR64
    1879050748U,	// FXSAVE
    1879050756U,	// FXSAVE64
    2573U,	// FXTRACT
    2581U,	// FYL2X
    2587U,	// FYL2XP1
    0U,	// FpPOP_RETVAL
    138674533U,	// FsANDNPDrm
    138543461U,	// FsANDNPDrr
    138674541U,	// FsANDNPSrm
    138543469U,	// FsANDNPSrr
    138674549U,	// FsANDPDrm
    138543477U,	// FsANDPDrr
    138674556U,	// FsANDPSrm
    138543484U,	// FsANDPSrr
    0U,	// FsFLD0SD
    0U,	// FsFLD0SS
    140380707U,	// FsMOVAPDrm
    139332131U,	// FsMOVAPDrr
    140380715U,	// FsMOVAPSrm
    139332139U,	// FsMOVAPSrr
    138676787U,	// FsORPDrm
    138545715U,	// FsORPDrr
    138676793U,	// FsORPSrm
    138545721U,	// FsORPSrr
    140380735U,	// FsVMOVAPDrm
    139332159U,	// FsVMOVAPDrr
    140380744U,	// FsVMOVAPSrm
    139332168U,	// FsVMOVAPSrr
    138676817U,	// FsXORPDrm
    138545745U,	// FsXORPDrr
    138676824U,	// FsXORPSrm
    138545752U,	// FsXORPSrr
    2655U,	// GS_PREFIX
    138676834U,	// HADDPDrm
    138545762U,	// HADDPDrr
    138676842U,	// HADDPSrm
    138545770U,	// HADDPSrr
    2674U,	// HLT
    138676854U,	// HSUBPDrm
    138545782U,	// HSUBPDrr
    138676862U,	// HSUBPSrm
    138545790U,	// HSUBPSrr
    268438150U,	// IDIV16m
    134220422U,	// IDIV16r
    536873606U,	// IDIV32m
    134220422U,	// IDIV32r
    671091334U,	// IDIV64m
    134220422U,	// IDIV64r
    805309062U,	// IDIV8m
    134220422U,	// IDIV8r
    268438156U,	// ILD_F16m
    536873612U,	// ILD_F32m
    671091340U,	// ILD_F64m
    0U,	// ILD_Fp16m32
    0U,	// ILD_Fp16m64
    0U,	// ILD_Fp16m80
    0U,	// ILD_Fp32m32
    0U,	// ILD_Fp32m64
    0U,	// ILD_Fp32m80
    0U,	// ILD_Fp64m32
    0U,	// ILD_Fp64m64
    0U,	// ILD_Fp64m80
    268438162U,	// IMUL16m
    134220434U,	// IMUL16r
    139856530U,	// IMUL16rm
    139479698U,	// IMUL16rmi
    139479698U,	// IMUL16rmi8
    138545810U,	// IMUL16rr
    139348626U,	// IMUL16rri
    139348626U,	// IMUL16rri8
    536873618U,	// IMUL32m
    134220434U,	// IMUL32r
    139987602U,	// IMUL32rm
    139610770U,	// IMUL32rmi
    139610770U,	// IMUL32rmi8
    138545810U,	// IMUL32rr
    139348626U,	// IMUL32rri
    139348626U,	// IMUL32rri8
    671091346U,	// IMUL64m
    134220434U,	// IMUL64r
    140118674U,	// IMUL64rm
    139741842U,	// IMUL64rmi32
    139741842U,	// IMUL64rmi8
    138545810U,	// IMUL64rr
    139348626U,	// IMUL64rri32
    139348626U,	// IMUL64rri8
    805309074U,	// IMUL8m
    134220434U,	// IMUL8r
    2712U,	// IN16
    134220444U,	// IN16ri
    2724U,	// IN16rr
    2712U,	// IN32
    134220462U,	// IN32ri
    2743U,	// IN32rr
    2712U,	// IN8
    134220482U,	// IN8ri
    2762U,	// IN8rr
    268438228U,	// INC16m
    134220500U,	// INC16r
    536873684U,	// INC32m
    134220500U,	// INC32r
    268438228U,	// INC64_16m
    134220500U,	// INC64_16r
    536873684U,	// INC64_32m
    134220500U,	// INC64_32r
    671091412U,	// INC64m
    134220500U,	// INC64r
    805309140U,	// INC8m
    134220500U,	// INC8r
    138955481U,	// INSERTPSrm
    138562265U,	// INSERTPSrr
    134220515U,	// INT
    2792U,	// INT3
    2797U,	// INTO
    2802U,	// INVD
    139201271U,	// INVEPT32
    139201271U,	// INVEPT64
    805309183U,	// INVLPG
    139201287U,	// INVVPID32
    139201287U,	// INVVPID64
    2832U,	// IRET16
    2838U,	// IRET32
    2844U,	// IRET64
    268438306U,	// ISTT_FP16m
    536873762U,	// ISTT_FP32m
    671091490U,	// ISTT_FP64m
    0U,	// ISTT_Fp16m32
    0U,	// ISTT_Fp16m64
    0U,	// ISTT_Fp16m80
    0U,	// ISTT_Fp32m32
    0U,	// ISTT_Fp32m64
    0U,	// ISTT_Fp32m80
    0U,	// ISTT_Fp64m32
    0U,	// ISTT_Fp64m64
    0U,	// ISTT_Fp64m80
    268438314U,	// IST_F16m
    536873770U,	// IST_F32m
    268438320U,	// IST_FP16m
    536873776U,	// IST_FP32m
    671091504U,	// IST_FP64m
    0U,	// IST_Fp16m32
    0U,	// IST_Fp16m64
    0U,	// IST_Fp16m80
    0U,	// IST_Fp32m32
    0U,	// IST_Fp32m64
    0U,	// IST_Fp32m80
    0U,	// IST_Fp64m32
    0U,	// IST_Fp64m64
    0U,	// IST_Fp64m80
    1523058431U,	// Int_CMPSDrm
    1656882943U,	// Int_CMPSDrr
    1527252735U,	// Int_CMPSSrm
    1661077247U,	// Int_CMPSSrr
    140379991U,	// Int_COMISDrm
    139331415U,	// Int_COMISDrr
    140379999U,	// Int_COMISSrm
    139331423U,	// Int_COMISSrr
    139724701U,	// Int_CVTDQ2PDrm
    139331485U,	// Int_CVTDQ2PDrr
    139200423U,	// Int_CVTDQ2PSrm
    139331495U,	// Int_CVTDQ2PSrr
    140380081U,	// Int_CVTPD2DQrm
    139331505U,	// Int_CVTPD2DQrr
    140380091U,	// Int_CVTPD2PSrm
    139331515U,	// Int_CVTPD2PSrr
    140380101U,	// Int_CVTPS2DQrm
    139331525U,	// Int_CVTPS2DQrr
    140511183U,	// Int_CVTPS2PDrm
    139331535U,	// Int_CVTPS2PDrr
    138807267U,	// Int_CVTSD2SSrm
    138545123U,	// Int_CVTSD2SSrr
    140117997U,	// Int_CVTSI2SD64rm
    138545133U,	// Int_CVTSI2SD64rr
    139986925U,	// Int_CVTSI2SDrm
    138545133U,	// Int_CVTSI2SDrr
    140118007U,	// Int_CVTSI2SS64rm
    138545143U,	// Int_CVTSI2SS64rr
    139986935U,	// Int_CVTSI2SSrm
    138545143U,	// Int_CVTSI2SSrr
    138938369U,	// Int_CVTSS2SDrm
    138545153U,	// Int_CVTSS2SDrr
    140380203U,	// Int_CVTTSD2SI64rm
    139331627U,	// Int_CVTTSD2SI64rr
    140380203U,	// Int_CVTTSD2SIrm
    139331627U,	// Int_CVTTSD2SIrr
    140642358U,	// Int_CVTTSS2SI64rm
    139331638U,	// Int_CVTTSS2SI64rr
    140642358U,	// Int_CVTTSS2SIrm
    139331638U,	// Int_CVTTSS2SIrr
    2871U,	// Int_MemBarrier
    134220611U,	// Int_MemBarrierNoSSE64
    140381013U,	// Int_UCOMISDrm
    139332437U,	// Int_UCOMISDrr
    140381022U,	// Int_UCOMISSrm
    139332446U,	// Int_UCOMISSrr
    1523469159U,	// Int_VCMPSDrm
    1657686887U,	// Int_VCMPSDrr
    1527663463U,	// Int_VCMPSSrm
    1661881191U,	// Int_VCMPSSrr
    140381036U,	// Int_VCOMISDrm
    139332460U,	// Int_VCOMISDrr
    140381045U,	// Int_VCOMISSrm
    139332469U,	// Int_VCOMISSrr
    139725694U,	// Int_VCVTDQ2PDrm
    139332478U,	// Int_VCVTDQ2PDrr
    139201417U,	// Int_VCVTDQ2PSrm
    139332489U,	// Int_VCVTDQ2PSrr
    140381076U,	// Int_VCVTPD2DQrm
    139332500U,	// Int_VCVTPD2DQrr
    140381087U,	// Int_VCVTPD2PSrm
    139332511U,	// Int_VCVTPD2PSrr
    140381098U,	// Int_VCVTPS2DQrm
    139332522U,	// Int_VCVTPS2DQrr
    140512181U,	// Int_VCVTPS2PDrm
    139332533U,	// Int_VCVTPS2PDrr
    140381120U,	// Int_VCVTSD2SI64rm
    139332544U,	// Int_VCVTSD2SI64rr
    140381120U,	// Int_VCVTSD2SIrm
    139332544U,	// Int_VCVTSD2SIrr
    139348939U,	// Int_VCVTSD2SSrm
    139348939U,	// Int_VCVTSD2SSrr
    139348950U,	// Int_VCVTSI2SD64rm
    139348950U,	// Int_VCVTSI2SD64rr
    139348950U,	// Int_VCVTSI2SDrm
    139348950U,	// Int_VCVTSI2SDrr
    139348961U,	// Int_VCVTSI2SS64rm
    139348961U,	// Int_VCVTSI2SS64rr
    139348961U,	// Int_VCVTSI2SSrm
    139348961U,	// Int_VCVTSI2SSrr
    139348972U,	// Int_VCVTSS2SDrm
    139348972U,	// Int_VCVTSS2SDrr
    140381175U,	// Int_VCVTTPS2DQrm
    139332599U,	// Int_VCVTTPS2DQrr
    140381187U,	// Int_VCVTTSD2SI64rm
    139332611U,	// Int_VCVTTSD2SI64rr
    140381187U,	// Int_VCVTTSD2SIrm
    139332611U,	// Int_VCVTTSD2SIrr
    140643343U,	// Int_VCVTTSS2SI64rm
    139332623U,	// Int_VCVTTSS2SI64rr
    140643343U,	// Int_VCVTTSS2SIrm
    139332623U,	// Int_VCVTTSS2SIrr
    140381211U,	// Int_VUCOMISDrm
    139332635U,	// Int_VUCOMISDrr
    140381221U,	// Int_VUCOMISSrm
    139332645U,	// Int_VUCOMISSrr
    1342180399U,	// JAE_1
    1342180399U,	// JAE_4
    1342180404U,	// JA_1
    1342180404U,	// JA_4
    1342180408U,	// JBE_1
    1342180408U,	// JBE_4
    1342180413U,	// JB_1
    1342180413U,	// JB_4
    1342180417U,	// JCXZ
    1342180423U,	// JECXZ_32
    1342180423U,	// JECXZ_64
    1342180430U,	// JE_1
    1342180430U,	// JE_4
    1342180434U,	// JGE_1
    1342180434U,	// JGE_4
    1342180439U,	// JG_1
    1342180439U,	// JG_4
    1342180443U,	// JLE_1
    1342180443U,	// JLE_4
    1342180448U,	// JL_1
    1342180448U,	// JL_4
    536874084U,	// JMP32m
    134220900U,	// JMP32r
    671091812U,	// JMP64m
    1342180452U,	// JMP64pcrel32
    134220900U,	// JMP64r
    1342180452U,	// JMP_1
    1342180452U,	// JMP_4
    1342180457U,	// JNE_1
    1342180457U,	// JNE_4
    1342180462U,	// JNO_1
    1342180462U,	// JNO_4
    1342180467U,	// JNP_1
    1342180467U,	// JNP_4
    1342180472U,	// JNS_1
    1342180472U,	// JNS_4
    1342180477U,	// JO_1
    1342180477U,	// JO_4
    1342180481U,	// JP_1
    1342180481U,	// JP_4
    1342180485U,	// JRCXZ
    1342180492U,	// JS_1
    1342180492U,	// JS_4
    3216U,	// LAHF
    139463829U,	// LAR16rm
    139332757U,	// LAR16rr
    139463829U,	// LAR32rm
    139332757U,	// LAR32rr
    139463829U,	// LAR64rm
    139332757U,	// LAR64rr
    272632986U,	// LCMPXCHG16
    1744833705U,	// LCMPXCHG16B
    541068442U,	// LCMPXCHG32
    675286170U,	// LCMPXCHG64
    809503898U,	// LCMPXCHG8
    671091899U,	// LCMPXCHG8B
    139201740U,	// LDDQUrm
    536874195U,	// LDMXCSR
    140774620U,	// LDS16rm
    140774620U,	// LDS32rm
    3297U,	// LD_F0
    3302U,	// LD_F1
    939527403U,	// LD_F32m
    1073745131U,	// LD_F64m
    2013269227U,	// LD_F80m
    0U,	// LD_Fp032
    0U,	// LD_Fp064
    0U,	// LD_Fp080
    0U,	// LD_Fp132
    0U,	// LD_Fp164
    0U,	// LD_Fp180
    0U,	// LD_Fp32m
    0U,	// LD_Fp32m64
    0U,	// LD_Fp32m80
    0U,	// LD_Fp64m
    0U,	// LD_Fp64m80
    0U,	// LD_Fp80m
    134221035U,	// LD_Frr
    139594992U,	// LEA16r
    139594992U,	// LEA32r
    139594992U,	// LEA64_32r
    139726064U,	// LEA64r
    3317U,	// LEAVE
    3317U,	// LEAVE64
    140774651U,	// LES16rm
    140774651U,	// LES32rm
    3328U,	// LFENCE
    140774663U,	// LFS16rm
    140774663U,	// LFS32rm
    140774663U,	// LFS64rm
    1879051532U,	// LGDT16m
    1879051539U,	// LGDTm
    140774681U,	// LGS16rm
    140774681U,	// LGS32rm
    140774681U,	// LGS64rm
    1879051550U,	// LIDT16m
    1879051557U,	// LIDTm
    268438827U,	// LLDT16m
    134221099U,	// LLDT16r
    268438833U,	// LMSW16m
    134221105U,	// LMSW16r
    272633143U,	// LOCK_ADD16mi
    272633143U,	// LOCK_ADD16mi8
    272633143U,	// LOCK_ADD16mr
    541068599U,	// LOCK_ADD32mi
    541068599U,	// LOCK_ADD32mi8
    541068599U,	// LOCK_ADD32mr
    675286327U,	// LOCK_ADD64mi32
    675286327U,	// LOCK_ADD64mi8
    675286327U,	// LOCK_ADD64mr
    809504055U,	// LOCK_ADD8mi
    809504055U,	// LOCK_ADD8mr
    272633154U,	// LOCK_AND16mi
    272633154U,	// LOCK_AND16mi8
    272633154U,	// LOCK_AND16mr
    541068610U,	// LOCK_AND32mi
    541068610U,	// LOCK_AND32mi8
    541068610U,	// LOCK_AND32mr
    675286338U,	// LOCK_AND64mi32
    675286338U,	// LOCK_AND64mi8
    675286338U,	// LOCK_AND64mr
    809504066U,	// LOCK_AND8mi
    809504066U,	// LOCK_AND8mr
    268438861U,	// LOCK_DEC16m
    536874317U,	// LOCK_DEC32m
    671092045U,	// LOCK_DEC64m
    805309773U,	// LOCK_DEC8m
    268438872U,	// LOCK_INC16m
    536874328U,	// LOCK_INC32m
    671092056U,	// LOCK_INC64m
    805309784U,	// LOCK_INC8m
    272633187U,	// LOCK_OR16mi
    272633187U,	// LOCK_OR16mi8
    272633187U,	// LOCK_OR16mr
    541068643U,	// LOCK_OR32mi
    541068643U,	// LOCK_OR32mi8
    541068643U,	// LOCK_OR32mr
    675286371U,	// LOCK_OR64mi32
    675286371U,	// LOCK_OR64mi8
    675286371U,	// LOCK_OR64mr
    809504099U,	// LOCK_OR8mi
    809504099U,	// LOCK_OR8mr
    3437U,	// LOCK_PREFIX
    272633202U,	// LOCK_SUB16mi
    272633202U,	// LOCK_SUB16mi8
    272633202U,	// LOCK_SUB16mr
    541068658U,	// LOCK_SUB32mi
    541068658U,	// LOCK_SUB32mi8
    541068658U,	// LOCK_SUB32mr
    675286386U,	// LOCK_SUB64mi32
    675286386U,	// LOCK_SUB64mi8
    675286386U,	// LOCK_SUB64mr
    809504114U,	// LOCK_SUB8mi
    809504114U,	// LOCK_SUB8mr
    272633213U,	// LOCK_XOR16mi
    272633213U,	// LOCK_XOR16mi8
    272633213U,	// LOCK_XOR16mr
    541068669U,	// LOCK_XOR32mi
    541068669U,	// LOCK_XOR32mi8
    541068669U,	// LOCK_XOR32mr
    675286397U,	// LOCK_XOR64mi32
    675286397U,	// LOCK_XOR64mi8
    675286397U,	// LOCK_XOR64mr
    809504125U,	// LOCK_XOR8mi
    809504125U,	// LOCK_XOR8mr
    3464U,	// LODSB
    3470U,	// LODSD
    3476U,	// LODSQ
    3482U,	// LODSW
    1342180768U,	// LOOP
    1342180774U,	// LOOPE
    1342180781U,	// LOOPNE
    134221237U,	// LRETI
    134221243U,	// LRETIW
    3522U,	// LRETL
    3528U,	// LRETQ
    139464142U,	// LSL16rm
    139333070U,	// LSL16rr
    139595214U,	// LSL32rm
    139333070U,	// LSL32rr
    139726286U,	// LSL64rm
    139333070U,	// LSL64rr
    140774867U,	// LSS16rm
    140774867U,	// LSS32rm
    140774867U,	// LSS64rm
    3544U,	// LTRm
    3544U,	// LTRr
    2147487197U,	// LXADD16
    2281704925U,	// LXADD32
    2415922653U,	// LXADD64
    2550140381U,	// LXADD8
    139464169U,	// LZCNT16rm
    139333097U,	// LZCNT16rr
    139595241U,	// LZCNT32rm
    139333097U,	// LZCNT32rr
    139726313U,	// LZCNT64rm
    139333097U,	// LZCNT64rr
    139333104U,	// MASKMOVDQU
    139333104U,	// MASKMOVDQU64
    138677756U,	// MAXPDrm
    138677756U,	// MAXPDrm_Int
    138546684U,	// MAXPDrr
    138546684U,	// MAXPDrr_Int
    138677763U,	// MAXPSrm
    138677763U,	// MAXPSrm_Int
    138546691U,	// MAXPSrr
    138546691U,	// MAXPSrr_Int
    138808842U,	// MAXSDrm
    138808842U,	// MAXSDrm_Int
    138546698U,	// MAXSDrr
    138546698U,	// MAXSDrr_Int
    138939921U,	// MAXSSrm
    138939921U,	// MAXSSrm_Int
    138546705U,	// MAXSSrr
    138546705U,	// MAXSSrr_Int
    3608U,	// MFENCE
    138677791U,	// MINPDrm
    138677791U,	// MINPDrm_Int
    138546719U,	// MINPDrr
    138546719U,	// MINPDrr_Int
    138677798U,	// MINPSrm
    138677798U,	// MINPSrm_Int
    138546726U,	// MINPSrr
    138546726U,	// MINPSrr_Int
    138808877U,	// MINSDrm
    138808877U,	// MINSDrm_Int
    138546733U,	// MINSDrr
    138546733U,	// MINSDrr_Int
    138939956U,	// MINSSrm
    138939956U,	// MINSSrm_Int
    138546740U,	// MINSSrr
    138546740U,	// MINSSrr_Int
    140381755U,	// MMX_CVTPD2PIirm
    139333179U,	// MMX_CVTPD2PIirr
    139726405U,	// MMX_CVTPI2PDirm
    139333189U,	// MMX_CVTPI2PDirr
    140119631U,	// MMX_CVTPI2PSirm
    138546767U,	// MMX_CVTPI2PSirr
    140512857U,	// MMX_CVTPS2PIirm
    139333209U,	// MMX_CVTPS2PIirr
    140381795U,	// MMX_CVTTPD2PIirm
    139333219U,	// MMX_CVTTPD2PIirr
    140512878U,	// MMX_CVTTPS2PIirm
    139333230U,	// MMX_CVTTPS2PIirr
    3705U,	// MMX_EMMS
    139333246U,	// MMX_MASKMOVQ
    139333246U,	// MMX_MASKMOVQ64
    139333256U,	// MMX_MOVD64from64rr
    139333256U,	// MMX_MOVD64grr
    541068936U,	// MMX_MOVD64mr
    139595400U,	// MMX_MOVD64rm
    139333256U,	// MMX_MOVD64rr
    139333256U,	// MMX_MOVD64rrv164
    139333256U,	// MMX_MOVD64to64rr
    139333262U,	// MMX_MOVDQ2Qrr
    139333262U,	// MMX_MOVFR642Qrr
    675286679U,	// MMX_MOVNTQmr
    139333279U,	// MMX_MOVQ2DQrr
    139333279U,	// MMX_MOVQ2FR64rr
    675286696U,	// MMX_MOVQ64mr
    139726504U,	// MMX_MOVQ64rm
    139333288U,	// MMX_MOVQ64rr
    139595400U,	// MMX_MOVZDI2PDIrm
    139333256U,	// MMX_MOVZDI2PDIrr
    139726510U,	// MMX_PABSBrm64
    139333294U,	// MMX_PABSBrr64
    139726517U,	// MMX_PABSDrm64
    139333301U,	// MMX_PABSDrr64
    139726524U,	// MMX_PABSWrm64
    139333308U,	// MMX_PABSWrr64
    140119747U,	// MMX_PACKSSDWirm
    138546883U,	// MMX_PACKSSDWirr
    140119757U,	// MMX_PACKSSWBirm
    138546893U,	// MMX_PACKSSWBirr
    140119767U,	// MMX_PACKUSWBirm
    138546903U,	// MMX_PACKUSWBirr
    140119777U,	// MMX_PADDBirm
    138546913U,	// MMX_PADDBirr
    140119784U,	// MMX_PADDDirm
    138546920U,	// MMX_PADDDirr
    140119791U,	// MMX_PADDQirm
    138546927U,	// MMX_PADDQirr
    140119798U,	// MMX_PADDSBirm
    138546934U,	// MMX_PADDSBirr
    140119806U,	// MMX_PADDSWirm
    138546942U,	// MMX_PADDSWirr
    140119814U,	// MMX_PADDUSBirm
    138546950U,	// MMX_PADDUSBirr
    140119823U,	// MMX_PADDUSWirm
    138546959U,	// MMX_PADDUSWirr
    140119832U,	// MMX_PADDWirm
    138546968U,	// MMX_PADDWirr
    140136223U,	// MMX_PALIGNR64irm
    138563359U,	// MMX_PALIGNR64irr
    140119848U,	// MMX_PANDNirm
    138546984U,	// MMX_PANDNirr
    140119855U,	// MMX_PANDirm
    138546991U,	// MMX_PANDirr
    140119861U,	// MMX_PAVGBirm
    138546997U,	// MMX_PAVGBirr
    140119868U,	// MMX_PAVGWirm
    138547004U,	// MMX_PAVGWirr
    140119875U,	// MMX_PCMPEQBirm
    138547011U,	// MMX_PCMPEQBirr
    140119884U,	// MMX_PCMPEQDirm
    138547020U,	// MMX_PCMPEQDirr
    140119893U,	// MMX_PCMPEQWirm
    138547029U,	// MMX_PCMPEQWirr
    140119902U,	// MMX_PCMPGTBirm
    138547038U,	// MMX_PCMPGTBirr
    140119911U,	// MMX_PCMPGTDirm
    138547047U,	// MMX_PCMPGTDirr
    140119920U,	// MMX_PCMPGTWirm
    138547056U,	// MMX_PCMPGTWirr
    139349881U,	// MMX_PEXTRWirri
    140119937U,	// MMX_PHADDSWrm64
    138547073U,	// MMX_PHADDSWrr64
    140119946U,	// MMX_PHADDWrm64
    138547082U,	// MMX_PHADDWrr64
    140119954U,	// MMX_PHADDrm64
    138547090U,	// MMX_PHADDrr64
    140119962U,	// MMX_PHSUBDrm64
    138547098U,	// MMX_PHSUBDrr64
    140119970U,	// MMX_PHSUBSWrm64
    138547106U,	// MMX_PHSUBSWrr64
    140119979U,	// MMX_PHSUBWrm64
    138547115U,	// MMX_PHSUBWrr64
    139874227U,	// MMX_PINSRWirmi
    138563507U,	// MMX_PINSRWirri
    140119995U,	// MMX_PMADDUBSWrm64
    138547131U,	// MMX_PMADDUBSWrr64
    140120006U,	// MMX_PMADDWDirm
    138547142U,	// MMX_PMADDWDirr
    140120015U,	// MMX_PMAXSWirm
    138547151U,	// MMX_PMAXSWirr
    140120023U,	// MMX_PMAXUBirm
    138547159U,	// MMX_PMAXUBirr
    140120031U,	// MMX_PMINSWirm
    138547167U,	// MMX_PMINSWirr
    140120039U,	// MMX_PMINUBirm
    138547175U,	// MMX_PMINUBirr
    139333615U,	// MMX_PMOVMSKBrr
    140120057U,	// MMX_PMULHRSWrm64
    138547193U,	// MMX_PMULHRSWrr64
    140120067U,	// MMX_PMULHUWirm
    138547203U,	// MMX_PMULHUWirr
    140120076U,	// MMX_PMULHWirm
    138547212U,	// MMX_PMULHWirr
    140120084U,	// MMX_PMULLWirm
    138547220U,	// MMX_PMULLWirr
    140120092U,	// MMX_PMULUDQirm
    138547228U,	// MMX_PMULUDQirr
    140120101U,	// MMX_PORirm
    138547237U,	// MMX_PORirr
    140120106U,	// MMX_PSADBWirm
    138547242U,	// MMX_PSADBWirr
    140120114U,	// MMX_PSHUFBrm64
    138547250U,	// MMX_PSHUFBrr64
    139743290U,	// MMX_PSHUFWmi
    139350074U,	// MMX_PSHUFWri
    140120130U,	// MMX_PSIGNBrm64
    138547266U,	// MMX_PSIGNBrr64
    140120138U,	// MMX_PSIGNDrm64
    138547274U,	// MMX_PSIGNDrr64
    140120146U,	// MMX_PSIGNWrm64
    138547282U,	// MMX_PSIGNWrr64
    138547290U,	// MMX_PSLLDri
    140120154U,	// MMX_PSLLDrm
    138547290U,	// MMX_PSLLDrr
    138547297U,	// MMX_PSLLQri
    140120161U,	// MMX_PSLLQrm
    138547297U,	// MMX_PSLLQrr
    138547304U,	// MMX_PSLLWri
    140120168U,	// MMX_PSLLWrm
    138547304U,	// MMX_PSLLWrr
    138547311U,	// MMX_PSRADri
    140120175U,	// MMX_PSRADrm
    138547311U,	// MMX_PSRADrr
    138547318U,	// MMX_PSRAWri
    140120182U,	// MMX_PSRAWrm
    138547318U,	// MMX_PSRAWrr
    138547325U,	// MMX_PSRLDri
    140120189U,	// MMX_PSRLDrm
    138547325U,	// MMX_PSRLDrr
    138547332U,	// MMX_PSRLQri
    140120196U,	// MMX_PSRLQrm
    138547332U,	// MMX_PSRLQrr
    138547339U,	// MMX_PSRLWri
    140120203U,	// MMX_PSRLWrm
    138547339U,	// MMX_PSRLWrr
    140120210U,	// MMX_PSUBBirm
    138547346U,	// MMX_PSUBBirr
    140120217U,	// MMX_PSUBDirm
    138547353U,	// MMX_PSUBDirr
    140120224U,	// MMX_PSUBQirm
    138547360U,	// MMX_PSUBQirr
    140120231U,	// MMX_PSUBSBirm
    138547367U,	// MMX_PSUBSBirr
    140120239U,	// MMX_PSUBSWirm
    138547375U,	// MMX_PSUBSWirr
    140120247U,	// MMX_PSUBUSBirm
    138547383U,	// MMX_PSUBUSBirr
    140120256U,	// MMX_PSUBUSWirm
    138547392U,	// MMX_PSUBUSWirr
    140120265U,	// MMX_PSUBWirm
    138547401U,	// MMX_PSUBWirr
    140120272U,	// MMX_PUNPCKHBWirm
    138547408U,	// MMX_PUNPCKHBWirr
    140120283U,	// MMX_PUNPCKHDQirm
    138547419U,	// MMX_PUNPCKHDQirr
    140120294U,	// MMX_PUNPCKHWDirm
    138547430U,	// MMX_PUNPCKHWDirr
    140120305U,	// MMX_PUNPCKLBWirm
    138547441U,	// MMX_PUNPCKLBWirr
    140120316U,	// MMX_PUNPCKLDQirm
    138547452U,	// MMX_PUNPCKLDQirr
    140120327U,	// MMX_PUNPCKLWDirm
    138547463U,	// MMX_PUNPCKLWDirr
    140120338U,	// MMX_PXORirm
    138547474U,	// MMX_PXORirr
    0U,	// MONITOR
    4376U,	// MONITORrrr
    4384U,	// MONTMUL
    1396707624U,	// MOV16ao16
    272634152U,	// MOV16mi
    272634152U,	// MOV16mr
    272634152U,	// MOV16ms
    1342181677U,	// MOV16o16a
    0U,	// MOV16r0
    139333928U,	// MOV16ri
    139465000U,	// MOV16rm
    139333928U,	// MOV16rr
    139333928U,	// MOV16rr_REV
    139333928U,	// MOV16rs
    139465000U,	// MOV16sm
    139333928U,	// MOV16sr
    1400901928U,	// MOV32ao32
    139333928U,	// MOV32cr
    139333928U,	// MOV32dr
    541069608U,	// MOV32mi
    541069608U,	// MOV32mr
    541069608U,	// MOV32ms
    1342181686U,	// MOV32o32a
    0U,	// MOV32r0
    139333928U,	// MOV32rc
    139333928U,	// MOV32rd
    139333928U,	// MOV32ri
    139596072U,	// MOV32rm
    139333928U,	// MOV32rr
    139333928U,	// MOV32rr_REV
    139333928U,	// MOV32rs
    139596072U,	// MOV32sm
    139333928U,	// MOV32sr
    139333928U,	// MOV64cr
    139333928U,	// MOV64dr
    675287336U,	// MOV64mi32
    675287336U,	// MOV64mr
    675287336U,	// MOV64ms
    0U,	// MOV64r0
    139333928U,	// MOV64rc
    139333928U,	// MOV64rd
    139333952U,	// MOV64ri
    139333928U,	// MOV64ri32
    0U,	// MOV64ri64i32
    139727144U,	// MOV64rm
    139333928U,	// MOV64rr
    139333928U,	// MOV64rr_REV
    139333928U,	// MOV64rs
    139727144U,	// MOV64sm
    139333928U,	// MOV64sr
    139333288U,	// MOV64toPQIrr
    139726504U,	// MOV64toSDrm
    139333288U,	// MOV64toSDrr
    1396707624U,	// MOV8ao8
    809505064U,	// MOV8mi
    809505064U,	// MOV8mr
    809537832U,	// MOV8mr_NOREX
    1342181677U,	// MOV8o8a
    0U,	// MOV8r0
    139333928U,	// MOV8ri
    140251432U,	// MOV8rm
    140284200U,	// MOV8rm_NOREX
    139333928U,	// MOV8rr
    139366696U,	// MOV8rr_NOREX
    139333928U,	// MOV8rr_REV
    2684357155U,	// MOVAPDmr
    140380707U,	// MOVAPDrm
    139332131U,	// MOVAPDrr
    139332131U,	// MOVAPDrr_REV
    2684357163U,	// MOVAPSmr
    140380715U,	// MOVAPSrm
    139332139U,	// MOVAPSrr
    139332139U,	// MOVAPSrr_REV
    272634184U,	// MOVBE16mr
    139465032U,	// MOVBE16rm
    541069640U,	// MOVBE32mr
    139596104U,	// MOVBE32rm
    675287368U,	// MOVBE64mr
    139727176U,	// MOVBE64rm
    140513615U,	// MOVDDUPrm
    139333967U,	// MOVDDUPrr
    139595400U,	// MOVDI2PDIrm
    139333256U,	// MOVDI2PDIrr
    139595400U,	// MOVDI2SSrm
    139333256U,	// MOVDI2SSrr
    1749029208U,	// MOVDQAmr
    139202904U,	// MOVDQArm
    139333976U,	// MOVDQArr
    139333976U,	// MOVDQArr_REV
    1749029216U,	// MOVDQUmr
    1749029216U,	// MOVDQUmr_Int
    139202912U,	// MOVDQUrm
    139333984U,	// MOVDQUrr
    139333984U,	// MOVDQUrr_REV
    138547560U,	// MOVHLPSrr
    1077940593U,	// MOVHPDmr
    138809713U,	// MOVHPDrm
    1077940601U,	// MOVHPSmr
    138809721U,	// MOVHPSrm
    138547585U,	// MOVLHPSrr
    1077940618U,	// MOVLPDmr
    138809738U,	// MOVLPDrm
    1077940626U,	// MOVLPSmr
    138809746U,	// MOVLPSrm
    675286696U,	// MOVLQ128mr
    139334042U,	// MOVMSKPDrr32
    139334042U,	// MOVMSKPDrr64
    139334052U,	// MOVMSKPSrr32
    139334052U,	// MOVMSKPSrr64
    139202990U,	// MOVNTDQArm
    2684359096U,	// MOVNTDQ_64mr
    2684359096U,	// MOVNTDQmr
    675287489U,	// MOVNTI_64mr
    541069761U,	// MOVNTImr
    2684359113U,	// MOVNTPDmr
    2684359122U,	// MOVNTPSmr
    0U,	// MOVPC32r
    541068936U,	// MOVPDI2DImr
    139333256U,	// MOVPDI2DIrr
    675286696U,	// MOVPQI2QImr
    139333288U,	// MOVPQIto64rr
    139726504U,	// MOVQI2PQIrm
    139333288U,	// MOVQxrxr
    4571U,	// MOVSB
    4577U,	// MOVSD
    1077940711U,	// MOVSDmr
    140513767U,	// MOVSDrm
    138547687U,	// MOVSDrr
    138547687U,	// MOVSDrr_REV
    675286696U,	// MOVSDto64mr
    139333288U,	// MOVSDto64rr
    140382702U,	// MOVSHDUPrm
    139334126U,	// MOVSHDUPrr
    140382712U,	// MOVSLDUPrm
    139334136U,	// MOVSLDUPrr
    4610U,	// MOVSQ
    541068936U,	// MOVSS2DImr
    139333256U,	// MOVSS2DIrr
    943723016U,	// MOVSSmr
    140644872U,	// MOVSSrm
    138547720U,	// MOVSSrr
    138547720U,	// MOVSSrr_REV
    4623U,	// MOVSW
    140251669U,	// MOVSX16rm8
    139334165U,	// MOVSX16rr8
    139465237U,	// MOVSX32rm16
    140251669U,	// MOVSX32rm8
    139334165U,	// MOVSX32rr16
    139334165U,	// MOVSX32rr8
    139465237U,	// MOVSX64rm16
    139596316U,	// MOVSX64rm32
    140251669U,	// MOVSX64rm8
    139334165U,	// MOVSX64rr16
    139334172U,	// MOVSX64rr32
    139334165U,	// MOVSX64rr8
    2684359204U,	// MOVUPDmr
    140382756U,	// MOVUPDrm
    139334180U,	// MOVUPDrr
    139334180U,	// MOVUPDrr_REV
    2684359212U,	// MOVUPSmr
    140382764U,	// MOVUPSrm
    139334188U,	// MOVUPSrr
    139334188U,	// MOVUPSrr_REV
    139595400U,	// MOVZDI2PDIrm
    139333256U,	// MOVZDI2PDIrr
    139202216U,	// MOVZPQILo2PQIrm
    139333288U,	// MOVZPQILo2PQIrr
    139726504U,	// MOVZQI2PQIrm
    139333288U,	// MOVZQI2PQIrr
    140251700U,	// MOVZX16rm8
    139334196U,	// MOVZX16rr8
    140251700U,	// MOVZX32_NOREXrm8
    139334196U,	// MOVZX32_NOREXrr8
    139465268U,	// MOVZX32rm16
    140251700U,	// MOVZX32rm8
    139334196U,	// MOVZX32rr16
    139334196U,	// MOVZX32rr8
    0U,	// MOVZX64rm16
    139465268U,	// MOVZX64rm16_Q
    0U,	// MOVZX64rm32
    0U,	// MOVZX64rm8
    140251700U,	// MOVZX64rm8_Q
    0U,	// MOVZX64rr16
    139334196U,	// MOVZX64rr16_Q
    0U,	// MOVZX64rr32
    0U,	// MOVZX64rr8
    139334196U,	// MOVZX64rr8_Q
    139088443U,	// MPSADBWrmi
    138564155U,	// MPSADBWrri
    268440132U,	// MUL16m
    134222404U,	// MUL16r
    536875588U,	// MUL32m
    134222404U,	// MUL32r
    671093316U,	// MUL64m
    134222404U,	// MUL64r
    805311044U,	// MUL8m
    134222404U,	// MUL8r
    138678857U,	// MULPDrm
    138547785U,	// MULPDrr
    138678864U,	// MULPSrm
    138547792U,	// MULPSrr
    138809943U,	// MULSDrm
    138809943U,	// MULSDrm_Int
    138547799U,	// MULSDrr
    138547799U,	// MULSDrr_Int
    138941022U,	// MULSSrm
    138941022U,	// MULSSrm_Int
    138547806U,	// MULSSrr
    138547806U,	// MULSSrr_Int
    939528805U,	// MUL_F32m
    1073746533U,	// MUL_F64m
    268440171U,	// MUL_FI16m
    536875627U,	// MUL_FI32m
    134222450U,	// MUL_FPrST0
    134222437U,	// MUL_FST0r
    0U,	// MUL_Fp32
    0U,	// MUL_Fp32m
    0U,	// MUL_Fp64
    0U,	// MUL_Fp64m
    0U,	// MUL_Fp64m32
    0U,	// MUL_Fp80
    0U,	// MUL_Fp80m32
    0U,	// MUL_Fp80m64
    0U,	// MUL_FpI16m32
    0U,	// MUL_FpI16m64
    0U,	// MUL_FpI16m80
    0U,	// MUL_FpI32m32
    0U,	// MUL_FpI32m64
    0U,	// MUL_FpI32m80
    163582565U,	// MUL_FrST0
    0U,	// MWAIT
    4729U,	// MWAITrr
    268440191U,	// NEG16m
    134222463U,	// NEG16r
    536875647U,	// NEG32m
    134222463U,	// NEG32r
    671093375U,	// NEG64m
    134222463U,	// NEG64r
    805311103U,	// NEG8m
    134222463U,	// NEG8r
    4740U,	// NOOP
    536875656U,	// NOOPL
    268440200U,	// NOOPW
    268440205U,	// NOT16m
    134222477U,	// NOT16r
    536875661U,	// NOT32m
    134222477U,	// NOT32r
    671093389U,	// NOT64m
    134222477U,	// NOT64r
    805311117U,	// NOT8m
    134222477U,	// NOT8r
    134222482U,	// OR16i16
    272634522U,	// OR16mi
    272634522U,	// OR16mi8
    272634522U,	// OR16mr
    411046554U,	// OR16ri
    411046554U,	// OR16ri8
    415240858U,	// OR16rm
    411046554U,	// OR16rr
    138547866U,	// OR16rr_REV
    134222494U,	// OR32i32
    541069978U,	// OR32mi
    541069978U,	// OR32mi8
    541069978U,	// OR32mr
    541068643U,	// OR32mrLocked
    411046554U,	// OR32ri
    411046554U,	// OR32ri8
    419435162U,	// OR32rm
    411046554U,	// OR32rr
    138547866U,	// OR32rr_REV
    134222503U,	// OR64i32
    675287706U,	// OR64mi32
    675287706U,	// OR64mi8
    675287706U,	// OR64mr
    411046554U,	// OR64ri32
    411046554U,	// OR64ri8
    423629466U,	// OR64rm
    411046554U,	// OR64rr
    138547866U,	// OR64rr_REV
    134222512U,	// OR8i8
    809505434U,	// OR8mi
    809505434U,	// OR8mr
    411046554U,	// OR8ri
    427823770U,	// OR8rm
    411046554U,	// OR8rr
    138547866U,	// OR8rr_REV
    138676787U,	// ORPDrm
    138545715U,	// ORPDrr
    138676793U,	// ORPSrm
    138545721U,	// ORPSrr
    197137080U,	// OUT16ir
    4797U,	// OUT16rr
    192942776U,	// OUT32ir
    4808U,	// OUT32rr
    188748472U,	// OUT8ir
    4820U,	// OUT8rr
    4831U,	// OUTSB
    4837U,	// OUTSD
    4843U,	// OUTSW
    139202222U,	// PABSBrm128
    139333294U,	// PABSBrr128
    139202229U,	// PABSDrm128
    139333301U,	// PABSDrr128
    139202236U,	// PABSWrm128
    139333308U,	// PABSWrr128
    139071171U,	// PACKSSDWrm
    138546883U,	// PACKSSDWrr
    139071181U,	// PACKSSWBrm
    138546893U,	// PACKSSWBrr
    139072241U,	// PACKUSDWrm
    138547953U,	// PACKUSDWrr
    139071191U,	// PACKUSWBrm
    138546903U,	// PACKUSWBrr
    139071201U,	// PADDBrm
    138546913U,	// PADDBrr
    139071208U,	// PADDDrm
    138546920U,	// PADDDrr
    139071215U,	// PADDQrm
    138546927U,	// PADDQrr
    139071222U,	// PADDSBrm
    138546934U,	// PADDSBrr
    139071230U,	// PADDSWrm
    138546942U,	// PADDSWrr
    139071238U,	// PADDUSBrm
    138546950U,	// PADDUSBrr
    139071247U,	// PADDUSWrm
    138546959U,	// PADDUSWrr
    139071256U,	// PADDWrm
    138546968U,	// PADDWrr
    139087647U,	// PALIGNR128rm
    138563359U,	// PALIGNR128rr
    139071272U,	// PANDNrm
    138546984U,	// PANDNrr
    139071279U,	// PANDrm
    138546991U,	// PANDrr
    4859U,	// PAUSE
    139071285U,	// PAVGBrm
    138546997U,	// PAVGBrr
    140120833U,	// PAVGUSBrm
    138547969U,	// PAVGUSBrr
    139071292U,	// PAVGWrm
    138547004U,	// PAVGWrr
    139072266U,	// PBLENDVBrm0
    138547978U,	// PBLENDVBrr0
    139088660U,	// PBLENDWrmi
    138564372U,	// PBLENDWrri
    139088669U,	// PCLMULQDQrm
    138564381U,	// PCLMULQDQrr
    139071299U,	// PCMPEQBrm
    138547011U,	// PCMPEQBrr
    139071308U,	// PCMPEQDrm
    138547020U,	// PCMPEQDrr
    139072296U,	// PCMPEQQrm
    138548008U,	// PCMPEQQrr
    139071317U,	// PCMPEQWrm
    138547029U,	// PCMPEQWrr
    139219761U,	// PCMPESTRIArm
    139350833U,	// PCMPESTRIArr
    139219761U,	// PCMPESTRICrm
    139350833U,	// PCMPESTRICrr
    139219761U,	// PCMPESTRIOrm
    139350833U,	// PCMPESTRIOrr
    139219761U,	// PCMPESTRISrm
    139350833U,	// PCMPESTRISrr
    139219761U,	// PCMPESTRIZrm
    139350833U,	// PCMPESTRIZrr
    139219761U,	// PCMPESTRIrm
    139350833U,	// PCMPESTRIrr
    0U,	// PCMPESTRM128MEM
    0U,	// PCMPESTRM128REG
    139219772U,	// PCMPESTRM128rm
    139350844U,	// PCMPESTRM128rr
    139071326U,	// PCMPGTBrm
    138547038U,	// PCMPGTBrr
    139071335U,	// PCMPGTDrm
    138547047U,	// PCMPGTDrr
    139072327U,	// PCMPGTQrm
    138548039U,	// PCMPGTQrr
    139071344U,	// PCMPGTWrm
    138547056U,	// PCMPGTWrr
    139219792U,	// PCMPISTRIArm
    139350864U,	// PCMPISTRIArr
    139219792U,	// PCMPISTRICrm
    139350864U,	// PCMPISTRICrr
    139219792U,	// PCMPISTRIOrm
    139350864U,	// PCMPISTRIOrr
    139219792U,	// PCMPISTRISrm
    139350864U,	// PCMPISTRISrr
    139219792U,	// PCMPISTRIZrm
    139350864U,	// PCMPISTRIZrr
    139219792U,	// PCMPISTRIrm
    139350864U,	// PCMPISTRIrr
    0U,	// PCMPISTRM128MEM
    0U,	// PCMPISTRM128REG
    139219803U,	// PCMPISTRM128rm
    139350875U,	// PCMPISTRM128rr
    809522022U,	// PEXTRBmr
    139350886U,	// PEXTRBrr
    541086574U,	// PEXTRDmr
    139350894U,	// PEXTRDrr
    675304310U,	// PEXTRQmr
    139350902U,	// PEXTRQrr
    272650105U,	// PEXTRWmr
    139349881U,	// PEXTRWri
    139727742U,	// PF2IDrm
    139334526U,	// PF2IDrr
    139727749U,	// PF2IWrm
    139334533U,	// PF2IWrr
    140120972U,	// PFACCrm
    138548108U,	// PFACCrr
    140120979U,	// PFADDrm
    138548115U,	// PFADDrr
    140120986U,	// PFCMPEQrm
    138548122U,	// PFCMPEQrr
    140120995U,	// PFCMPGErm
    138548131U,	// PFCMPGErr
    140121004U,	// PFCMPGTrm
    138548140U,	// PFCMPGTrr
    140121013U,	// PFMAXrm
    138548149U,	// PFMAXrr
    140121020U,	// PFMINrm
    138548156U,	// PFMINrr
    140121027U,	// PFMULrm
    138548163U,	// PFMULrr
    140121034U,	// PFNACCrm
    138548170U,	// PFNACCrr
    140121042U,	// PFPNACCrm
    138548178U,	// PFPNACCrr
    140121051U,	// PFRCPIT1rm
    138548187U,	// PFRCPIT1rr
    140121061U,	// PFRCPIT2rm
    138548197U,	// PFRCPIT2rr
    139727855U,	// PFRCPrm
    139334639U,	// PFRCPrr
    140121078U,	// PFRSQIT1rm
    138548214U,	// PFRSQIT1rr
    139727872U,	// PFRSQRTrm
    139334656U,	// PFRSQRTrr
    140121097U,	// PFSUBRrm
    138548233U,	// PFSUBRrr
    140121105U,	// PFSUBrm
    138548241U,	// PFSUBrr
    139071378U,	// PHADDDrm128
    138547090U,	// PHADDDrr128
    139071361U,	// PHADDSWrm128
    138547073U,	// PHADDSWrr128
    139071370U,	// PHADDWrm128
    138547082U,	// PHADDWrr128
    139203608U,	// PHMINPOSUWrm128
    139334680U,	// PHMINPOSUWrr128
    139071386U,	// PHSUBDrm128
    138547098U,	// PHSUBDrr128
    139071394U,	// PHSUBSWrm128
    138547106U,	// PHSUBSWrr128
    139071403U,	// PHSUBWrm128
    138547115U,	// PHSUBWrr128
    139727908U,	// PI2FDrm
    139334692U,	// PI2FDrr
    139727915U,	// PI2FWrm
    139334699U,	// PI2FWrr
    140907570U,	// PINSRBrm
    138564658U,	// PINSRBrr
    140006458U,	// PINSRDrm
    138564666U,	// PINSRDrr
    140137538U,	// PINSRQrm
    138564674U,	// PINSRQrr
    139874227U,	// PINSRWrmi
    138563507U,	// PINSRWrri
    139071419U,	// PMADDUBSWrm128
    138547131U,	// PMADDUBSWrr128
    139071430U,	// PMADDWDrm
    138547142U,	// PMADDWDrr
    139072586U,	// PMAXSBrm
    138548298U,	// PMAXSBrr
    139072594U,	// PMAXSDrm
    138548306U,	// PMAXSDrr
    139071439U,	// PMAXSWrm
    138547151U,	// PMAXSWrr
    139071447U,	// PMAXUBrm
    138547159U,	// PMAXUBrr
    139072602U,	// PMAXUDrm
    138548314U,	// PMAXUDrr
    139072610U,	// PMAXUWrm
    138548322U,	// PMAXUWrr
    139072618U,	// PMINSBrm
    138548330U,	// PMINSBrr
    139072626U,	// PMINSDrm
    138548338U,	// PMINSDrr
    139071455U,	// PMINSWrm
    138547167U,	// PMINSWrr
    139071463U,	// PMINUBrm
    138547175U,	// PMINUBrr
    139072634U,	// PMINUDrm
    138548346U,	// PMINUDrr
    139072642U,	// PMINUWrm
    138548354U,	// PMINUWrr
    139333615U,	// PMOVMSKBrr
    139596938U,	// PMOVSXBDrm
    139334794U,	// PMOVSXBDrr
    139465876U,	// PMOVSXBQrm
    139334804U,	// PMOVSXBQrr
    139728030U,	// PMOVSXBWrm
    139334814U,	// PMOVSXBWrr
    139728040U,	// PMOVSXDQrm
    139334824U,	// PMOVSXDQrr
    139728050U,	// PMOVSXWDrm
    139334834U,	// PMOVSXWDrr
    139596988U,	// PMOVSXWQrm
    139334844U,	// PMOVSXWQrr
    139596998U,	// PMOVZXBDrm
    139334854U,	// PMOVZXBDrr
    139465936U,	// PMOVZXBQrm
    139334864U,	// PMOVZXBQrr
    139728090U,	// PMOVZXBWrm
    139334874U,	// PMOVZXBWrr
    139728100U,	// PMOVZXDQrm
    139334884U,	// PMOVZXDQrr
    139728110U,	// PMOVZXWDrm
    139334894U,	// PMOVZXWDrr
    139597048U,	// PMOVZXWQrm
    139334904U,	// PMOVZXWQrr
    139072770U,	// PMULDQrm
    138548482U,	// PMULDQrr
    139071481U,	// PMULHRSWrm128
    138547193U,	// PMULHRSWrr128
    140121354U,	// PMULHRWrm
    138548490U,	// PMULHRWrr
    139071491U,	// PMULHUWrm
    138547203U,	// PMULHUWrr
    139071500U,	// PMULHWrm
    138547212U,	// PMULHWrr
    139072787U,	// PMULLDrm
    138548499U,	// PMULLDrr
    139071508U,	// PMULLWrm
    138547220U,	// PMULLWrr
    139071516U,	// PMULUDQrm
    138547228U,	// PMULUDQrr
    134223131U,	// POP16r
    268440859U,	// POP16rmm
    134223131U,	// POP16rmr
    134223131U,	// POP32r
    536876315U,	// POP32rmm
    134223131U,	// POP32rmr
    134223131U,	// POP64r
    671094043U,	// POP64rmm
    134223131U,	// POP64rmr
    5408U,	// POPA32
    139466021U,	// POPCNT16rm
    139334949U,	// POPCNT16rr
    139597093U,	// POPCNT32rm
    139334949U,	// POPCNT32rr
    139728165U,	// POPCNT64rm
    139334949U,	// POPCNT64rr
    5421U,	// POPDS16
    5421U,	// POPDS32
    5428U,	// POPES16
    5428U,	// POPES32
    5435U,	// POPF16
    5440U,	// POPF32
    5446U,	// POPF64
    5452U,	// POPFS16
    5452U,	// POPFS32
    5452U,	// POPFS64
    5459U,	// POPGS16
    5459U,	// POPGS32
    5459U,	// POPGS64
    5466U,	// POPSS16
    5466U,	// POPSS32
    139071525U,	// PORrm
    138547237U,	// PORrr
    536876385U,	// PREFETCH
    805311851U,	// PREFETCHNTA
    805311864U,	// PREFETCHT0
    805311876U,	// PREFETCHT1
    805311888U,	// PREFETCHT2
    268440988U,	// PREFETCHW
    139071530U,	// PSADBWrm
    138547242U,	// PSADBWrr
    139071538U,	// PSHUFBrm128
    138547250U,	// PSHUFBrr128
    139220391U,	// PSHUFDmi
    139351463U,	// PSHUFDri
    139220399U,	// PSHUFHWmi
    139351471U,	// PSHUFHWri
    139220408U,	// PSHUFLWmi
    139351480U,	// PSHUFLWri
    139071554U,	// PSIGNBrm128
    138547266U,	// PSIGNBrr128
    139071562U,	// PSIGNDrm128
    138547274U,	// PSIGNDrr128
    139071570U,	// PSIGNWrm128
    138547282U,	// PSIGNWrr128
    138548673U,	// PSLLDQri
    138547290U,	// PSLLDri
    139071578U,	// PSLLDrm
    138547290U,	// PSLLDrr
    138547297U,	// PSLLQri
    139071585U,	// PSLLQrm
    138547297U,	// PSLLQrr
    138547304U,	// PSLLWri
    139071592U,	// PSLLWrm
    138547304U,	// PSLLWrr
    138547311U,	// PSRADri
    139071599U,	// PSRADrm
    138547311U,	// PSRADrr
    138547318U,	// PSRAWri
    139071606U,	// PSRAWrm
    138547318U,	// PSRAWrr
    138548681U,	// PSRLDQri
    138547325U,	// PSRLDri
    139071613U,	// PSRLDrm
    138547325U,	// PSRLDrr
    138547332U,	// PSRLQri
    139071620U,	// PSRLQrm
    138547332U,	// PSRLQrr
    138547339U,	// PSRLWri
    139071627U,	// PSRLWrm
    138547339U,	// PSRLWrr
    139071634U,	// PSUBBrm
    138547346U,	// PSUBBrr
    139071641U,	// PSUBDrm
    138547353U,	// PSUBDrr
    139071648U,	// PSUBQrm
    138547360U,	// PSUBQrr
    139071655U,	// PSUBSBrm
    138547367U,	// PSUBSBrr
    139071663U,	// PSUBSWrm
    138547375U,	// PSUBSWrr
    139071671U,	// PSUBUSBrm
    138547383U,	// PSUBUSBrr
    139071680U,	// PSUBUSWrm
    138547392U,	// PSUBUSWrr
    139071689U,	// PSUBWrm
    138547401U,	// PSUBWrr
    139728337U,	// PSWAPDrm
    139335121U,	// PSWAPDrr
    140383705U,	// PTESTrm
    139335129U,	// PTESTrr
    139071696U,	// PUNPCKHBWrm
    138547408U,	// PUNPCKHBWrr
    139071707U,	// PUNPCKHDQrm
    138547419U,	// PUNPCKHDQrr
    139072993U,	// PUNPCKHQDQrm
    138548705U,	// PUNPCKHQDQrr
    139071718U,	// PUNPCKHWDrm
    138547430U,	// PUNPCKHWDrr
    139071729U,	// PUNPCKLBWrm
    138547441U,	// PUNPCKLBWrr
    139071740U,	// PUNPCKLDQrm
    138547452U,	// PUNPCKLDQrr
    139073005U,	// PUNPCKLQDQrm
    138548717U,	// PUNPCKLQDQrr
    139071751U,	// PUNPCKLWDrm
    138547463U,	// PUNPCKLWDrr
    134223353U,	// PUSH16r
    268441081U,	// PUSH16rmm
    134223353U,	// PUSH16rmr
    134223353U,	// PUSH32r
    536876537U,	// PUSH32rmm
    134223353U,	// PUSH32rmr
    134223353U,	// PUSH64i16
    134223353U,	// PUSH64i32
    134223353U,	// PUSH64i8
    134223353U,	// PUSH64r
    671094265U,	// PUSH64rmm
    134223353U,	// PUSH64rmr
    5631U,	// PUSHA32
    5637U,	// PUSHCS16
    5637U,	// PUSHCS32
    5645U,	// PUSHDS16
    5645U,	// PUSHDS32
    5653U,	// PUSHES16
    5653U,	// PUSHES32
    5661U,	// PUSHF16
    5667U,	// PUSHF32
    5674U,	// PUSHF64
    5681U,	// PUSHFS16
    5681U,	// PUSHFS32
    5681U,	// PUSHFS64
    5689U,	// PUSHGS16
    5689U,	// PUSHGS32
    5689U,	// PUSHGS64
    5697U,	// PUSHSS16
    5697U,	// PUSHSS32
    134223353U,	// PUSHi16
    134223353U,	// PUSHi32
    134223353U,	// PUSHi8
    139071762U,	// PXORrm
    138547474U,	// PXORrr
    268441161U,	// RCL16m1
    335550025U,	// RCL16mCL
    272635465U,	// RCL16mi
    134223433U,	// RCL16r1
    201332297U,	// RCL16rCL
    138548809U,	// RCL16ri
    536876617U,	// RCL32m1
    603985481U,	// RCL32mCL
    541070921U,	// RCL32mi
    134223433U,	// RCL32r1
    201332297U,	// RCL32rCL
    138548809U,	// RCL32ri
    671094345U,	// RCL64m1
    738203209U,	// RCL64mCL
    675288649U,	// RCL64mi
    134223433U,	// RCL64r1
    201332297U,	// RCL64rCL
    138548809U,	// RCL64ri
    805312073U,	// RCL8m1
    872420937U,	// RCL8mCL
    809506377U,	// RCL8mi
    134223433U,	// RCL8r1
    201332297U,	// RCL8rCL
    138548809U,	// RCL8ri
    140383822U,	// RCPPSm
    140383822U,	// RCPPSm_Int
    139335246U,	// RCPPSr
    139335246U,	// RCPPSr_Int
    140645973U,	// RCPSSm
    140645973U,	// RCPSSm_Int
    139335253U,	// RCPSSr
    139335253U,	// RCPSSr_Int
    268441180U,	// RCR16m1
    335550044U,	// RCR16mCL
    272635484U,	// RCR16mi
    134223452U,	// RCR16r1
    201332316U,	// RCR16rCL
    138548828U,	// RCR16ri
    536876636U,	// RCR32m1
    603985500U,	// RCR32mCL
    541070940U,	// RCR32mi
    134223452U,	// RCR32r1
    201332316U,	// RCR32rCL
    138548828U,	// RCR32ri
    671094364U,	// RCR64m1
    738203228U,	// RCR64mCL
    675288668U,	// RCR64mi
    134223452U,	// RCR64r1
    201332316U,	// RCR64rCL
    138548828U,	// RCR64ri
    805312092U,	// RCR8m1
    872420956U,	// RCR8mCL
    809506396U,	// RCR8mi
    134223452U,	// RCR8r1
    201332316U,	// RCR8rCL
    138548828U,	// RCR8ri
    134223457U,	// RDFSBASE
    134223457U,	// RDFSBASE64
    134223467U,	// RDGSBASE
    134223467U,	// RDGSBASE64
    5749U,	// RDMSR
    5755U,	// RDPMC
    134223489U,	// RDRAND16r
    134223489U,	// RDRAND32r
    134223489U,	// RDRAND64r
    5769U,	// RDTSC
    5775U,	// RDTSCP
    5782U,	// RELEASE_MOV16mr
    5782U,	// RELEASE_MOV32mr
    5782U,	// RELEASE_MOV64mr
    5782U,	// RELEASE_MOV8mr
    5803U,	// REPNE_PREFIX
    5809U,	// REP_MOVSB
    5819U,	// REP_MOVSD
    5829U,	// REP_MOVSQ
    5839U,	// REP_MOVSW
    5849U,	// REP_PREFIX
    5853U,	// REP_STOSB
    5863U,	// REP_STOSD
    5873U,	// REP_STOSQ
    5883U,	// REP_STOSW
    5893U,	// RET
    134223625U,	// RETI
    134223630U,	// RETIW
    5908U,	// REX64_PREFIX
    268441370U,	// ROL16m1
    335550234U,	// ROL16mCL
    272635674U,	// ROL16mi
    134223642U,	// ROL16r1
    201332506U,	// ROL16rCL
    138549018U,	// ROL16ri
    536876826U,	// ROL32m1
    603985690U,	// ROL32mCL
    541071130U,	// ROL32mi
    134223642U,	// ROL32r1
    201332506U,	// ROL32rCL
    138549018U,	// ROL32ri
    671094554U,	// ROL64m1
    742397722U,	// ROL64mCL
    675288858U,	// ROL64mi
    134223642U,	// ROL64r1
    205526810U,	// ROL64rCL
    138549018U,	// ROL64ri
    805312282U,	// ROL8m1
    872421146U,	// ROL8mCL
    809506586U,	// ROL8mi
    134223642U,	// ROL8r1
    201332506U,	// ROL8rCL
    138549018U,	// ROL8ri
    268441375U,	// ROR16m1
    335550239U,	// ROR16mCL
    272635679U,	// ROR16mi
    134223647U,	// ROR16r1
    201332511U,	// ROR16rCL
    138549023U,	// ROR16ri
    536876831U,	// ROR32m1
    603985695U,	// ROR32mCL
    541071135U,	// ROR32mi
    134223647U,	// ROR32r1
    201332511U,	// ROR32rCL
    138549023U,	// ROR32ri
    671094559U,	// ROR64m1
    742397727U,	// ROR64mCL
    675288863U,	// ROR64mi
    134223647U,	// ROR64r1
    205526815U,	// ROR64rCL
    138549023U,	// ROR64ri
    805312287U,	// ROR8m1
    872421151U,	// ROR8mCL
    809506591U,	// ROR8mi
    134223647U,	// ROR8r1
    201332511U,	// ROR8rCL
    138549023U,	// ROR8ri
    140400420U,	// ROUNDPDm
    139351844U,	// ROUNDPDr
    140400429U,	// ROUNDPSm
    139351853U,	// ROUNDPSr
    138827574U,	// ROUNDSDm
    138565430U,	// ROUNDSDr
    138958655U,	// ROUNDSSm
    138565439U,	// ROUNDSSr
    5960U,	// RSM
    140384076U,	// RSQRTPSm
    140384076U,	// RSQRTPSm_Int
    139335500U,	// RSQRTPSr
    139335500U,	// RSQRTPSr_Int
    140646229U,	// RSQRTSSm
    140646229U,	// RSQRTSSm_Int
    139335509U,	// RSQRTSSr
    139335509U,	// RSQRTSSr_Int
    5982U,	// SAHF
    268441443U,	// SAR16m1
    335550307U,	// SAR16mCL
    272635747U,	// SAR16mi
    134223715U,	// SAR16r1
    201332579U,	// SAR16rCL
    138549091U,	// SAR16ri
    536876899U,	// SAR32m1
    603985763U,	// SAR32mCL
    541071203U,	// SAR32mi
    134223715U,	// SAR32r1
    201332579U,	// SAR32rCL
    138549091U,	// SAR32ri
    671094627U,	// SAR64m1
    742397795U,	// SAR64mCL
    675288931U,	// SAR64mi
    134223715U,	// SAR64r1
    205526883U,	// SAR64rCL
    138549091U,	// SAR64ri
    805312355U,	// SAR8m1
    872421219U,	// SAR8mCL
    809506659U,	// SAR8mi
    134223715U,	// SAR8r1
    201332579U,	// SAR8rCL
    138549091U,	// SAR8ri
    134223720U,	// SBB16i16
    272635761U,	// SBB16mi
    272635761U,	// SBB16mi8
    272635761U,	// SBB16mr
    411047793U,	// SBB16ri
    411047793U,	// SBB16ri8
    415242097U,	// SBB16rm
    411047793U,	// SBB16rr
    138549105U,	// SBB16rr_REV
    134223734U,	// SBB32i32
    541071217U,	// SBB32mi
    541071217U,	// SBB32mi8
    541071217U,	// SBB32mr
    411047793U,	// SBB32ri
    411047793U,	// SBB32ri8
    419436401U,	// SBB32rm
    411047793U,	// SBB32rr
    138549105U,	// SBB32rr_REV
    134223744U,	// SBB64i32
    675288945U,	// SBB64mi32
    675288945U,	// SBB64mi8
    675288945U,	// SBB64mr
    411047793U,	// SBB64ri32
    411047793U,	// SBB64ri8
    423630705U,	// SBB64rm
    411047793U,	// SBB64rr
    138549105U,	// SBB64rr_REV
    134223754U,	// SBB8i8
    809506673U,	// SBB8mi
    809506673U,	// SBB8mr
    411047793U,	// SBB8ri
    427825009U,	// SBB8rm
    411047793U,	// SBB8rr
    138549105U,	// SBB8rr_REV
    6035U,	// SCAS16
    6041U,	// SCAS32
    6047U,	// SCAS64
    6053U,	// SCAS8
    6059U,	// SEG_ALLOCA_32
    6059U,	// SEG_ALLOCA_64
    805312472U,	// SETAEm
    134223832U,	// SETAEr
    805312479U,	// SETAm
    134223839U,	// SETAr
    805312485U,	// SETBEm
    134223845U,	// SETBEr
    0U,	// SETB_C16r
    0U,	// SETB_C32r
    0U,	// SETB_C64r
    0U,	// SETB_C8r
    805312492U,	// SETBm
    134223852U,	// SETBr
    805312498U,	// SETEm
    134223858U,	// SETEr
    805312504U,	// SETGEm
    134223864U,	// SETGEr
    805312511U,	// SETGm
    134223871U,	// SETGr
    805312517U,	// SETLEm
    134223877U,	// SETLEr
    805312524U,	// SETLm
    134223884U,	// SETLr
    805312530U,	// SETNEm
    134223890U,	// SETNEr
    805312537U,	// SETNOm
    134223897U,	// SETNOr
    805312544U,	// SETNPm
    134223904U,	// SETNPr
    805312551U,	// SETNSm
    134223911U,	// SETNSr
    805312558U,	// SETOm
    134223918U,	// SETOr
    805312564U,	// SETPm
    134223924U,	// SETPr
    805312570U,	// SETSm
    134223930U,	// SETSr
    6208U,	// SFENCE
    1879054407U,	// SGDT16m
    1879054414U,	// SGDTm
    268441684U,	// SHL16m1
    335550548U,	// SHL16mCL
    272635988U,	// SHL16mi
    134223956U,	// SHL16r1
    201332820U,	// SHL16rCL
    138549332U,	// SHL16ri
    536877140U,	// SHL32m1
    603986004U,	// SHL32mCL
    541071444U,	// SHL32mi
    134223956U,	// SHL32r1
    201332820U,	// SHL32rCL
    138549332U,	// SHL32ri
    671094868U,	// SHL64m1
    742398036U,	// SHL64mCL
    675289172U,	// SHL64mi
    134223956U,	// SHL64r1
    205527124U,	// SHL64rCL
    138549332U,	// SHL64ri
    805312596U,	// SHL8m1
    872421460U,	// SHL8mCL
    809506900U,	// SHL8mi
    134223956U,	// SHL8r1
    201332820U,	// SHL8rCL
    138549332U,	// SHL8ri
    272685145U,	// SHLD16mrCL
    272652377U,	// SHLD16mri8
    138598489U,	// SHLD16rrCL
    138565721U,	// SHLD16rri8
    541120601U,	// SHLD32mrCL
    541087833U,	// SHLD32mri8
    138598489U,	// SHLD32rrCL
    138565721U,	// SHLD32rri8
    675354713U,	// SHLD64mrCL
    675305561U,	// SHLD64mri8
    138614873U,	// SHLD64rrCL
    138565721U,	// SHLD64rri8
    268441695U,	// SHR16m1
    335550559U,	// SHR16mCL
    272635999U,	// SHR16mi
    134223967U,	// SHR16r1
    201332831U,	// SHR16rCL
    138549343U,	// SHR16ri
    536877151U,	// SHR32m1
    603986015U,	// SHR32mCL
    541071455U,	// SHR32mi
    134223967U,	// SHR32r1
    201332831U,	// SHR32rCL
    138549343U,	// SHR32ri
    671094879U,	// SHR64m1
    742398047U,	// SHR64mCL
    675289183U,	// SHR64mi
    134223967U,	// SHR64r1
    205527135U,	// SHR64rCL
    138549343U,	// SHR64ri
    805312607U,	// SHR8m1
    872421471U,	// SHR8mCL
    809506911U,	// SHR8mi
    134223967U,	// SHR8r1
    201332831U,	// SHR8rCL
    138549343U,	// SHR8ri
    272685156U,	// SHRD16mrCL
    272652388U,	// SHRD16mri8
    138598500U,	// SHRD16rrCL
    138565732U,	// SHRD16rri8
    541120612U,	// SHRD32mrCL
    541087844U,	// SHRD32mri8
    138598500U,	// SHRD32rrCL
    138565732U,	// SHRD32rri8
    675354724U,	// SHRD64mrCL
    675305572U,	// SHRD64mri8
    138614884U,	// SHRD64rrCL
    138565732U,	// SHRD64rri8
    138696810U,	// SHUFPDrmi
    138565738U,	// SHUFPDrri
    138696818U,	// SHUFPSrmi
    138565746U,	// SHUFPSrri
    1879054458U,	// SIDT16m
    1879054465U,	// SIDTm
    6279U,	// SIN_F
    0U,	// SIN_Fp32
    0U,	// SIN_Fp64
    0U,	// SIN_Fp80
    268441740U,	// SLDT16m
    134224012U,	// SLDT16r
    134224012U,	// SLDT32r
    268441740U,	// SLDT64m
    134224012U,	// SLDT64r
    268441746U,	// SMSW16m
    134224018U,	// SMSW16r
    134224018U,	// SMSW32r
    134224018U,	// SMSW64r
    140384408U,	// SQRTPDm
    140384408U,	// SQRTPDm_Int
    139335832U,	// SQRTPDr
    139335832U,	// SQRTPDr_Int
    140384416U,	// SQRTPSm
    140384416U,	// SQRTPSm_Int
    139335840U,	// SQRTPSr
    139335840U,	// SQRTPSr_Int
    140515496U,	// SQRTSDm
    140515496U,	// SQRTSDm_Int
    139335848U,	// SQRTSDr
    139335848U,	// SQRTSDr_Int
    140646576U,	// SQRTSSm
    140646576U,	// SQRTSSm_Int
    139335856U,	// SQRTSSr
    139335856U,	// SQRTSSr_Int
    6328U,	// SQRT_F
    0U,	// SQRT_Fp32
    0U,	// SQRT_Fp64
    0U,	// SQRT_Fp80
    6334U,	// SS_PREFIX
    6337U,	// STC
    6341U,	// STD
    6345U,	// STI
    536877261U,	// STMXCSR
    6358U,	// STOSB
    6364U,	// STOSD
    6370U,	// STOSQ
    6376U,	// STOSW
    6382U,	// STR16r
    6382U,	// STR32r
    6382U,	// STR64r
    6382U,	// STRm
    939530483U,	// ST_F32m
    1073748211U,	// ST_F64m
    939530488U,	// ST_FP32m
    1073748216U,	// ST_FP64m
    2013272312U,	// ST_FP80m
    134224120U,	// ST_FPrr
    0U,	// ST_Fp32m
    0U,	// ST_Fp64m
    0U,	// ST_Fp64m32
    0U,	// ST_Fp80m32
    0U,	// ST_Fp80m64
    0U,	// ST_FpP32m
    0U,	// ST_FpP64m
    0U,	// ST_FpP64m32
    0U,	// ST_FpP80m
    0U,	// ST_FpP80m32
    0U,	// ST_FpP80m64
    134224115U,	// ST_Frr
    134224126U,	// SUB16i16
    272636167U,	// SUB16mi
    272636167U,	// SUB16mi8
    272636167U,	// SUB16mr
    411048199U,	// SUB16ri
    411048199U,	// SUB16ri8
    415242503U,	// SUB16rm
    411048199U,	// SUB16rr
    138549511U,	// SUB16rr_REV
    134224140U,	// SUB32i32
    541071623U,	// SUB32mi
    541071623U,	// SUB32mi8
    541071623U,	// SUB32mr
    411048199U,	// SUB32ri
    411048199U,	// SUB32ri8
    419436807U,	// SUB32rm
    411048199U,	// SUB32rr
    138549511U,	// SUB32rr_REV
    134224150U,	// SUB64i32
    675289351U,	// SUB64mi32
    675289351U,	// SUB64mi8
    675289351U,	// SUB64mr
    411048199U,	// SUB64ri32
    411048199U,	// SUB64ri8
    423631111U,	// SUB64rm
    411048199U,	// SUB64rr
    138549511U,	// SUB64rr_REV
    134224160U,	// SUB8i8
    809507079U,	// SUB8mi
    809507079U,	// SUB8mr
    411048199U,	// SUB8ri
    427825415U,	// SUB8rm
    411048199U,	// SUB8rr
    138549511U,	// SUB8rr_REV
    138680617U,	// SUBPDrm
    138549545U,	// SUBPDrr
    138680624U,	// SUBPSrm
    138549552U,	// SUBPSrr
    939530551U,	// SUBR_F32m
    1073748279U,	// SUBR_F64m
    268441918U,	// SUBR_FI16m
    536877374U,	// SUBR_FI32m
    134224198U,	// SUBR_FPrST0
    134224183U,	// SUBR_FST0r
    0U,	// SUBR_Fp32m
    0U,	// SUBR_Fp64m
    0U,	// SUBR_Fp64m32
    0U,	// SUBR_Fp80m32
    0U,	// SUBR_Fp80m64
    0U,	// SUBR_FpI16m32
    0U,	// SUBR_FpI16m64
    0U,	// SUBR_FpI16m80
    0U,	// SUBR_FpI32m32
    0U,	// SUBR_FpI32m64
    0U,	// SUBR_FpI32m80
    163584311U,	// SUBR_FrST0
    138811726U,	// SUBSDrm
    138811726U,	// SUBSDrm_Int
    138549582U,	// SUBSDrr
    138549582U,	// SUBSDrr_Int
    138942805U,	// SUBSSrm
    138942805U,	// SUBSSrm_Int
    138549589U,	// SUBSSrr
    138549589U,	// SUBSSrr_Int
    939530588U,	// SUB_F32m
    1073748316U,	// SUB_F64m
    268441954U,	// SUB_FI16m
    536877410U,	// SUB_FI32m
    134224233U,	// SUB_FPrST0
    134224220U,	// SUB_FST0r
    0U,	// SUB_Fp32
    0U,	// SUB_Fp32m
    0U,	// SUB_Fp64
    0U,	// SUB_Fp64m
    0U,	// SUB_Fp64m32
    0U,	// SUB_Fp80
    0U,	// SUB_Fp80m32
    0U,	// SUB_Fp80m64
    0U,	// SUB_FpI16m32
    0U,	// SUB_FpI16m64
    0U,	// SUB_FpI16m80
    0U,	// SUB_FpI32m32
    0U,	// SUB_FpI32m64
    0U,	// SUB_FpI32m80
    163584348U,	// SUB_FrST0
    6512U,	// SWAPGS
    6519U,	// SYSCALL
    6527U,	// SYSENTER
    6536U,	// SYSEXIT
    6536U,	// SYSEXIT64
    6544U,	// SYSRETL
    6552U,	// SYSRETQ
    1417677924U,	// TAILJMPd
    1417677924U,	// TAILJMPd64
    612371556U,	// TAILJMPm
    746589284U,	// TAILJMPm64
    0U,	// TAILJMPr
    209718372U,	// TAILJMPr64
    0U,	// TCRETURNdi
    0U,	// TCRETURNdi64
    0U,	// TCRETURNmi
    0U,	// TCRETURNmi64
    0U,	// TCRETURNri
    0U,	// TCRETURNri64
    134224288U,	// TEST16i16
    272636330U,	// TEST16mi
    139336106U,	// TEST16ri
    139467178U,	// TEST16rm
    139336106U,	// TEST16rr
    134224304U,	// TEST32i32
    541071786U,	// TEST32mi
    139336106U,	// TEST32ri
    139598250U,	// TEST32rm
    139336106U,	// TEST32rr
    134224315U,	// TEST64i32
    675289514U,	// TEST64mi32
    139336106U,	// TEST64ri32
    139729322U,	// TEST64rm
    139336106U,	// TEST64rr
    134224326U,	// TEST8i8
    809507242U,	// TEST8mi
    139336106U,	// TEST8ri
    0U,	// TEST8ri_NOREX
    140253610U,	// TEST8rm
    139336106U,	// TEST8rr
    6608U,	// TLSCall_32
    6621U,	// TLSCall_64
    6634U,	// TLS_addr32
    6647U,	// TLS_addr64
    6660U,	// TRAP
    6664U,	// TST_F
    0U,	// TST_Fp32
    0U,	// TST_Fp64
    0U,	// TST_Fp80
    139467277U,	// TZCNT16rm
    139336205U,	// TZCNT16rr
    139598349U,	// TZCNT32rm
    139336205U,	// TZCNT32rr
    139729421U,	// TZCNT64rm
    139336205U,	// TZCNT64rr
    140512085U,	// UCOMISDrm
    139332437U,	// UCOMISDrr
    140643166U,	// UCOMISSrm
    139332446U,	// UCOMISSrr
    134224404U,	// UCOM_FIPr
    134224413U,	// UCOM_FIr
    6693U,	// UCOM_FPPr
    134224429U,	// UCOM_FPr
    0U,	// UCOM_FpIr32
    0U,	// UCOM_FpIr64
    0U,	// UCOM_FpIr80
    0U,	// UCOM_Fpr32
    0U,	// UCOM_Fpr64
    0U,	// UCOM_Fpr80
    134224437U,	// UCOM_Fr
    6716U,	// UD2B
    138680897U,	// UNPCKHPDrm
    138549825U,	// UNPCKHPDrr
    138680907U,	// UNPCKHPSrm
    138549835U,	// UNPCKHPSrr
    138680917U,	// UNPCKLPDrm
    138549845U,	// UNPCKLPDrr
    138680927U,	// UNPCKLPSrm
    138549855U,	// UNPCKLPSrr
    140270185U,	// VAARG_64
    139352692U,	// VADDPDYrm
    139352692U,	// VADDPDYrr
    139352692U,	// VADDPDrm
    139352692U,	// VADDPDrr
    139352700U,	// VADDPSYrm
    139352700U,	// VADDPSYrr
    139352700U,	// VADDPSrm
    139352700U,	// VADDPSrr
    139352708U,	// VADDSDrm
    139352708U,	// VADDSDrm_Int
    139352708U,	// VADDSDrr
    139352708U,	// VADDSDrr_Int
    139352716U,	// VADDSSrm
    139352716U,	// VADDSSrm_Int
    139352716U,	// VADDSSrr
    139352716U,	// VADDSSrr_Int
    139352724U,	// VADDSUBPDYrm
    139352724U,	// VADDSUBPDYrr
    139352724U,	// VADDSUBPDrm
    139352724U,	// VADDSUBPDrr
    139352735U,	// VADDSUBPSYrm
    139352735U,	// VADDSUBPSYrr
    139352735U,	// VADDSUBPSrm
    139352735U,	// VADDSUBPSrr
    139352746U,	// VAESDECLASTrm
    139352746U,	// VAESDECLASTrr
    139352759U,	// VAESDECrm
    139352759U,	// VAESDECrr
    139352768U,	// VAESENCLASTrm
    139352768U,	// VAESENCLASTrr
    139352781U,	// VAESENCrm
    139352781U,	// VAESENCrr
    139205334U,	// VAESIMCrm
    139336406U,	// VAESIMCrr
    139221727U,	// VAESKEYGENASSIST128rm
    139352799U,	// VAESKEYGENASSIST128rr
    139352817U,	// VANDNPDYrm
    139352817U,	// VANDNPDYrr
    139352817U,	// VANDNPDrm
    139352817U,	// VANDNPDrr
    139352826U,	// VANDNPSYrm
    139352826U,	// VANDNPSYrr
    139352826U,	// VANDNPSrm
    139352826U,	// VANDNPSrr
    139352835U,	// VANDPDYrm
    139352835U,	// VANDPDYrr
    139352835U,	// VANDPDrm
    139352835U,	// VANDPDrr
    139352843U,	// VANDPSYrm
    139352843U,	// VANDPSYrr
    139352843U,	// VANDPSrm
    139352843U,	// VANDPSrr
    139352851U,	// VASTART_SAVE_XMM_REGS
    139352875U,	// VBLENDPDYrmi
    139352875U,	// VBLENDPDYrri
    139352875U,	// VBLENDPDrmi
    139352875U,	// VBLENDPDrri
    139352885U,	// VBLENDPSYrmi
    139352885U,	// VBLENDPSYrri
    139352885U,	// VBLENDPSrmi
    139352885U,	// VBLENDPSrri
    139352895U,	// VBLENDVPDYrm
    139352895U,	// VBLENDVPDYrr
    139352895U,	// VBLENDVPDrm
    139352895U,	// VBLENDVPDrr
    139352906U,	// VBLENDVPSYrm
    139352906U,	// VBLENDVPSYrr
    139352906U,	// VBLENDVPSrm
    139352906U,	// VBLENDVPSrr
    140385109U,	// VBROADCASTF128
    140516197U,	// VBROADCASTSD
    140647283U,	// VBROADCASTSS
    140647283U,	// VBROADCASTSSY
    1515080551U,	// VCMPPDYrmi
    139352961U,	// VCMPPDYrmi_alt
    1649298279U,	// VCMPPDYrri
    139352961U,	// VCMPPDYrri_alt
    1515080551U,	// VCMPPDrmi
    139352961U,	// VCMPPDrmi_alt
    1649298279U,	// VCMPPDrri
    139352961U,	// VCMPPDrri_alt
    1519274855U,	// VCMPPSYrmi
    139352969U,	// VCMPPSYrmi_alt
    1653492583U,	// VCMPPSYrri
    139352969U,	// VCMPPSYrri_alt
    1519274855U,	// VCMPPSrmi
    139352969U,	// VCMPPSrmi_alt
    1653492583U,	// VCMPPSrri
    139352969U,	// VCMPPSrri_alt
    1523469159U,	// VCMPSDrm
    139352977U,	// VCMPSDrm_alt
    1657686887U,	// VCMPSDrr
    139352977U,	// VCMPSDrr_alt
    1527663463U,	// VCMPSSrm
    139352985U,	// VCMPSSrm_alt
    1661881191U,	// VCMPSSrr
    139352985U,	// VCMPSSrr_alt
    140381036U,	// VCOMISDrm
    139332460U,	// VCOMISDrr
    140381045U,	// VCOMISSrm
    139332469U,	// VCOMISSrr
    140381054U,	// VCVTDQ2PDYrm
    139332478U,	// VCVTDQ2PDYrr
    140381054U,	// VCVTDQ2PDrm
    139332478U,	// VCVTDQ2PDrr
    141036425U,	// VCVTDQ2PSYrm
    139332489U,	// VCVTDQ2PSYrr
    139201417U,	// VCVTDQ2PSrm
    139332489U,	// VCVTDQ2PSrr
    139332500U,	// VCVTPD2DQXrYr
    140385185U,	// VCVTPD2DQXrm
    139336609U,	// VCVTPD2DQXrr
    141171629U,	// VCVTPD2DQYrm
    139336621U,	// VCVTPD2DQYrr
    139332500U,	// VCVTPD2DQrr
    139332511U,	// VCVTPD2PSXrYr
    140385209U,	// VCVTPD2PSXrm
    139336633U,	// VCVTPD2PSXrr
    141171653U,	// VCVTPD2PSYrm
    139336645U,	// VCVTPD2PSYrr
    139332511U,	// VCVTPD2PSrr
    140385233U,	// VCVTPH2PSYrm
    139336657U,	// VCVTPH2PSYrr
    140516305U,	// VCVTPH2PSrm
    139336657U,	// VCVTPH2PSrr
    141167530U,	// VCVTPS2DQYrm
    139332522U,	// VCVTPS2DQYrr
    140381098U,	// VCVTPS2DQrm
    139332522U,	// VCVTPS2DQrr
    140381109U,	// VCVTPS2PDYrm
    139332533U,	// VCVTPS2PDYrr
    140512181U,	// VCVTPS2PDrm
    139332533U,	// VCVTPS2PDrr
    2691439580U,	// VCVTPS2PHYmr
    139353052U,	// VCVTPS2PHYrr
    1077959644U,	// VCVTPS2PHmr
    139353052U,	// VCVTPS2PHrr
    140512192U,	// VCVTSD2SI64rm
    139332544U,	// VCVTSD2SI64rr
    140512192U,	// VCVTSD2SIrm
    139332544U,	// VCVTSD2SIrr
    139348939U,	// VCVTSD2SSrm
    139348939U,	// VCVTSD2SSrr
    139348950U,	// VCVTSI2SD64rm
    139348950U,	// VCVTSI2SD64rr
    139348950U,	// VCVTSI2SDLrm
    139348950U,	// VCVTSI2SDLrr
    139348950U,	// VCVTSI2SDrm
    139348950U,	// VCVTSI2SDrr
    139348961U,	// VCVTSI2SS64rm
    139348961U,	// VCVTSI2SS64rr
    139348961U,	// VCVTSI2SSrm
    139348961U,	// VCVTSI2SSrr
    139348972U,	// VCVTSS2SDrm
    139348972U,	// VCVTSS2SDrr
    140647399U,	// VCVTSS2SI64rm
    139336679U,	// VCVTSS2SI64rr
    140647399U,	// VCVTSS2SIrm
    139336679U,	// VCVTSS2SIrr
    139336690U,	// VCVTTPD2DQXrYr
    140385278U,	// VCVTTPD2DQXrm
    139336702U,	// VCVTTPD2DQXrr
    141171723U,	// VCVTTPD2DQYrm
    139336715U,	// VCVTTPD2DQYrr
    140385266U,	// VCVTTPD2DQrm
    139336690U,	// VCVTTPD2DQrr
    141167607U,	// VCVTTPS2DQYrm
    139332599U,	// VCVTTPS2DQYrr
    140381175U,	// VCVTTPS2DQrm
    139332599U,	// VCVTTPS2DQrr
    140512259U,	// VCVTTSD2SI64rm
    139332611U,	// VCVTTSD2SI64rr
    140512259U,	// VCVTTSD2SIrm
    139332611U,	// VCVTTSD2SIrr
    140643343U,	// VCVTTSS2SI64rm
    139332623U,	// VCVTTSS2SI64rr
    140643343U,	// VCVTTSS2SIrm
    139332623U,	// VCVTTSS2SIrr
    139353112U,	// VDIVPDYrm
    139353112U,	// VDIVPDYrr
    139353112U,	// VDIVPDrm
    139353112U,	// VDIVPDrr
    139353120U,	// VDIVPSYrm
    139353120U,	// VDIVPSYrr
    139353120U,	// VDIVPSrm
    139353120U,	// VDIVPSrr
    139353128U,	// VDIVSDrm
    139353128U,	// VDIVSDrm_Int
    139353128U,	// VDIVSDrr
    139353128U,	// VDIVSDrr_Int
    139353136U,	// VDIVSSrm
    139353136U,	// VDIVSSrm_Int
    139353136U,	// VDIVSSrr
    139353136U,	// VDIVSSrr_Int
    139353144U,	// VDPPDrmi
    139353144U,	// VDPPDrri
    139353151U,	// VDPPSYrmi
    139353151U,	// VDPPSYrri
    139353151U,	// VDPPSrmi
    139353151U,	// VDPPSrri
    268442694U,	// VERRm
    134224966U,	// VERRr
    268442700U,	// VERWm
    134224972U,	// VERWr
    2691439698U,	// VEXTRACTF128mr
    139353170U,	// VEXTRACTF128rr
    943742048U,	// VEXTRACTPSmr
    139353184U,	// VEXTRACTPSrr
    139353196U,	// VEXTRACTPSrr64
    139353209U,	// VFMADDPDr132m
    139353209U,	// VFMADDPDr132mY
    139353209U,	// VFMADDPDr132r
    139353209U,	// VFMADDPDr132rY
    139353222U,	// VFMADDPDr213m
    139353222U,	// VFMADDPDr213mY
    139353222U,	// VFMADDPDr213r
    139353222U,	// VFMADDPDr213rY
    139353235U,	// VFMADDPDr231m
    139353235U,	// VFMADDPDr231mY
    139353235U,	// VFMADDPDr231r
    139353235U,	// VFMADDPDr231rY
    139353248U,	// VFMADDPSr132m
    139353248U,	// VFMADDPSr132mY
    139353248U,	// VFMADDPSr132r
    139353248U,	// VFMADDPSr132rY
    139353261U,	// VFMADDPSr213m
    139353261U,	// VFMADDPSr213mY
    139353261U,	// VFMADDPSr213r
    139353261U,	// VFMADDPSr213rY
    139353274U,	// VFMADDPSr231m
    139353274U,	// VFMADDPSr231mY
    139353274U,	// VFMADDPSr231r
    139353274U,	// VFMADDPSr231rY
    139353287U,	// VFMADDSUBPDr132m
    139353287U,	// VFMADDSUBPDr132mY
    139353287U,	// VFMADDSUBPDr132r
    139353287U,	// VFMADDSUBPDr132rY
    139353303U,	// VFMADDSUBPDr213m
    139353303U,	// VFMADDSUBPDr213mY
    139353303U,	// VFMADDSUBPDr213r
    139353303U,	// VFMADDSUBPDr213rY
    139353319U,	// VFMADDSUBPDr231m
    139353319U,	// VFMADDSUBPDr231mY
    139353319U,	// VFMADDSUBPDr231r
    139353319U,	// VFMADDSUBPDr231rY
    139353335U,	// VFMADDSUBPSr132m
    139353335U,	// VFMADDSUBPSr132mY
    139353335U,	// VFMADDSUBPSr132r
    139353335U,	// VFMADDSUBPSr132rY
    139353351U,	// VFMADDSUBPSr213m
    139353351U,	// VFMADDSUBPSr213mY
    139353351U,	// VFMADDSUBPSr213r
    139353351U,	// VFMADDSUBPSr213rY
    139353367U,	// VFMADDSUBPSr231m
    139353367U,	// VFMADDSUBPSr231mY
    139353367U,	// VFMADDSUBPSr231r
    139353367U,	// VFMADDSUBPSr231rY
    139353383U,	// VFMSUBADDPDr132m
    139353383U,	// VFMSUBADDPDr132mY
    139353383U,	// VFMSUBADDPDr132r
    139353383U,	// VFMSUBADDPDr132rY
    139353399U,	// VFMSUBADDPDr213m
    139353399U,	// VFMSUBADDPDr213mY
    139353399U,	// VFMSUBADDPDr213r
    139353399U,	// VFMSUBADDPDr213rY
    139353415U,	// VFMSUBADDPDr231m
    139353415U,	// VFMSUBADDPDr231mY
    139353415U,	// VFMSUBADDPDr231r
    139353415U,	// VFMSUBADDPDr231rY
    139353431U,	// VFMSUBADDPSr132m
    139353431U,	// VFMSUBADDPSr132mY
    139353431U,	// VFMSUBADDPSr132r
    139353431U,	// VFMSUBADDPSr132rY
    139353447U,	// VFMSUBADDPSr213m
    139353447U,	// VFMSUBADDPSr213mY
    139353447U,	// VFMSUBADDPSr213r
    139353447U,	// VFMSUBADDPSr213rY
    139353463U,	// VFMSUBADDPSr231m
    139353463U,	// VFMSUBADDPSr231mY
    139353463U,	// VFMSUBADDPSr231r
    139353463U,	// VFMSUBADDPSr231rY
    139353479U,	// VFMSUBPDr132m
    139353479U,	// VFMSUBPDr132mY
    139353479U,	// VFMSUBPDr132r
    139353479U,	// VFMSUBPDr132rY
    139353492U,	// VFMSUBPDr213m
    139353492U,	// VFMSUBPDr213mY
    139353492U,	// VFMSUBPDr213r
    139353492U,	// VFMSUBPDr213rY
    139353505U,	// VFMSUBPDr231m
    139353505U,	// VFMSUBPDr231mY
    139353505U,	// VFMSUBPDr231r
    139353505U,	// VFMSUBPDr231rY
    139353518U,	// VFMSUBPSr132m
    139353518U,	// VFMSUBPSr132mY
    139353518U,	// VFMSUBPSr132r
    139353518U,	// VFMSUBPSr132rY
    139353531U,	// VFMSUBPSr213m
    139353531U,	// VFMSUBPSr213mY
    139353531U,	// VFMSUBPSr213r
    139353531U,	// VFMSUBPSr213rY
    139353544U,	// VFMSUBPSr231m
    139353544U,	// VFMSUBPSr231mY
    139353544U,	// VFMSUBPSr231r
    139353544U,	// VFMSUBPSr231rY
    139353557U,	// VFNMADDPDr132m
    139353557U,	// VFNMADDPDr132mY
    139353557U,	// VFNMADDPDr132r
    139353557U,	// VFNMADDPDr132rY
    139353571U,	// VFNMADDPDr213m
    139353571U,	// VFNMADDPDr213mY
    139353571U,	// VFNMADDPDr213r
    139353571U,	// VFNMADDPDr213rY
    139353585U,	// VFNMADDPDr231m
    139353585U,	// VFNMADDPDr231mY
    139353585U,	// VFNMADDPDr231r
    139353585U,	// VFNMADDPDr231rY
    139353599U,	// VFNMADDPSr132m
    139353599U,	// VFNMADDPSr132mY
    139353599U,	// VFNMADDPSr132r
    139353599U,	// VFNMADDPSr132rY
    139353613U,	// VFNMADDPSr213m
    139353613U,	// VFNMADDPSr213mY
    139353613U,	// VFNMADDPSr213r
    139353613U,	// VFNMADDPSr213rY
    139353627U,	// VFNMADDPSr231m
    139353627U,	// VFNMADDPSr231mY
    139353627U,	// VFNMADDPSr231r
    139353627U,	// VFNMADDPSr231rY
    139353641U,	// VFNMSUBPDr132m
    139353641U,	// VFNMSUBPDr132mY
    139353641U,	// VFNMSUBPDr132r
    139353641U,	// VFNMSUBPDr132rY
    139353655U,	// VFNMSUBPDr213m
    139353655U,	// VFNMSUBPDr213mY
    139353655U,	// VFNMSUBPDr213r
    139353655U,	// VFNMSUBPDr213rY
    139353669U,	// VFNMSUBPDr231m
    139353669U,	// VFNMSUBPDr231mY
    139353669U,	// VFNMSUBPDr231r
    139353669U,	// VFNMSUBPDr231rY
    139353683U,	// VFNMSUBPSr132m
    139353683U,	// VFNMSUBPSr132mY
    139353683U,	// VFNMSUBPSr132r
    139353683U,	// VFNMSUBPSr132rY
    139353697U,	// VFNMSUBPSr213m
    139353697U,	// VFNMSUBPSr213mY
    139353697U,	// VFNMSUBPSr213r
    139353697U,	// VFNMSUBPSr213rY
    139353711U,	// VFNMSUBPSr231m
    139353711U,	// VFNMSUBPSr231mY
    139353711U,	// VFNMSUBPSr231r
    139353711U,	// VFNMSUBPSr231rY
    139352817U,	// VFsANDNPDrm
    139352817U,	// VFsANDNPDrr
    139352826U,	// VFsANDNPSrm
    139352826U,	// VFsANDNPSrr
    139352835U,	// VFsANDPDrm
    139352835U,	// VFsANDPDrr
    139352843U,	// VFsANDPSrm
    139352843U,	// VFsANDPSrr
    139353725U,	// VFsORPDrm
    139353725U,	// VFsORPDrr
    139353732U,	// VFsORPSrm
    139353732U,	// VFsORPSrr
    139353739U,	// VFsXORPDrm
    139353739U,	// VFsXORPDrr
    139353747U,	// VFsXORPSrm
    139353747U,	// VFsXORPSrr
    139353755U,	// VHADDPDYrm
    139353755U,	// VHADDPDYrr
    139353755U,	// VHADDPDrm
    139353755U,	// VHADDPDrr
    139353764U,	// VHADDPSYrm
    139353764U,	// VHADDPSYrr
    139353764U,	// VHADDPSrm
    139353764U,	// VHADDPSrr
    139353773U,	// VHSUBPDYrm
    139353773U,	// VHSUBPDYrr
    139353773U,	// VHSUBPDrm
    139353773U,	// VHSUBPDrr
    139353782U,	// VHSUBPSYrm
    139353782U,	// VHSUBPSYrr
    139353782U,	// VHSUBPSrm
    139353782U,	// VHSUBPSrr
    139353791U,	// VINSERTF128rm
    139353791U,	// VINSERTF128rr
    139353804U,	// VINSERTPSrm
    139353804U,	// VINSERTPSrr
    141041367U,	// VLDDQUYrm
    139206359U,	// VLDDQUrm
    536878815U,	// VLDMXCSR
    139337449U,	// VMASKMOVDQU
    139337449U,	// VMASKMOVDQU64
    2825658102U,	// VMASKMOVPDYmr
    139353846U,	// VMASKMOVPDYrm
    2691440374U,	// VMASKMOVPDmr
    139353846U,	// VMASKMOVPDrm
    2825658114U,	// VMASKMOVPSYmr
    139353858U,	// VMASKMOVPSYrm
    2691440386U,	// VMASKMOVPSmr
    139353858U,	// VMASKMOVPSrm
    139353870U,	// VMAXPDYrm
    139353870U,	// VMAXPDYrm_Int
    139353870U,	// VMAXPDYrr
    139353870U,	// VMAXPDYrr_Int
    139353870U,	// VMAXPDrm
    139353870U,	// VMAXPDrm_Int
    139353870U,	// VMAXPDrr
    139353870U,	// VMAXPDrr_Int
    139353878U,	// VMAXPSYrm
    139353878U,	// VMAXPSYrm_Int
    139353878U,	// VMAXPSYrr
    139353878U,	// VMAXPSYrr_Int
    139353878U,	// VMAXPSrm
    139353878U,	// VMAXPSrm_Int
    139353878U,	// VMAXPSrr
    139353878U,	// VMAXPSrr_Int
    139353886U,	// VMAXSDrm
    139353886U,	// VMAXSDrm_Int
    139353886U,	// VMAXSDrr
    139353886U,	// VMAXSDrr_Int
    139353894U,	// VMAXSSrm
    139353894U,	// VMAXSSrm_Int
    139353894U,	// VMAXSSrr
    139353894U,	// VMAXSSrr_Int
    7982U,	// VMCALL
    671096629U,	// VMCLEARm
    139353918U,	// VMINPDYrm
    139353918U,	// VMINPDYrm_Int
    139353918U,	// VMINPDYrr
    139353918U,	// VMINPDYrr_Int
    139353918U,	// VMINPDrm
    139353918U,	// VMINPDrm_Int
    139353918U,	// VMINPDrr
    139353918U,	// VMINPDrr_Int
    139353926U,	// VMINPSYrm
    139353926U,	// VMINPSYrm_Int
    139353926U,	// VMINPSYrr
    139353926U,	// VMINPSYrr_Int
    139353926U,	// VMINPSrm
    139353926U,	// VMINPSrm_Int
    139353926U,	// VMINPSrr
    139353926U,	// VMINPSrr_Int
    139353934U,	// VMINSDrm
    139353934U,	// VMINSDrm_Int
    139353934U,	// VMINSDrr
    139353934U,	// VMINSDrr_Int
    139353942U,	// VMINSSrm
    139353942U,	// VMINSSrm_Int
    139353942U,	// VMINSSrr
    139353942U,	// VMINSSrr_Int
    8030U,	// VMLAUNCH
    139337575U,	// VMOV64toPQIrr
    139730791U,	// VMOV64toSDrm
    139337575U,	// VMOV64toSDrr
    2818574911U,	// VMOVAPDYmr
    141167167U,	// VMOVAPDYrm
    139332159U,	// VMOVAPDYrr
    139332159U,	// VMOVAPDYrr_REV
    2684357183U,	// VMOVAPDmr
    140380735U,	// VMOVAPDrm
    139332159U,	// VMOVAPDrr
    139332159U,	// VMOVAPDrr_REV
    2818574920U,	// VMOVAPSYmr
    141167176U,	// VMOVAPSYrm
    139332168U,	// VMOVAPSYrr
    139332168U,	// VMOVAPSYrr_REV
    2684357192U,	// VMOVAPSmr
    140380744U,	// VMOVAPSrm
    139332168U,	// VMOVAPSrr
    139332168U,	// VMOVAPSrr_REV
    141172590U,	// VMOVDDUPYrm
    139337582U,	// VMOVDDUPYrr
    140517230U,	// VMOVDDUPrm
    139337582U,	// VMOVDDUPrr
    139599736U,	// VMOVDI2PDIrm
    139337592U,	// VMOVDI2PDIrr
    139599736U,	// VMOVDI2SSrm
    139337592U,	// VMOVDI2SSrr
    2952798079U,	// VMOVDQAYmr
    141041535U,	// VMOVDQAYrm
    139337599U,	// VMOVDQAYrr
    139337599U,	// VMOVDQAYrr_REV
    1749032831U,	// VMOVDQAmr
    139206527U,	// VMOVDQArm
    139337599U,	// VMOVDQArr
    139337599U,	// VMOVDQArr_REV
    2952798088U,	// VMOVDQUYmr
    141041544U,	// VMOVDQUYrm
    139337608U,	// VMOVDQUYrr
    139337608U,	// VMOVDQUYrr_REV
    1749032840U,	// VMOVDQUmr
    1749032840U,	// VMOVDQUmr_Int
    139206536U,	// VMOVDQUrm
    139337608U,	// VMOVDQUrr
    139337608U,	// VMOVDQUrr_REV
    139354001U,	// VMOVHLPSrr
    1077944219U,	// VMOVHPDmr
    139354011U,	// VMOVHPDrm
    1077944228U,	// VMOVHPSmr
    139354020U,	// VMOVHPSrm
    139354029U,	// VMOVLHPSrr
    1077944247U,	// VMOVLPDmr
    139354039U,	// VMOVLPDrm
    1077944256U,	// VMOVLPSmr
    139354048U,	// VMOVLPSrm
    675290983U,	// VMOVLQ128mr
    139337673U,	// VMOVMSKPDYr64r
    139337673U,	// VMOVMSKPDYrr32
    139337673U,	// VMOVMSKPDYrr64
    139337673U,	// VMOVMSKPDr64r
    139337673U,	// VMOVMSKPDrr32
    139337673U,	// VMOVMSKPDrr64
    139337684U,	// VMOVMSKPSYr64r
    139337684U,	// VMOVMSKPSYrr32
    139337684U,	// VMOVMSKPSYrr64
    139337684U,	// VMOVMSKPSr64r
    139337684U,	// VMOVMSKPSrr32
    139337684U,	// VMOVMSKPSrr64
    139206623U,	// VMOVNTDQArm
    2818580458U,	// VMOVNTDQY_64mr
    2818580458U,	// VMOVNTDQYmr
    2684362730U,	// VMOVNTDQ_64mr
    2684362730U,	// VMOVNTDQmr
    2818580468U,	// VMOVNTPDYmr
    2684362740U,	// VMOVNTPDmr
    2818580478U,	// VMOVNTPSYmr
    2684362750U,	// VMOVNTPSmr
    541073272U,	// VMOVPDI2DImr
    139337592U,	// VMOVPDI2DIrr
    675290983U,	// VMOVPQI2QImr
    139333288U,	// VMOVPQIto64rr
    139730791U,	// VMOVQI2PQIrm
    139337575U,	// VMOVQd64rr
    139337592U,	// VMOVQd64rr_alt
    139337575U,	// VMOVQs64rr
    139337575U,	// VMOVQxrxr
    1077944328U,	// VMOVSDmr
    140517384U,	// VMOVSDrm
    139354120U,	// VMOVSDrr
    139354120U,	// VMOVSDrr_REV
    675290983U,	// VMOVSDto64mr
    139337575U,	// VMOVSDto64rr
    141172752U,	// VMOVSHDUPYrm
    139337744U,	// VMOVSHDUPYrr
    140386320U,	// VMOVSHDUPrm
    139337744U,	// VMOVSHDUPrr
    141172763U,	// VMOVSLDUPYrm
    139337755U,	// VMOVSLDUPYrr
    140386331U,	// VMOVSLDUPrm
    139337755U,	// VMOVSLDUPrr
    541073272U,	// VMOVSS2DImr
    139337592U,	// VMOVSS2DIrr
    943726630U,	// VMOVSSmr
    140648486U,	// VMOVSSrm
    139354150U,	// VMOVSSrr
    139354150U,	// VMOVSSrr_REV
    2818580526U,	// VMOVUPDYmr
    141172782U,	// VMOVUPDYrm
    139337774U,	// VMOVUPDYrr
    139337774U,	// VMOVUPDYrr_REV
    2684362798U,	// VMOVUPDmr
    140386350U,	// VMOVUPDrm
    139337774U,	// VMOVUPDrr
    139337774U,	// VMOVUPDrr_REV
    2818580535U,	// VMOVUPSYmr
    141172791U,	// VMOVUPSYrm
    139337783U,	// VMOVUPSYrr
    139337783U,	// VMOVUPSYrr_REV
    2684362807U,	// VMOVUPSmr
    140386359U,	// VMOVUPSrm
    139337783U,	// VMOVUPSrr
    139337783U,	// VMOVUPSrr_REV
    139599736U,	// VMOVZDI2PDIrm
    139337592U,	// VMOVZDI2PDIrr
    139206503U,	// VMOVZPQILo2PQIrm
    139337575U,	// VMOVZPQILo2PQIrr
    139730791U,	// VMOVZQI2PQIrm
    139337575U,	// VMOVZQI2PQIrr
    139354176U,	// VMPSADBWrmi
    139354176U,	// VMPSADBWrri
    671096906U,	// VMPTRLDm
    671096915U,	// VMPTRSTm
    541073500U,	// VMREAD32rm
    139337820U,	// VMREAD32rr
    675291228U,	// VMREAD64rm
    139337820U,	// VMREAD64rr
    8292U,	// VMRESUME
    139354221U,	// VMULPDYrm
    139354221U,	// VMULPDYrr
    139354221U,	// VMULPDrm
    139354221U,	// VMULPDrr
    139354229U,	// VMULPSYrm
    139354229U,	// VMULPSYrr
    139354229U,	// VMULPSrm
    139354229U,	// VMULPSrr
    139354237U,	// VMULSDrm
    139354237U,	// VMULSDrm_Int
    139354237U,	// VMULSDrr
    139354237U,	// VMULSDrr_Int
    139354245U,	// VMULSSrm
    139354245U,	// VMULSSrm_Int
    139354245U,	// VMULSSrr
    139354245U,	// VMULSSrr_Int
    139600013U,	// VMWRITE32rm
    139337869U,	// VMWRITE32rr
    139731085U,	// VMWRITE64rm
    139337869U,	// VMWRITE64rr
    8342U,	// VMXOFF
    8349U,	// VMXON
    139353725U,	// VORPDYrm
    139353725U,	// VORPDYrr
    139353725U,	// VORPDrm
    139353725U,	// VORPDrr
    139353732U,	// VORPSYrm
    139353732U,	// VORPSYrr
    139353732U,	// VORPSrm
    139353732U,	// VORPSrr
    139206820U,	// VPABSBrm128
    139337892U,	// VPABSBrr128
    139206828U,	// VPABSDrm128
    139337900U,	// VPABSDrr128
    139206836U,	// VPABSWrm128
    139337908U,	// VPABSWrr128
    139354300U,	// VPACKSSDWrm
    139354300U,	// VPACKSSDWrr
    139354311U,	// VPACKSSWBrm
    139354311U,	// VPACKSSWBrr
    139354322U,	// VPACKUSDWrm
    139354322U,	// VPACKUSDWrr
    139354333U,	// VPACKUSWBrm
    139354333U,	// VPACKUSWBrr
    139354344U,	// VPADDBrm
    139354344U,	// VPADDBrr
    139354352U,	// VPADDDrm
    139354352U,	// VPADDDrr
    139354360U,	// VPADDQrm
    139354360U,	// VPADDQrr
    139354368U,	// VPADDSBrm
    139354368U,	// VPADDSBrr
    139354377U,	// VPADDSWrm
    139354377U,	// VPADDSWrr
    139354386U,	// VPADDUSBrm
    139354386U,	// VPADDUSBrr
    139354396U,	// VPADDUSWrm
    139354396U,	// VPADDUSWrr
    139354406U,	// VPADDWrm
    139354406U,	// VPADDWrr
    139354414U,	// VPALIGNR128rm
    139354414U,	// VPALIGNR128rr
    139354424U,	// VPANDNrm
    139354424U,	// VPANDNrr
    139354432U,	// VPANDrm
    139354432U,	// VPANDrr
    139354439U,	// VPAVGBrm
    139354439U,	// VPAVGBrr
    139354447U,	// VPAVGWrm
    139354447U,	// VPAVGWrr
    139354455U,	// VPBLENDVBrm
    139354455U,	// VPBLENDVBrr
    139354466U,	// VPBLENDWrmi
    139354466U,	// VPBLENDWrri
    139354476U,	// VPCLMULQDQrm
    139354476U,	// VPCLMULQDQrr
    139354488U,	// VPCMPEQBrm
    139354488U,	// VPCMPEQBrr
    139354498U,	// VPCMPEQDrm
    139354498U,	// VPCMPEQDrr
    139354508U,	// VPCMPEQQrm
    139354508U,	// VPCMPEQQrr
    139354518U,	// VPCMPEQWrm
    139354518U,	// VPCMPEQWrr
    139223456U,	// VPCMPESTRIArm
    139354528U,	// VPCMPESTRIArr
    139223456U,	// VPCMPESTRICrm
    139354528U,	// VPCMPESTRICrr
    139223456U,	// VPCMPESTRIOrm
    139354528U,	// VPCMPESTRIOrr
    139223456U,	// VPCMPESTRISrm
    139354528U,	// VPCMPESTRISrr
    139223456U,	// VPCMPESTRIZrm
    139354528U,	// VPCMPESTRIZrr
    139223456U,	// VPCMPESTRIrm
    139354528U,	// VPCMPESTRIrr
    0U,	// VPCMPESTRM128MEM
    0U,	// VPCMPESTRM128REG
    139223468U,	// VPCMPESTRM128rm
    139354540U,	// VPCMPESTRM128rr
    139354552U,	// VPCMPGTBrm
    139354552U,	// VPCMPGTBrr
    139354562U,	// VPCMPGTDrm
    139354562U,	// VPCMPGTDrr
    139354572U,	// VPCMPGTQrm
    139354572U,	// VPCMPGTQrr
    139354582U,	// VPCMPGTWrm
    139354582U,	// VPCMPGTWrr
    139223520U,	// VPCMPISTRIArm
    139354592U,	// VPCMPISTRIArr
    139223520U,	// VPCMPISTRICrm
    139354592U,	// VPCMPISTRICrr
    139223520U,	// VPCMPISTRIOrm
    139354592U,	// VPCMPISTRIOrr
    139223520U,	// VPCMPISTRISrm
    139354592U,	// VPCMPISTRISrr
    139223520U,	// VPCMPISTRIZrm
    139354592U,	// VPCMPISTRIZrr
    139223520U,	// VPCMPISTRIrm
    139354592U,	// VPCMPISTRIrr
    0U,	// VPCMPISTRM128MEM
    0U,	// VPCMPISTRM128REG
    139223532U,	// VPCMPISTRM128rm
    139354604U,	// VPCMPISTRM128rr
    139354616U,	// VPERM2F128rm
    139354616U,	// VPERM2F128rr
    141189636U,	// VPERMILPDYmi
    139354628U,	// VPERMILPDYri
    139354628U,	// VPERMILPDYrm
    139354628U,	// VPERMILPDYrr
    140403204U,	// VPERMILPDmi
    139354628U,	// VPERMILPDri
    139354628U,	// VPERMILPDrm
    139354628U,	// VPERMILPDrr
    141189647U,	// VPERMILPSYmi
    139354639U,	// VPERMILPSYri
    139354639U,	// VPERMILPSYrm
    139354639U,	// VPERMILPSYrr
    140403215U,	// VPERMILPSmi
    139354639U,	// VPERMILPSri
    139354639U,	// VPERMILPSrm
    139354639U,	// VPERMILPSrr
    809525786U,	// VPEXTRBmr
    139354650U,	// VPEXTRBrr
    139354650U,	// VPEXTRBrr64
    541090339U,	// VPEXTRDmr
    139354659U,	// VPEXTRDrr
    675308076U,	// VPEXTRQmr
    139354668U,	// VPEXTRQrr
    272654901U,	// VPEXTRWmr
    139354677U,	// VPEXTRWri
    139354686U,	// VPHADDDrm128
    139354686U,	// VPHADDDrr128
    139354695U,	// VPHADDSWrm128
    139354695U,	// VPHADDSWrr128
    139354705U,	// VPHADDWrm128
    139354705U,	// VPHADDWrr128
    139207258U,	// VPHMINPOSUWrm128
    139338330U,	// VPHMINPOSUWrr128
    139354727U,	// VPHSUBDrm128
    139354727U,	// VPHSUBDrr128
    139354736U,	// VPHSUBSWrm128
    139354736U,	// VPHSUBSWrr128
    139354746U,	// VPHSUBWrm128
    139354746U,	// VPHSUBWrr128
    139354755U,	// VPINSRBrm
    139354755U,	// VPINSRBrr
    139354764U,	// VPINSRDrm
    139354764U,	// VPINSRDrr
    139354773U,	// VPINSRQrm
    139354773U,	// VPINSRQrr
    139354782U,	// VPINSRWrmi
    139354782U,	// VPINSRWrr64i
    139354782U,	// VPINSRWrri
    139354791U,	// VPMADDUBSWrm128
    139354791U,	// VPMADDUBSWrr128
    139354803U,	// VPMADDWDrm
    139354803U,	// VPMADDWDrr
    139354813U,	// VPMAXSBrm
    139354813U,	// VPMAXSBrr
    139354822U,	// VPMAXSDrm
    139354822U,	// VPMAXSDrr
    139354831U,	// VPMAXSWrm
    139354831U,	// VPMAXSWrr
    139354840U,	// VPMAXUBrm
    139354840U,	// VPMAXUBrr
    139354849U,	// VPMAXUDrm
    139354849U,	// VPMAXUDrr
    139354858U,	// VPMAXUWrm
    139354858U,	// VPMAXUWrr
    139354867U,	// VPMINSBrm
    139354867U,	// VPMINSBrr
    139354876U,	// VPMINSDrm
    139354876U,	// VPMINSDrr
    139354885U,	// VPMINSWrm
    139354885U,	// VPMINSWrr
    139354894U,	// VPMINUBrm
    139354894U,	// VPMINUBrr
    139354903U,	// VPMINUDrm
    139354903U,	// VPMINUDrr
    139354912U,	// VPMINUWrm
    139354912U,	// VPMINUWrr
    139338537U,	// VPMOVMSKBr64r
    139338537U,	// VPMOVMSKBrr
    139600692U,	// VPMOVSXBDrm
    139338548U,	// VPMOVSXBDrr
    139469631U,	// VPMOVSXBQrm
    139338559U,	// VPMOVSXBQrr
    139731786U,	// VPMOVSXBWrm
    139338570U,	// VPMOVSXBWrr
    139731797U,	// VPMOVSXDQrm
    139338581U,	// VPMOVSXDQrr
    139731808U,	// VPMOVSXWDrm
    139338592U,	// VPMOVSXWDrr
    139600747U,	// VPMOVSXWQrm
    139338603U,	// VPMOVSXWQrr
    139600758U,	// VPMOVZXBDrm
    139338614U,	// VPMOVZXBDrr
    139469697U,	// VPMOVZXBQrm
    139338625U,	// VPMOVZXBQrr
    139731852U,	// VPMOVZXBWrm
    139338636U,	// VPMOVZXBWrr
    139731863U,	// VPMOVZXDQrm
    139338647U,	// VPMOVZXDQrr
    139731874U,	// VPMOVZXWDrm
    139338658U,	// VPMOVZXWDrr
    139600813U,	// VPMOVZXWQrm
    139338669U,	// VPMOVZXWQrr
    139355064U,	// VPMULDQrm
    139355064U,	// VPMULDQrr
    139355073U,	// VPMULHRSWrm128
    139355073U,	// VPMULHRSWrr128
    139355084U,	// VPMULHUWrm
    139355084U,	// VPMULHUWrr
    139355094U,	// VPMULHWrm
    139355094U,	// VPMULHWrr
    139355103U,	// VPMULLDrm
    139355103U,	// VPMULLDrr
    139355112U,	// VPMULLWrm
    139355112U,	// VPMULLWrr
    139355121U,	// VPMULUDQrm
    139355121U,	// VPMULUDQrr
    139355131U,	// VPORrm
    139355131U,	// VPORrr
    139355137U,	// VPSADBWrm
    139355137U,	// VPSADBWrr
    139355146U,	// VPSHUFBrm128
    139355146U,	// VPSHUFBrr128
    139224083U,	// VPSHUFDmi
    139355155U,	// VPSHUFDri
    139224092U,	// VPSHUFHWmi
    139355164U,	// VPSHUFHWri
    139224102U,	// VPSHUFLWmi
    139355174U,	// VPSHUFLWri
    139355184U,	// VPSIGNBrm128
    139355184U,	// VPSIGNBrr128
    139355193U,	// VPSIGNDrm128
    139355193U,	// VPSIGNDrr128
    139355202U,	// VPSIGNWrm128
    139355202U,	// VPSIGNWrr128
    139355211U,	// VPSLLDQri
    139355220U,	// VPSLLDri
    139355220U,	// VPSLLDrm
    139355220U,	// VPSLLDrr
    139355228U,	// VPSLLQri
    139355228U,	// VPSLLQrm
    139355228U,	// VPSLLQrr
    139355236U,	// VPSLLWri
    139355236U,	// VPSLLWrm
    139355236U,	// VPSLLWrr
    139355244U,	// VPSRADri
    139355244U,	// VPSRADrm
    139355244U,	// VPSRADrr
    139355252U,	// VPSRAWri
    139355252U,	// VPSRAWrm
    139355252U,	// VPSRAWrr
    139355260U,	// VPSRLDQri
    139355269U,	// VPSRLDri
    139355269U,	// VPSRLDrm
    139355269U,	// VPSRLDrr
    139355277U,	// VPSRLQri
    139355277U,	// VPSRLQrm
    139355277U,	// VPSRLQrr
    139355285U,	// VPSRLWri
    139355285U,	// VPSRLWrm
    139355285U,	// VPSRLWrr
    139355293U,	// VPSUBBrm
    139355293U,	// VPSUBBrr
    139355301U,	// VPSUBDrm
    139355301U,	// VPSUBDrr
    139355309U,	// VPSUBQrm
    139355309U,	// VPSUBQrr
    139355317U,	// VPSUBSBrm
    139355317U,	// VPSUBSBrr
    139355326U,	// VPSUBSWrm
    139355326U,	// VPSUBSWrr
    139355335U,	// VPSUBUSBrm
    139355335U,	// VPSUBUSBrr
    139355345U,	// VPSUBUSWrm
    139355345U,	// VPSUBUSWrr
    139355355U,	// VPSUBWrm
    139355355U,	// VPSUBWrr
    141042915U,	// VPTESTYrm
    139338979U,	// VPTESTYrr
    140387555U,	// VPTESTrm
    139338979U,	// VPTESTrr
    139355371U,	// VPUNPCKHBWrm
    139355371U,	// VPUNPCKHBWrr
    139355383U,	// VPUNPCKHDQrm
    139355383U,	// VPUNPCKHDQrr
    139355395U,	// VPUNPCKHQDQrm
    139355395U,	// VPUNPCKHQDQrr
    139355408U,	// VPUNPCKHWDrm
    139355408U,	// VPUNPCKHWDrr
    139355420U,	// VPUNPCKLBWrm
    139355420U,	// VPUNPCKLBWrr
    139355432U,	// VPUNPCKLDQrm
    139355432U,	// VPUNPCKLDQrr
    139355444U,	// VPUNPCKLQDQrm
    139355444U,	// VPUNPCKLQDQrr
    139355457U,	// VPUNPCKLWDrm
    139355457U,	// VPUNPCKLWDrr
    139355469U,	// VPXORrm
    139355469U,	// VPXORrr
    141174100U,	// VRCPPSYm
    141174100U,	// VRCPPSYm_Int
    139339092U,	// VRCPPSYr
    139339092U,	// VRCPPSYr_Int
    140387668U,	// VRCPPSm
    140387668U,	// VRCPPSm_Int
    139339092U,	// VRCPPSr
    139339092U,	// VRCPPSr_Int
    139355484U,	// VRCPSSm
    140666204U,	// VRCPSSm_Int
    139355484U,	// VRCPSSr
    140404068U,	// VROUNDPDm
    140404068U,	// VROUNDPDm_AVX
    139355492U,	// VROUNDPDr
    139355492U,	// VROUNDPDr_AVX
    140404078U,	// VROUNDPSm
    140404078U,	// VROUNDPSm_AVX
    139355502U,	// VROUNDPSr
    139355502U,	// VROUNDPSr_AVX
    139355512U,	// VROUNDSDm
    139355512U,	// VROUNDSDm_AVX
    139355512U,	// VROUNDSDr
    139355512U,	// VROUNDSDr_AVX
    139355522U,	// VROUNDSSm
    139355522U,	// VROUNDSSm_AVX
    139355522U,	// VROUNDSSr
    139355522U,	// VROUNDSSr_AVX
    141190500U,	// VROUNDYPDm
    141190500U,	// VROUNDYPDm_AVX
    139355492U,	// VROUNDYPDr
    139355492U,	// VROUNDYPDr_AVX
    141190510U,	// VROUNDYPSm
    141190510U,	// VROUNDYPSm_AVX
    139355502U,	// VROUNDYPSr
    139355502U,	// VROUNDYPSr_AVX
    141174156U,	// VRSQRTPSYm
    141174156U,	// VRSQRTPSYm_Int
    139339148U,	// VRSQRTPSYr
    139339148U,	// VRSQRTPSYr_Int
    140387724U,	// VRSQRTPSm
    140387724U,	// VRSQRTPSm_Int
    139339148U,	// VRSQRTPSr
    139339148U,	// VRSQRTPSr_Int
    139355542U,	// VRSQRTSSm
    140666262U,	// VRSQRTSSm_Int
    139355542U,	// VRSQRTSSr
    138700192U,	// VSHUFPDYrmi
    138569120U,	// VSHUFPDYrri
    138700192U,	// VSHUFPDrmi
    138569120U,	// VSHUFPDrri
    139355561U,	// VSHUFPSYrmi
    139355561U,	// VSHUFPSYrri
    139355561U,	// VSHUFPSrmi
    139355561U,	// VSHUFPSrri
    141174194U,	// VSQRTPDYm
    141174194U,	// VSQRTPDYm_Int
    139339186U,	// VSQRTPDYr
    139339186U,	// VSQRTPDYr_Int
    140387762U,	// VSQRTPDm
    140387762U,	// VSQRTPDm_Int
    139339186U,	// VSQRTPDr
    139339186U,	// VSQRTPDr_Int
    141174203U,	// VSQRTPSYm
    141174203U,	// VSQRTPSYm_Int
    139339195U,	// VSQRTPSYr
    139339195U,	// VSQRTPSYr_Int
    140387771U,	// VSQRTPSm
    140387771U,	// VSQRTPSm_Int
    139339195U,	// VSQRTPSr
    139339195U,	// VSQRTPSr_Int
    139355588U,	// VSQRTSDm
    139355588U,	// VSQRTSDm_Int
    139355588U,	// VSQRTSDr
    139355597U,	// VSQRTSSm
    140666317U,	// VSQRTSSm_Int
    139355597U,	// VSQRTSSr
    536880598U,	// VSTMXCSR
    139355616U,	// VSUBPDYrm
    139355616U,	// VSUBPDYrr
    139355616U,	// VSUBPDrm
    139355616U,	// VSUBPDrr
    139355624U,	// VSUBPSYrm
    139355624U,	// VSUBPSYrr
    139355624U,	// VSUBPSrm
    139355624U,	// VSUBPSrr
    139355632U,	// VSUBSDrm
    139355632U,	// VSUBSDrm_Int
    139355632U,	// VSUBSDrr
    139355632U,	// VSUBSDrr_Int
    139355640U,	// VSUBSSrm
    139355640U,	// VSUBSSrm_Int
    139355640U,	// VSUBSSrr
    139355640U,	// VSUBSSrr_Int
    141174272U,	// VTESTPDYrm
    139339264U,	// VTESTPDYrr
    140387840U,	// VTESTPDrm
    139339264U,	// VTESTPDrr
    141174281U,	// VTESTPSYrm
    139339273U,	// VTESTPSYrr
    140387849U,	// VTESTPSrm
    139339273U,	// VTESTPSrr
    140512283U,	// VUCOMISDrm
    139332635U,	// VUCOMISDrr
    140643365U,	// VUCOMISSrm
    139332645U,	// VUCOMISSrr
    139355666U,	// VUNPCKHPDYrm
    139355666U,	// VUNPCKHPDYrr
    139355666U,	// VUNPCKHPDrm
    139355666U,	// VUNPCKHPDrr
    139355677U,	// VUNPCKHPSYrm
    139355677U,	// VUNPCKHPSYrr
    139355677U,	// VUNPCKHPSrm
    139355677U,	// VUNPCKHPSrr
    139355688U,	// VUNPCKLPDYrm
    139355688U,	// VUNPCKLPDYrr
    139355688U,	// VUNPCKLPDrm
    139355688U,	// VUNPCKLPDrr
    139355699U,	// VUNPCKLPSYrm
    139355699U,	// VUNPCKLPSYrr
    139355699U,	// VUNPCKLPSrm
    139355699U,	// VUNPCKLPSrr
    139353739U,	// VXORPDYrm
    139353739U,	// VXORPDYrr
    139353739U,	// VXORPDrm
    139353739U,	// VXORPDrr
    139353747U,	// VXORPSYrm
    139353747U,	// VXORPSYrr
    139353747U,	// VXORPSrm
    139353747U,	// VXORPSrr
    9790U,	// VZEROALL
    9799U,	// VZEROUPPER
    0U,	// V_SET0
    0U,	// V_SETALLONES
    1342178436U,	// W64ALLOCA
    9810U,	// WAIT
    9815U,	// WBINVD
    671089796U,	// WINCALL64m
    1342178436U,	// WINCALL64pcrel32
    134218884U,	// WINCALL64r
    9822U,	// WIN_ALLOCA
    134227577U,	// WRFSBASE
    134227577U,	// WRFSBASE64
    134227587U,	// WRGSBASE
    134227587U,	// WRGSBASE64
    9869U,	// WRMSR
    272639635U,	// XADD16rm
    139339411U,	// XADD16rr
    541075091U,	// XADD32rm
    139339411U,	// XADD32rr
    675292819U,	// XADD64rm
    139339411U,	// XADD64rr
    809510547U,	// XADD8rm
    139339411U,	// XADD8rr
    134227609U,	// XCHG16ar
    2147493539U,	// XCHG16rm
    3087017635U,	// XCHG16rr
    134227625U,	// XCHG32ar
    134227625U,	// XCHG32ar64
    2281711267U,	// XCHG32rm
    3087017635U,	// XCHG32rr
    134227636U,	// XCHG64ar
    2415928995U,	// XCHG64rm
    3087017635U,	// XCHG64rr
    2550146723U,	// XCHG8rm
    3087017635U,	// XCHG8rr
    134227647U,	// XCH_F
    9925U,	// XCRYPTCBC
    9935U,	// XCRYPTCFB
    9945U,	// XCRYPTCTR
    9955U,	// XCRYPTECB
    9965U,	// XCRYPTOFB
    9975U,	// XGETBV
    9982U,	// XLAT
    134227716U,	// XOR16i16
    272639757U,	// XOR16mi
    272639757U,	// XOR16mi8
    272639757U,	// XOR16mr
    411051789U,	// XOR16ri
    411051789U,	// XOR16ri8
    415246093U,	// XOR16rm
    411051789U,	// XOR16rr
    138553101U,	// XOR16rr_REV
    134227730U,	// XOR32i32
    541075213U,	// XOR32mi
    541075213U,	// XOR32mi8
    541075213U,	// XOR32mr
    411051789U,	// XOR32ri
    411051789U,	// XOR32ri8
    419440397U,	// XOR32rm
    411051789U,	// XOR32rr
    138553101U,	// XOR32rr_REV
    134227740U,	// XOR64i32
    675292941U,	// XOR64mi32
    675292941U,	// XOR64mi8
    675292941U,	// XOR64mr
    411051789U,	// XOR64ri32
    411051789U,	// XOR64ri8
    423634701U,	// XOR64rm
    411051789U,	// XOR64rr
    138553101U,	// XOR64rr_REV
    134227750U,	// XOR8i8
    809510669U,	// XOR8mi
    809510669U,	// XOR8mr
    411051789U,	// XOR8ri
    427829005U,	// XOR8rm
    411051789U,	// XOR8rr
    138553101U,	// XOR8rr_REV
    138676817U,	// XORPDrm
    138545745U,	// XORPDrr
    138676824U,	// XORPSrm
    138545752U,	// XORPSrr
    1879058223U,	// XRSTOR
    1879058231U,	// XRSTOR64
    1879058240U,	// XSAVE
    1879058247U,	// XSAVE64
    1879058255U,	// XSAVEOPT
    1879058265U,	// XSAVEOPT64
    10084U,	// XSETBV
    10091U,	// XSHA1
    10097U,	// XSHA256
    10105U,	// XSTORE
    0U
  };

  const char *AsmStrs = 
    "DBG_VALUE\000aaa\000aad\t\000aam\t\000aas\000fabs\000#ACQUIRE_MOV PSEUD"
    "O!\000adc\tAX, \000adc\t\000adc\tEAX, \000adc\tRAX, \000adc\tAL, \000ad"
    "d\tAX, \000add\t\000add\tEAX, \000add\tRAX, \000add\tAL, \000addpd\t\000"
    "addps\t\000addsd\t\000addss\t\000addsubpd\t\000addsubps\t\000fadd\t\000"
    "fiadd\t\000faddp\t\000#ADJCALLSTACKDOWN\000#ADJCALLSTACKUP\000aesdeclas"
    "t\t\000aesdec\t\000aesenclast\t\000aesenc\t\000aesimc\t\000aeskeygenass"
    "ist\t\000and\tAX, \000and\t\000and\tEAX, \000and\tRAX, \000and\tAL, \000"
    "andn\t\000andnpd\t\000andnps\t\000andpd\t\000andps\t\000arpl\t\000#ATOM"
    "ADD6432 PSEUDO!\000#ATOMAND16 PSEUDO!\000#ATOMAND32 PSEUDO!\000#ATOMAND"
    "64 PSEUDO!\000#ATOMAND6432 PSEUDO!\000#ATOMAND8 PSEUDO!\000#ATOMMAX16 P"
    "SEUDO!\000#ATOMMAX32 PSEUDO!\000#ATOMMAX64 PSEUDO!\000#ATOMMIN16 PSEUDO"
    "!\000#ATOMMIN32 PSEUDO!\000#ATOMMIN64 PSEUDO!\000#ATOMNAND16 PSEUDO!\000"
    "#ATOMNAND32 PSEUDO!\000#ATOMNAND64 PSEUDO!\000#ATOMNAND6432 PSEUDO!\000"
    "#ATOMNAND8 PSEUDO!\000#ATOMOR16 PSEUDO!\000#ATOMOR32 PSEUDO!\000#ATOMOR"
    "64 PSEUDO!\000#ATOMOR6432 PSEUDO!\000#ATOMOR8 PSEUDO!\000#ATOMSUB6432 P"
    "SEUDO!\000#ATOMSWAP6432 PSEUDO!\000#ATOMUMAX16 PSEUDO!\000#ATOMUMAX32 P"
    "SEUDO!\000#ATOMUMAX64 PSEUDO!\000#ATOMUMIN16 PSEUDO!\000#ATOMUMIN32 PSE"
    "UDO!\000#ATOMUMIN64 PSEUDO!\000#ATOMXOR16 PSEUDO!\000#ATOMXOR32 PSEUDO!"
    "\000#ATOMXOR64 PSEUDO!\000#ATOMXOR6432 PSEUDO!\000#ATOMXOR8 PSEUDO!\000"
    "blendpd\t\000blendps\t\000blendvpd\t\000blendvps\t\000bound\t\000bsf\t\000"
    "bsr\t\000bswap\t\000bt\t\000btc\t\000btr\t\000bts\t\000call\t\000callw\t"
    "\000cbw\000cdq\000cdqe\000fchs\000clc\000cld\000clflush\t\000cli\000clt"
    "s\000cmc\000cmova\t\000cmovae\t\000cmovb\t\000cmovbe\t\000fcmovbe\t%ST("
    "0), \000fcmovb\t%ST(0), \000cmove\t\000fcmove\t%ST(0), \000cmovg\t\000c"
    "movge\t\000cmovl\t\000cmovle\t\000fcmovnbe\t%ST(0), \000fcmovnb\t%ST(0)"
    ", \000cmovne\t\000fcmovne\t%ST(0), \000cmovno\t\000cmovnp\t\000fcmovnu\t"
    "%ST(0), \000cmovns\t\000cmovo\t\000cmovp\t\000fcmovu\t %ST(0), \000cmov"
    "s\t\000#CMOV_FR32 PSEUDO!\000#CMOV_FR64 PSEUDO!\000#CMOV_GR16* PSEUDO!\000"
    "#CMOV_GR32* PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMOV_RFP32 PSEUDO!\000#CMO"
    "V_RFP64 PSEUDO!\000#CMOV_RFP80 PSEUDO!\000#CMOV_V2F64 PSEUDO!\000#CMOV_"
    "V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000#CMOV_V4F64 PSEUDO!\000#CMOV_V4"
    "I64 PSEUDO!\000#CMOV_V8F32 PSEUDO!\000cmp\tAX, \000cmp\t\000cmp\tEAX, \000"
    "cmp\tRAX, \000cmp\tAL, \000cmp\000cmppd\t\000cmpps\t\000cmpsw\000cmpsd\000"
    "cmpsq\000cmpsb\000cmpsd\t\000cmpss\t\000cmpxchg16b\t\000cmpxchg\t\000cm"
    "pxchg8b\t\000comisd\t\000comiss\t\000fcomp\t\000fcompi\t\000fcomi\t\000"
    "fcom\t\000fcos\000cpuid\000cqo\000crc32 \t\000cs\000cvtdq2pd\t\000cvtdq"
    "2ps\t\000cvtpd2dq\t\000cvtpd2ps\t\000cvtps2dq\t\000cvtps2pd\t\000cvtsd2"
    "si\t\000cvtsd2ss\t\000cvtsi2sd\t\000cvtsi2ss\t\000cvtss2sd\t\000cvtss2s"
    "i\t\000cvttpd2dq\t\000cvttps2dq\t\000cvttsd2si\t\000cvttss2si\t\000cwd\000"
    "cwde\000daa\000das\000data16\000dec\t\000div\t\000divpd\t\000divps\t\000"
    "fdivr\t\000fidivr\t\000fdivrp\t\000divsd\t\000divss\t\000fdiv\t\000fidi"
    "v\t\000fdivp\t\000dppd\t\000dpps\t\000ds\000ret\t#eh_return, addr: \000"
    "enter\t\000es\000extractps\t\000f2xm1\000lcall\t\000ljmp\t\000fbld\t\000"
    "fbstp\t\000fcompp\000fdecstp\000femms\000ffree\t\000ficom\t\000ficomp\t"
    "\000fincstp\000fldcw\t\000fldenv\t\000fldl2e\000fldl2t\000fldlg2\000fld"
    "ln2\000fldpi\000fnclex\000fninit\000fnop\000fnstcw\t\000fnstsw %ax\000f"
    "nstsw\t\000fpatan\000fprem\000fprem1\000fptan\000frndint\000frstor\t\000"
    "fnsave\t\000fscale\000fsincos\000fnstenv\t\000fs\000fxam\000fxrstor\t\000"
    "fxrstorq\t\000fxsave\t\000fxsaveq\t\000fxtract\000fyl2x\000fyl2xp1\000m"
    "ovapd\t\000movaps\t\000orpd\t\000orps\t\000vmovapd\t\000vmovaps\t\000xo"
    "rpd\t\000xorps\t\000gs\000haddpd\t\000haddps\t\000hlt\000hsubpd\t\000hs"
    "ubps\t\000idiv\t\000fild\t\000imul\t\000ins\000in\tAX, \000in\tAX, DX\000"
    "in\tEAX, \000in\tEAX, DX\000in\tAL, \000in\tAL, DX\000inc\t\000insertps"
    "\t\000int\t\000int3\000into\000invd\000invept \000invlpg\t\000invvpid \000"
    "iretw\000iretd\000iretq\000fisttp\t\000fist\t\000fistp\t\000#MEMBARRIER"
    "\000lock\n\tor\t(%rsp), \000ucomisd\t\000ucomiss\t\000vcmp\000vcomisd\t"
    "\000vcomiss\t\000vcvtdq2pd\t\000vcvtdq2ps\t\000vcvtpd2dq\t\000vcvtpd2ps"
    "\t\000vcvtps2dq\t\000vcvtps2pd\t\000vcvtsd2si\t\000vcvtsd2ss\t\000vcvts"
    "i2sd\t\000vcvtsi2ss\t\000vcvtss2sd\t\000vcvttps2dq\t\000vcvttsd2si\t\000"
    "vcvttss2si\t\000vucomisd\t\000vucomiss\t\000jae\t\000ja\t\000jbe\t\000j"
    "b\t\000jcxz\t\000jecxz\t\000je\t\000jge\t\000jg\t\000jle\t\000jl\t\000j"
    "mp\t\000jne\t\000jno\t\000jnp\t\000jns\t\000jo\t\000jp\t\000jrcxz\t\000"
    "js\t\000lahf\000lar\t\000lock\n\tcmpxchg\t\000lock\n\tcmpxchg16b\t\000l"
    "ock\n\tcmpxchg8b\t\000lddqu\t\000ldmxcsr\t\000lds\t\000fldz\000fld1\000"
    "fld\t\000lea\t\000leave\000les\t\000lfence\000lfs\t\000lgdtw\t\000lgdt\t"
    "\000lgs\t\000lidtw\t\000lidt\t\000lldt\t\000lmsw\t\000lock\n\tadd\t\000"
    "lock\n\tand\t\000lock\n\tdec\t\000lock\n\tinc\t\000lock\n\tor\t\000lock"
    "\000lock\n\tsub\t\000lock\n\txor\t\000lodsb\000lodsd\000lodsq\000lodsw\000"
    "loop\t\000loope\t\000loopne\t\000lret\t\000lretw\t\000lretl\000lretq\000"
    "lsl\t\000lss\t\000ltr\t\000lock\n\txadd\t\000lzcnt\t\000maskmovdqu\t\000"
    "maxpd\t\000maxps\t\000maxsd\t\000maxss\t\000mfence\000minpd\t\000minps\t"
    "\000minsd\t\000minss\t\000cvtpd2pi\t\000cvtpi2pd\t\000cvtpi2ps\t\000cvt"
    "ps2pi\t\000cvttpd2pi\t\000cvttps2pi\t\000emms\000maskmovq\t\000movd\t\000"
    "movdq2q\t\000movntq\t\000movq2dq\t\000movq\t\000pabsb\t\000pabsd\t\000p"
    "absw\t\000packssdw\t\000packsswb\t\000packuswb\t\000paddb\t\000paddd\t\000"
    "paddq\t\000paddsb\t\000paddsw\t\000paddusb\t\000paddusw\t\000paddw\t\000"
    "palignr\t\000pandn\t\000pand\t\000pavgb\t\000pavgw\t\000pcmpeqb\t\000pc"
    "mpeqd\t\000pcmpeqw\t\000pcmpgtb\t\000pcmpgtd\t\000pcmpgtw\t\000pextrw\t"
    "\000phaddsw\t\000phaddw\t\000phaddd\t\000phsubd\t\000phsubsw\t\000phsub"
    "w\t\000pinsrw\t\000pmaddubsw\t\000pmaddwd\t\000pmaxsw\t\000pmaxub\t\000"
    "pminsw\t\000pminub\t\000pmovmskb\t\000pmulhrsw\t\000pmulhuw\t\000pmulhw"
    "\t\000pmullw\t\000pmuludq\t\000por\t\000psadbw\t\000pshufb\t\000pshufw\t"
    "\000psignb\t\000psignd\t\000psignw\t\000pslld\t\000psllq\t\000psllw\t\000"
    "psrad\t\000psraw\t\000psrld\t\000psrlq\t\000psrlw\t\000psubb\t\000psubd"
    "\t\000psubq\t\000psubsb\t\000psubsw\t\000psubusb\t\000psubusw\t\000psub"
    "w\t\000punpckhbw\t\000punpckhdq\t\000punpckhwd\t\000punpcklbw\t\000punp"
    "ckldq\t\000punpcklwd\t\000pxor\t\000monitor\000montmul\000mov\t\000mov\t"
    "AL, \000mov\tEAX, \000movabs\t\000movbe\t\000movddup\t\000movdqa\t\000m"
    "ovdqu\t\000movhlps\t\000movhpd\t\000movhps\t\000movlhps\t\000movlpd\t\000"
    "movlps\t\000movmskpd\t\000movmskps\t\000movntdqa\t\000movntdq\t\000movn"
    "ti\t\000movntpd\t\000movntps\t\000movsb\000movsd\000movsd\t\000movshdup"
    "\t\000movsldup\t\000movsq\000movss\t\000movsw\000movsx\t\000movsxd\t\000"
    "movupd\t\000movups\t\000movzx\t\000mpsadbw\t\000mul\t\000mulpd\t\000mul"
    "ps\t\000mulsd\t\000mulss\t\000fmul\t\000fimul\t\000fmulp\t\000mwait\000"
    "neg\t\000nop\000nop\t\000not\t\000or\tAX, \000or\t\000or\tEAX, \000or\t"
    "RAX, \000or\tAL, \000out\t\000out\tDX, AX\000out\tDX, EAX\000out\tDX, A"
    "L\000outsb\000outsd\000outsw\000packusdw\t\000pause\000pavgusb\t\000pbl"
    "endvb\t\000pblendw\t\000pclmulqdq\t\000pcmpeqq\t\000pcmpestri\t\000pcmp"
    "estrm\t\000pcmpgtq\t\000pcmpistri\t\000pcmpistrm\t\000pextrb\t\000pextr"
    "d\t\000pextrq\t\000pf2id\t\000pf2iw\t\000pfacc\t\000pfadd\t\000pfcmpeq\t"
    "\000pfcmpge\t\000pfcmpgt\t\000pfmax\t\000pfmin\t\000pfmul\t\000pfnacc\t"
    "\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000pfrcp\t\000pfrsqit1\t\000p"
    "frsqrt\t\000pfsubr\t\000pfsub\t\000phminposuw\t\000pi2fd\t\000pi2fw\t\000"
    "pinsrb\t\000pinsrd\t\000pinsrq\t\000pmaxsb\t\000pmaxsd\t\000pmaxud\t\000"
    "pmaxuw\t\000pminsb\t\000pminsd\t\000pminud\t\000pminuw\t\000pmovsxbd\t\000"
    "pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000pmovsxwd\t\000pmovsxwq\t\000p"
    "movzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000pmovzxdq\t\000pmovzxwd\t\000pm"
    "ovzxwq\t\000pmuldq\t\000pmulhrw\t\000pmulld\t\000pop\t\000popa\000popcn"
    "t\t\000pop\tDS\000pop\tES\000popf\000popfd\000popfq\000pop\tFS\000pop\t"
    "GS\000pop\tSS\000prefetch \000prefetchnta\t\000prefetcht0\t\000prefetch"
    "t1\t\000prefetcht2\t\000prefetchw \000pshufd\t\000pshufhw\t\000pshuflw\t"
    "\000pslldq\t\000psrldq\t\000pswapd\t\000ptest \t\000punpckhqdq\t\000pun"
    "pcklqdq\t\000push\t\000pusha\000push\tCS\000push\tDS\000push\tES\000pus"
    "hf\000pushfd\000pushfq\000push\tFS\000push\tGS\000push\tSS\000rcl\t\000"
    "rcpps\t\000rcpss\t\000rcr\t\000rdfsbase\t\000rdgsbase\t\000rdmsr\000rdp"
    "mc\000rdrand\t\000rdtsc\000rdtscp\000#RELEASE_MOV PSEUDO!\000repne\000r"
    "ep movsb\000rep movsd\000rep movsq\000rep movsw\000rep\000rep stosb\000"
    "rep stosd\000rep stosq\000rep stosw\000ret\000ret\t\000retw\t\000rex64\000"
    "rol\t\000ror\t\000roundpd\t\000roundps\t\000roundsd\t\000roundss\t\000r"
    "sm\000rsqrtps\t\000rsqrtss\t\000sahf\000sar\t\000sbb\tAX, \000sbb\t\000"
    "sbb\tEAX, \000sbb\tRAX, \000sbb\tAL, \000scasw\000scasd\000scasq\000sca"
    "sb\000# variable sized alloca for segmented stacks\000setae\t\000seta\t"
    "\000setbe\t\000setb\t\000sete\t\000setge\t\000setg\t\000setle\t\000setl"
    "\t\000setne\t\000setno\t\000setnp\t\000setns\t\000seto\t\000setp\t\000s"
    "ets\t\000sfence\000sgdtw\t\000sgdt\t\000shl\t\000shld\t\000shr\t\000shr"
    "d\t\000shufpd\t\000shufps\t\000sidtw\t\000sidt\t\000fsin\000sldt\t\000s"
    "msw\t\000sqrtpd\t\000sqrtps\t\000sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000"
    "stc\000std\000sti\000stmxcsr\t\000stosb\000stosd\000stosq\000stosw\000s"
    "tr\t\000fst\t\000fstp\t\000sub\tAX, \000sub\t\000sub\tEAX, \000sub\tRAX"
    ", \000sub\tAL, \000subpd\t\000subps\t\000fsubr\t\000fisubr\t\000fsubrp\t"
    "\000subsd\t\000subss\t\000fsub\t\000fisub\t\000fsubp\t\000swapgs\000sys"
    "call\000sysenter\000sysexit\000sysretl\000sysretq\000test\tAX, \000test"
    "\t\000test\tEAX, \000test\tRAX, \000test\tAL, \000# TLSCall_32\000# TLS"
    "Call_64\000# TLS_addr32\000# TLS_addr64\000ud2\000ftst\000tzcnt\t\000fu"
    "compi\t\000fucomi\t\000fucompp\000fucomp\t\000fucom\t\000ud2b\000unpckh"
    "pd\t\000unpckhps\t\000unpcklpd\t\000unpcklps\t\000#VAARG_64 \000vaddpd\t"
    "\000vaddps\t\000vaddsd\t\000vaddss\t\000vaddsubpd\t\000vaddsubps\t\000v"
    "aesdeclast\t\000vaesdec\t\000vaesenclast\t\000vaesenc\t\000vaesimc\t\000"
    "vaeskeygenassist\t\000vandnpd\t\000vandnps\t\000vandpd\t\000vandps\t\000"
    "#VASTART_SAVE_XMM_REGS \000vblendpd\t\000vblendps\t\000vblendvpd\t\000v"
    "blendvps\t\000vbroadcastf128\t\000vbroadcastsd\t\000vbroadcastss\t\000v"
    "cmppd\t\000vcmpps\t\000vcmpsd\t\000vcmpss\t\000vcvtpd2dqx\t\000vcvtpd2d"
    "qy\t\000vcvtpd2psx\t\000vcvtpd2psy\t\000vcvtph2ps\t\000vcvtps2ph\t\000v"
    "cvtss2si\t\000vcvttpd2dq\t\000vcvttpd2dqx\t\000vcvttpd2dqy\t\000vdivpd\t"
    "\000vdivps\t\000vdivsd\t\000vdivss\t\000vdppd\t\000vdpps\t\000verr\t\000"
    "verw\t\000vextractf128\t\000vextractps\t\000vextractps \t\000vfmadd132p"
    "d\t\000vfmadd213pd\t\000vfmadd231pd\t\000vfmadd132ps\t\000vfmadd213ps\t"
    "\000vfmadd231ps\t\000vfmaddsub132pd\t\000vfmaddsub213pd\t\000vfmaddsub2"
    "31pd\t\000vfmaddsub132ps\t\000vfmaddsub213ps\t\000vfmaddsub231ps\t\000v"
    "fmsubadd132pd\t\000vfmsubadd213pd\t\000vfmsubadd231pd\t\000vfmsubadd132"
    "ps\t\000vfmsubadd213ps\t\000vfmsubadd231ps\t\000vfmsub132pd\t\000vfmsub"
    "213pd\t\000vfmsub231pd\t\000vfmsub132ps\t\000vfmsub213ps\t\000vfmsub231"
    "ps\t\000vfnmadd132pd\t\000vfnmadd213pd\t\000vfnmadd231pd\t\000vfnmadd13"
    "2ps\t\000vfnmadd213ps\t\000vfnmadd231ps\t\000vfnmsub132pd\t\000vfnmsub2"
    "13pd\t\000vfnmsub231pd\t\000vfnmsub132ps\t\000vfnmsub213ps\t\000vfnmsub"
    "231ps\t\000vorpd\t\000vorps\t\000vxorpd\t\000vxorps\t\000vhaddpd\t\000v"
    "haddps\t\000vhsubpd\t\000vhsubps\t\000vinsertf128\t\000vinsertps\t\000v"
    "lddqu\t\000vldmxcsr\t\000vmaskmovdqu\t\000vmaskmovpd\t\000vmaskmovps\t\000"
    "vmaxpd\t\000vmaxps\t\000vmaxsd\t\000vmaxss\t\000vmcall\000vmclear\t\000"
    "vminpd\t\000vminps\t\000vminsd\t\000vminss\t\000vmlaunch\000vmovq\t\000"
    "vmovddup\t\000vmovd\t\000vmovdqa\t\000vmovdqu\t\000vmovhlps\t\000vmovhp"
    "d\t\000vmovhps\t\000vmovlhps\t\000vmovlpd\t\000vmovlps\t\000vmovmskpd\t"
    "\000vmovmskps\t\000vmovntdqa\t\000vmovntdq\t\000vmovntpd\t\000vmovntps\t"
    "\000vmovsd\t\000vmovshdup\t\000vmovsldup\t\000vmovss\t\000vmovupd\t\000"
    "vmovups\t\000vmpsadbw\t\000vmptrld\t\000vmptrst\t\000vmread\t\000vmresu"
    "me\000vmulpd\t\000vmulps\t\000vmulsd\t\000vmulss\t\000vmwrite\t\000vmxo"
    "ff\000vmxon\t\000vpabsb\t\000vpabsd\t\000vpabsw\t\000vpackssdw\t\000vpa"
    "cksswb\t\000vpackusdw\t\000vpackuswb\t\000vpaddb\t\000vpaddd\t\000vpadd"
    "q\t\000vpaddsb\t\000vpaddsw\t\000vpaddusb\t\000vpaddusw\t\000vpaddw\t\000"
    "vpalignr\t\000vpandn\t\000vpand\t\000vpavgb\t\000vpavgw\t\000vpblendvb\t"
    "\000vpblendw\t\000vpclmulqdq\t\000vpcmpeqb\t\000vpcmpeqd\t\000vpcmpeqq\t"
    "\000vpcmpeqw\t\000vpcmpestri\t\000vpcmpestrm\t\000vpcmpgtb\t\000vpcmpgt"
    "d\t\000vpcmpgtq\t\000vpcmpgtw\t\000vpcmpistri\t\000vpcmpistrm\t\000vper"
    "m2f128\t\000vpermilpd\t\000vpermilps\t\000vpextrb\t\000vpextrd\t\000vpe"
    "xtrq\t\000vpextrw\t\000vphaddd\t\000vphaddsw\t\000vphaddw\t\000vphminpo"
    "suw\t\000vphsubd\t\000vphsubsw\t\000vphsubw\t\000vpinsrb\t\000vpinsrd\t"
    "\000vpinsrq\t\000vpinsrw\t\000vpmaddubsw\t\000vpmaddwd\t\000vpmaxsb\t\000"
    "vpmaxsd\t\000vpmaxsw\t\000vpmaxub\t\000vpmaxud\t\000vpmaxuw\t\000vpmins"
    "b\t\000vpminsd\t\000vpminsw\t\000vpminub\t\000vpminud\t\000vpminuw\t\000"
    "vpmovmskb\t\000vpmovsxbd\t\000vpmovsxbq\t\000vpmovsxbw\t\000vpmovsxdq\t"
    "\000vpmovsxwd\t\000vpmovsxwq\t\000vpmovzxbd\t\000vpmovzxbq\t\000vpmovzx"
    "bw\t\000vpmovzxdq\t\000vpmovzxwd\t\000vpmovzxwq\t\000vpmuldq\t\000vpmul"
    "hrsw\t\000vpmulhuw\t\000vpmulhw\t\000vpmulld\t\000vpmullw\t\000vpmuludq"
    "\t\000vpor\t\000vpsadbw\t\000vpshufb\t\000vpshufd\t\000vpshufhw\t\000vp"
    "shuflw\t\000vpsignb\t\000vpsignd\t\000vpsignw\t\000vpslldq\t\000vpslld\t"
    "\000vpsllq\t\000vpsllw\t\000vpsrad\t\000vpsraw\t\000vpsrldq\t\000vpsrld"
    "\t\000vpsrlq\t\000vpsrlw\t\000vpsubb\t\000vpsubd\t\000vpsubq\t\000vpsub"
    "sb\t\000vpsubsw\t\000vpsubusb\t\000vpsubusw\t\000vpsubw\t\000vptest\t\000"
    "vpunpckhbw\t\000vpunpckhdq\t\000vpunpckhqdq\t\000vpunpckhwd\t\000vpunpc"
    "klbw\t\000vpunpckldq\t\000vpunpcklqdq\t\000vpunpcklwd\t\000vpxor\t\000v"
    "rcpps\t\000vrcpss\t\000vroundpd\t\000vroundps\t\000vroundsd\t\000vround"
    "ss\t\000vrsqrtps\t\000vrsqrtss\t\000vshufpd\t\000vshufps\t\000vsqrtpd\t"
    "\000vsqrtps\t\000vsqrtsd\t\000vsqrtss\t\000vstmxcsr\t\000vsubpd\t\000vs"
    "ubps\t\000vsubsd\t\000vsubss\t\000vtestpd\t\000vtestps\t\000vunpckhpd\t"
    "\000vunpckhps\t\000vunpcklpd\t\000vunpcklps\t\000vzeroall\000vzeroupper"
    "\000wait\000wbinvd\000# dynamic stack allocation\000wrfsbase\t\000wrgsb"
    "ase\t\000wrmsr\000xadd\t\000xchg\tAX, \000xchg\t\000xchg\tEAX, \000xchg"
    "\tRAX, \000fxch\t\000xcryptcbc\000xcryptcfb\000xcryptctr\000xcryptecb\000"
    "xcryptofb\000xgetbv\000xlatb\000xor\tAX, \000xor\t\000xor\tEAX, \000xor"
    "\tRAX, \000xor\tAL, \000xrstor\t\000xrstorq\t\000xsave\t\000xsaveq\t\000"
    "xsaveopt\t\000xsaveoptq\t\000xsetbv\000xsha1\000xsha256\000xstore\000";

  O << "\t";

  // Emit the opcode for the instruction.
  unsigned Bits = OpInfo[MI->getOpcode()];
  assert(Bits != 0 && "Cannot print this instruction.");
  O << AsmStrs+(Bits & 16383)-1;


  // Fragment 0 encoded into 5 bits for 24 unique commands.
  switch ((Bits >> 27) & 31) {
  default:   // unreachable.
  case 0:
    // DBG_VALUE, AAA, AAS, ABS_F, ACQUIRE_MOV16rm, ACQUIRE_MOV32rm, ACQUIRE_...
    return;
    break;
  case 1:
    // AAD8i8, AAM8i8, ADC16i16, ADC16rr_REV, ADC32i32, ADC32rr_REV, ADC64i32...
    printOperand(MI, 0, O); 
    break;
  case 2:
    // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, ADD_FI16m, AND...
    printi16mem(MI, 0, O); 
    break;
  case 3:
    // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32...
    printOperand(MI, 1, O); 
    O << ", "; 
    break;
  case 4:
    // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, ADD_FI32m, AND...
    printi32mem(MI, 0, O); 
    break;
  case 5:
    // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,...
    printi64mem(MI, 0, O); 
    break;
  case 6:
    // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CLFLUSH, CMP8mi, CMP8m...
    printi8mem(MI, 0, O); 
    break;
  case 7:
    // ADD_F32m, DIVR_F32m, DIV_F32m, EXTRACTPSmr, FBLDm, FBSTPm, FCOM32m, FC...
    printf32mem(MI, 0, O); 
    break;
  case 8:
    // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MOVHPDmr, M...
    printf64mem(MI, 0, O); 
    break;
  case 9:
    // ARPL16mr
    printi16mem(MI, 1, O); 
    O << ", "; 
    printOperand(MI, 0, O); 
    return;
    break;
  case 10:
    // CALL64pcrel32, CALLpcrel16, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE...
    print_pcrel_imm(MI, 0, O); 
    break;
  case 11:
    // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VC...
    printSSECC(MI, 7, O); 
    break;
  case 12:
    // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC...
    printSSECC(MI, 3, O); 
    break;
  case 13:
    // CMPXCHG16B, LCMPXCHG16B, MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, VMOVDQAmr, ...
    printi128mem(MI, 0, O); 
    break;
  case 14:
    // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR...
    printopaquemem(MI, 0, O); 
    return;
    break;
  case 15:
    // LD_F80m, ST_FP80m
    printf80mem(MI, 0, O); 
    return;
    break;
  case 16:
    // LXADD16, XCHG16rm
    printi16mem(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 1, O); 
    return;
    break;
  case 17:
    // LXADD32, XCHG32rm
    printi32mem(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 1, O); 
    return;
    break;
  case 18:
    // LXADD64, XCHG64rm
    printi64mem(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 1, O); 
    return;
    break;
  case 19:
    // LXADD8, XCHG8rm
    printi8mem(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 1, O); 
    return;
    break;
  case 20:
    // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTPDmr, MOVNTPSmr, MOV...
    printf128mem(MI, 0, O); 
    O << ", "; 
    printOperand(MI, 5, O); 
    break;
  case 21:
    // VMASKMOVPDYmr, VMASKMOVPSYmr, VMOVAPDYmr, VMOVAPSYmr, VMOVNTDQY_64mr, ...
    printf256mem(MI, 0, O); 
    O << ", "; 
    printOperand(MI, 5, O); 
    break;
  case 22:
    // VMOVDQAYmr, VMOVDQUYmr
    printi256mem(MI, 0, O); 
    O << ", "; 
    printOperand(MI, 5, O); 
    return;
    break;
  case 23:
    // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr
    printOperand(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 1, O); 
    return;
    break;
  }


  // Fragment 1 encoded into 5 bits for 19 unique commands.
  switch ((Bits >> 22) & 31) {
  default:   // unreachable.
  case 0:
    // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i...
    return;
    break;
  case 1:
    // ADC16mi, ADC16mi8, ADC16mr, ADC16rr_REV, ADC32mi, ADC32mi8, ADC32mr, A...
    O << ", "; 
    break;
  case 2:
    // ADC16ri, ADC16ri8, ADC16rr, ADC32ri, ADC32ri8, ADC32rr, ADC64ri32, ADC...
    printOperand(MI, 2, O); 
    return;
    break;
  case 3:
    // ADC16rm, ADD16rm, AND16rm, CRC32r32m16, OR16rm, SBB16rm, SUB16rm, XOR1...
    printi16mem(MI, 2, O); 
    return;
    break;
  case 4:
    // ADC32rm, ADD32rm, AND32rm, CRC32r32m32, OR32rm, SBB32rm, SUB32rm, XOR3...
    printi32mem(MI, 2, O); 
    return;
    break;
  case 5:
    // ADC64rm, ADD64rm, AND64rm, CRC32r64m64, OR64rm, SBB64rm, SUB64rm, XOR6...
    printi64mem(MI, 2, O); 
    return;
    break;
  case 6:
    // ADC8rm, ADD8rm, AND8rm, CRC32r32m8, CRC32r64m8, OR8rm, SBB8rm, SUB8rm,...
    printi8mem(MI, 2, O); 
    return;
    break;
  case 7:
    // ADD_FrST0, DIVR_FrST0, DIV_FrST0, MUL_FrST0, SUBR_FrST0, SUB_FrST0
    O << ", %ST(0)"; 
    return;
    break;
  case 8:
    // ARPL16rr
    printOperand(MI, 0, O); 
    return;
    break;
  case 9:
    // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDrmi, VCMPPDrri
    O << "pd\t"; 
    printOperand(MI, 0, O); 
    O << ", "; 
    break;
  case 10:
    // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSrmi, VCMPPSrri
    O << "ps\t"; 
    printOperand(MI, 0, O); 
    O << ", "; 
    break;
  case 11:
    // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr...
    O << "sd\t"; 
    printOperand(MI, 0, O); 
    O << ", "; 
    break;
  case 12:
    // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr...
    O << "ss\t"; 
    printOperand(MI, 0, O); 
    O << ", "; 
    break;
  case 13:
    // MOV16ao16, MOV8ao8, OUT8ir
    O << ", AL"; 
    return;
    break;
  case 14:
    // MOV32ao32, OUT32ir
    O << ", EAX"; 
    return;
    break;
  case 15:
    // OUT16ir
    O << ", AX"; 
    return;
    break;
  case 16:
    // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R...
    O << ", CL"; 
    return;
    break;
  case 17:
    // ROL64mCL, ROL64rCL, ROR64mCL, ROR64rCL, SAR64mCL, SAR64rCL, SHL64mCL, ...
    O << ", %CL"; 
    return;
    break;
  case 18:
    // TAILJMPd, TAILJMPd64, TAILJMPm, TAILJMPm64, TAILJMPr64
    O << "  # TAILCALL"; 
    return;
    break;
  }


  // Fragment 2 encoded into 5 bits for 23 unique commands.
  switch ((Bits >> 17) & 31) {
  default:   // unreachable.
  case 0:
    // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
    printOperand(MI, 5, O); 
    break;
  case 1:
    // ADC16rr_REV, ADC32rr_REV, ADC64rr_REV, ADC8rr_REV, ADD16rr_REV, ADD32r...
    printOperand(MI, 2, O); 
    break;
  case 2:
    // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,...
    printf128mem(MI, 2, O); 
    break;
  case 3:
    // ADDSDrm, ADDSDrm_Int, CMPSDrm, CMPSDrm_alt, DIVSDrm, DIVSDrm_Int, Int_...
    printf64mem(MI, 2, O); 
    break;
  case 4:
    // ADDSSrm, ADDSSrm_Int, CMPSSrm, CMPSSrm_alt, DIVSSrm, DIVSSrm_Int, INSE...
    printf32mem(MI, 2, O); 
    break;
  case 5:
    // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, BLENDPDrmi, BLENDPSrmi...
    printi128mem(MI, 2, O); 
    break;
  case 6:
    // AESIMCrm, AESKEYGENASSIST128rm, CVTDQ2PSrm, INVEPT32, INVEPT64, INVVPI...
    printi128mem(MI, 1, O); 
    break;
  case 7:
    // AESIMCrr, AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr...
    printOperand(MI, 1, O); 
    break;
  case 8:
    // BOUNDS16rm, BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, LAR16rm,...
    printi16mem(MI, 1, O); 
    break;
  case 9:
    // BOUNDS32rm, BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, IMUL32r...
    printi32mem(MI, 1, O); 
    break;
  case 10:
    // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, IMUL64rmi32, IM...
    printi64mem(MI, 1, O); 
    break;
  case 11:
    // CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16rm, CMOVE16rm, CMOVG16rm, CM...
    printi16mem(MI, 2, O); 
    break;
  case 12:
    // CMOVA32rm, CMOVAE32rm, CMOVB32rm, CMOVBE32rm, CMOVE32rm, CMOVG32rm, CM...
    printi32mem(MI, 2, O); 
    break;
  case 13:
    // CMOVA64rm, CMOVAE64rm, CMOVB64rm, CMOVBE64rm, CMOVE64rm, CMOVG64rm, CM...
    printi64mem(MI, 2, O); 
    break;
  case 14:
    // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32rm8, MOVSX64rm8, MOVZ...
    printi8mem(MI, 1, O); 
    break;
  case 15:
    // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CV...
    printf128mem(MI, 1, O); 
    break;
  case 16:
    // CVTPS2PDrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_CVTPS2PDrm, In...
    printf64mem(MI, 1, O); 
    return;
    break;
  case 17:
    // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_...
    printf32mem(MI, 1, O); 
    break;
  case 18:
    // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm...
    printopaquemem(MI, 1, O); 
    return;
    break;
  case 19:
    // PINSRBrm
    printi8mem(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 7, O); 
    return;
    break;
  case 20:
    // VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQAYrm, VMOVDQUYrm, VPTESTYrm
    printi256mem(MI, 1, O); 
    return;
    break;
  case 21:
    // VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPS2DQYrm, VCVTTPD2DQYrm, VCVTTPS2DQYrm...
    printf256mem(MI, 1, O); 
    break;
  case 22:
    // VCVTPS2PHYmr, VEXTRACTF128mr, VMASKMOVPDYmr, VMASKMOVPDmr, VMASKMOVPSY...
    printOperand(MI, 6, O); 
    return;
    break;
  }


  // Fragment 3 encoded into 3 bits for 5 unique commands.
  switch ((Bits >> 14) & 7) {
  default:   // unreachable.
  case 0:
    // ADC16mi, ADC16mi8, ADC16mr, ADC16rr_REV, ADC32mi, ADC32mi8, ADC32mr, A...
    return;
    break;
  case 1:
    // AESKEYGENASSIST128rm, AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr, ANDN64...
    O << ", "; 
    break;
  case 2:
    // MOV8mr_NOREX, MOV8rm_NOREX, MOV8rr_NOREX
    O << "  # NOREX"; 
    return;
    break;
  case 3:
    // SHLD16mrCL, SHLD16rrCL, SHLD32mrCL, SHLD32rrCL, SHRD16mrCL, SHRD16rrCL...
    O << ", CL"; 
    return;
    break;
  case 4:
    // SHLD64mrCL, SHLD64rrCL, SHRD64mrCL, SHRD64rrCL
    O << ", %CL"; 
    return;
    break;
  }

  switch (MI->getOpcode()) {
  case X86::AESKEYGENASSIST128rm:
  case X86::AESKEYGENASSIST128rr:
  case X86::ANDN32rm:
  case X86::ANDN32rr:
  case X86::ANDN64rm:
  case X86::ANDN64rr:
  case X86::BLENDPDrmi:
  case X86::BLENDPDrri:
  case X86::BLENDPSrmi:
  case X86::BLENDPSrri:
  case X86::CMPPDrmi_alt:
  case X86::CMPPDrri_alt:
  case X86::CMPPSrmi_alt:
  case X86::CMPPSrri_alt:
  case X86::CMPSDrm_alt:
  case X86::CMPSDrr_alt:
  case X86::CMPSSrm_alt:
  case X86::CMPSSrr_alt:
  case X86::DPPDrmi:
  case X86::DPPDrri:
  case X86::DPPSrmi:
  case X86::DPPSrri:
  case X86::EXTRACTPSmr:
  case X86::EXTRACTPSrr:
  case X86::IMUL16rmi:
  case X86::IMUL16rmi8:
  case X86::IMUL16rri:
  case X86::IMUL16rri8:
  case X86::IMUL32rmi:
  case X86::IMUL32rmi8:
  case X86::IMUL32rri:
  case X86::IMUL32rri8:
  case X86::IMUL64rmi32:
  case X86::IMUL64rmi8:
  case X86::IMUL64rri32:
  case X86::IMUL64rri8:
  case X86::INSERTPSrm:
  case X86::INSERTPSrr:
  case X86::Int_VCMPSDrm:
  case X86::Int_VCMPSDrr:
  case X86::Int_VCMPSSrm:
  case X86::Int_VCMPSSrr:
  case X86::Int_VCVTSD2SSrm:
  case X86::Int_VCVTSD2SSrr:
  case X86::Int_VCVTSI2SD64rm:
  case X86::Int_VCVTSI2SD64rr:
  case X86::Int_VCVTSI2SDrm:
  case X86::Int_VCVTSI2SDrr:
  case X86::Int_VCVTSI2SS64rm:
  case X86::Int_VCVTSI2SS64rr:
  case X86::Int_VCVTSI2SSrm:
  case X86::Int_VCVTSI2SSrr:
  case X86::Int_VCVTSS2SDrm:
  case X86::Int_VCVTSS2SDrr:
  case X86::MMX_PALIGNR64irm:
  case X86::MMX_PALIGNR64irr:
  case X86::MMX_PEXTRWirri:
  case X86::MMX_PINSRWirmi:
  case X86::MMX_PINSRWirri:
  case X86::MMX_PSHUFWmi:
  case X86::MMX_PSHUFWri:
  case X86::MPSADBWrmi:
  case X86::MPSADBWrri:
  case X86::PALIGNR128rm:
  case X86::PALIGNR128rr:
  case X86::PBLENDWrmi:
  case X86::PBLENDWrri:
  case X86::PCLMULQDQrm:
  case X86::PCLMULQDQrr:
  case X86::PCMPESTRIArm:
  case X86::PCMPESTRIArr:
  case X86::PCMPESTRICrm:
  case X86::PCMPESTRICrr:
  case X86::PCMPESTRIOrm:
  case X86::PCMPESTRIOrr:
  case X86::PCMPESTRISrm:
  case X86::PCMPESTRISrr:
  case X86::PCMPESTRIZrm:
  case X86::PCMPESTRIZrr:
  case X86::PCMPESTRIrm:
  case X86::PCMPESTRIrr:
  case X86::PCMPESTRM128rm:
  case X86::PCMPESTRM128rr:
  case X86::PCMPISTRIArm:
  case X86::PCMPISTRIArr:
  case X86::PCMPISTRICrm:
  case X86::PCMPISTRICrr:
  case X86::PCMPISTRIOrm:
  case X86::PCMPISTRIOrr:
  case X86::PCMPISTRISrm:
  case X86::PCMPISTRISrr:
  case X86::PCMPISTRIZrm:
  case X86::PCMPISTRIZrr:
  case X86::PCMPISTRIrm:
  case X86::PCMPISTRIrr:
  case X86::PCMPISTRM128rm:
  case X86::PCMPISTRM128rr:
  case X86::PEXTRBmr:
  case X86::PEXTRBrr:
  case X86::PEXTRDmr:
  case X86::PEXTRDrr:
  case X86::PEXTRQmr:
  case X86::PEXTRQrr:
  case X86::PEXTRWmr:
  case X86::PEXTRWri:
  case X86::PINSRBrr:
  case X86::PINSRDrm:
  case X86::PINSRDrr:
  case X86::PINSRQrm:
  case X86::PINSRQrr:
  case X86::PINSRWrmi:
  case X86::PINSRWrri:
  case X86::PSHUFDmi:
  case X86::PSHUFDri:
  case X86::PSHUFHWmi:
  case X86::PSHUFHWri:
  case X86::PSHUFLWmi:
  case X86::PSHUFLWri:
  case X86::ROUNDPDm:
  case X86::ROUNDPDr:
  case X86::ROUNDPSm:
  case X86::ROUNDPSr:
  case X86::ROUNDSDm:
  case X86::ROUNDSDr:
  case X86::ROUNDSSm:
  case X86::ROUNDSSr:
  case X86::SHLD16mri8:
  case X86::SHLD16rri8:
  case X86::SHLD32mri8:
  case X86::SHLD32rri8:
  case X86::SHLD64mri8:
  case X86::SHLD64rri8:
  case X86::SHRD16mri8:
  case X86::SHRD16rri8:
  case X86::SHRD32mri8:
  case X86::SHRD32rri8:
  case X86::SHRD64mri8:
  case X86::SHRD64rri8:
  case X86::SHUFPDrmi:
  case X86::SHUFPDrri:
  case X86::SHUFPSrmi:
  case X86::SHUFPSrri:
  case X86::VADDPDYrm:
  case X86::VADDPDYrr:
  case X86::VADDPDrm:
  case X86::VADDPDrr:
  case X86::VADDPSYrm:
  case X86::VADDPSYrr:
  case X86::VADDPSrm:
  case X86::VADDPSrr:
  case X86::VADDSDrm:
  case X86::VADDSDrm_Int:
  case X86::VADDSDrr:
  case X86::VADDSDrr_Int:
  case X86::VADDSSrm:
  case X86::VADDSSrm_Int:
  case X86::VADDSSrr:
  case X86::VADDSSrr_Int:
  case X86::VADDSUBPDYrm:
  case X86::VADDSUBPDYrr:
  case X86::VADDSUBPDrm:
  case X86::VADDSUBPDrr:
  case X86::VADDSUBPSYrm:
  case X86::VADDSUBPSYrr:
  case X86::VADDSUBPSrm:
  case X86::VADDSUBPSrr:
  case X86::VAESDECLASTrm:
  case X86::VAESDECLASTrr:
  case X86::VAESDECrm:
  case X86::VAESDECrr:
  case X86::VAESENCLASTrm:
  case X86::VAESENCLASTrr:
  case X86::VAESENCrm:
  case X86::VAESENCrr:
  case X86::VAESKEYGENASSIST128rm:
  case X86::VAESKEYGENASSIST128rr:
  case X86::VANDNPDYrm:
  case X86::VANDNPDYrr:
  case X86::VANDNPDrm:
  case X86::VANDNPDrr:
  case X86::VANDNPSYrm:
  case X86::VANDNPSYrr:
  case X86::VANDNPSrm:
  case X86::VANDNPSrr:
  case X86::VANDPDYrm:
  case X86::VANDPDYrr:
  case X86::VANDPDrm:
  case X86::VANDPDrr:
  case X86::VANDPSYrm:
  case X86::VANDPSYrr:
  case X86::VANDPSrm:
  case X86::VANDPSrr:
  case X86::VASTART_SAVE_XMM_REGS:
  case X86::VCMPPDYrmi:
  case X86::VCMPPDYrri:
  case X86::VCMPPDrmi:
  case X86::VCMPPDrri:
  case X86::VCMPPSYrmi:
  case X86::VCMPPSYrri:
  case X86::VCMPPSrmi:
  case X86::VCMPPSrri:
  case X86::VCMPSDrm:
  case X86::VCMPSDrr:
  case X86::VCMPSSrm:
  case X86::VCMPSSrr:
  case X86::VCVTPS2PHYrr:
  case X86::VCVTPS2PHmr:
  case X86::VCVTPS2PHrr:
  case X86::VCVTSD2SSrm:
  case X86::VCVTSD2SSrr:
  case X86::VCVTSI2SD64rm:
  case X86::VCVTSI2SD64rr:
  case X86::VCVTSI2SDLrm:
  case X86::VCVTSI2SDLrr:
  case X86::VCVTSI2SDrm:
  case X86::VCVTSI2SDrr:
  case X86::VCVTSI2SS64rm:
  case X86::VCVTSI2SS64rr:
  case X86::VCVTSI2SSrm:
  case X86::VCVTSI2SSrr:
  case X86::VCVTSS2SDrm:
  case X86::VCVTSS2SDrr:
  case X86::VDIVPDYrm:
  case X86::VDIVPDYrr:
  case X86::VDIVPDrm:
  case X86::VDIVPDrr:
  case X86::VDIVPSYrm:
  case X86::VDIVPSYrr:
  case X86::VDIVPSrm:
  case X86::VDIVPSrr:
  case X86::VDIVSDrm:
  case X86::VDIVSDrm_Int:
  case X86::VDIVSDrr:
  case X86::VDIVSDrr_Int:
  case X86::VDIVSSrm:
  case X86::VDIVSSrm_Int:
  case X86::VDIVSSrr:
  case X86::VDIVSSrr_Int:
  case X86::VEXTRACTF128rr:
  case X86::VEXTRACTPSmr:
  case X86::VEXTRACTPSrr:
  case X86::VEXTRACTPSrr64:
  case X86::VFMADDPDr132m:
  case X86::VFMADDPDr132mY:
  case X86::VFMADDPDr132r:
  case X86::VFMADDPDr132rY:
  case X86::VFMADDPDr213m:
  case X86::VFMADDPDr213mY:
  case X86::VFMADDPDr213r:
  case X86::VFMADDPDr213rY:
  case X86::VFMADDPDr231m:
  case X86::VFMADDPDr231mY:
  case X86::VFMADDPDr231r:
  case X86::VFMADDPDr231rY:
  case X86::VFMADDPSr132m:
  case X86::VFMADDPSr132mY:
  case X86::VFMADDPSr132r:
  case X86::VFMADDPSr132rY:
  case X86::VFMADDPSr213m:
  case X86::VFMADDPSr213mY:
  case X86::VFMADDPSr213r:
  case X86::VFMADDPSr213rY:
  case X86::VFMADDPSr231m:
  case X86::VFMADDPSr231mY:
  case X86::VFMADDPSr231r:
  case X86::VFMADDPSr231rY:
  case X86::VFMADDSUBPDr132m:
  case X86::VFMADDSUBPDr132mY:
  case X86::VFMADDSUBPDr132r:
  case X86::VFMADDSUBPDr132rY:
  case X86::VFMADDSUBPDr213m:
  case X86::VFMADDSUBPDr213mY:
  case X86::VFMADDSUBPDr213r:
  case X86::VFMADDSUBPDr213rY:
  case X86::VFMADDSUBPDr231m:
  case X86::VFMADDSUBPDr231mY:
  case X86::VFMADDSUBPDr231r:
  case X86::VFMADDSUBPDr231rY:
  case X86::VFMADDSUBPSr132m:
  case X86::VFMADDSUBPSr132mY:
  case X86::VFMADDSUBPSr132r:
  case X86::VFMADDSUBPSr132rY:
  case X86::VFMADDSUBPSr213m:
  case X86::VFMADDSUBPSr213mY:
  case X86::VFMADDSUBPSr213r:
  case X86::VFMADDSUBPSr213rY:
  case X86::VFMADDSUBPSr231m:
  case X86::VFMADDSUBPSr231mY:
  case X86::VFMADDSUBPSr231r:
  case X86::VFMADDSUBPSr231rY:
  case X86::VFMSUBADDPDr132m:
  case X86::VFMSUBADDPDr132mY:
  case X86::VFMSUBADDPDr132r:
  case X86::VFMSUBADDPDr132rY:
  case X86::VFMSUBADDPDr213m:
  case X86::VFMSUBADDPDr213mY:
  case X86::VFMSUBADDPDr213r:
  case X86::VFMSUBADDPDr213rY:
  case X86::VFMSUBADDPDr231m:
  case X86::VFMSUBADDPDr231mY:
  case X86::VFMSUBADDPDr231r:
  case X86::VFMSUBADDPDr231rY:
  case X86::VFMSUBADDPSr132m:
  case X86::VFMSUBADDPSr132mY:
  case X86::VFMSUBADDPSr132r:
  case X86::VFMSUBADDPSr132rY:
  case X86::VFMSUBADDPSr213m:
  case X86::VFMSUBADDPSr213mY:
  case X86::VFMSUBADDPSr213r:
  case X86::VFMSUBADDPSr213rY:
  case X86::VFMSUBADDPSr231m:
  case X86::VFMSUBADDPSr231mY:
  case X86::VFMSUBADDPSr231r:
  case X86::VFMSUBADDPSr231rY:
  case X86::VFMSUBPDr132m:
  case X86::VFMSUBPDr132mY:
  case X86::VFMSUBPDr132r:
  case X86::VFMSUBPDr132rY:
  case X86::VFMSUBPDr213m:
  case X86::VFMSUBPDr213mY:
  case X86::VFMSUBPDr213r:
  case X86::VFMSUBPDr213rY:
  case X86::VFMSUBPDr231m:
  case X86::VFMSUBPDr231mY:
  case X86::VFMSUBPDr231r:
  case X86::VFMSUBPDr231rY:
  case X86::VFMSUBPSr132m:
  case X86::VFMSUBPSr132mY:
  case X86::VFMSUBPSr132r:
  case X86::VFMSUBPSr132rY:
  case X86::VFMSUBPSr213m:
  case X86::VFMSUBPSr213mY:
  case X86::VFMSUBPSr213r:
  case X86::VFMSUBPSr213rY:
  case X86::VFMSUBPSr231m:
  case X86::VFMSUBPSr231mY:
  case X86::VFMSUBPSr231r:
  case X86::VFMSUBPSr231rY:
  case X86::VFNMADDPDr132m:
  case X86::VFNMADDPDr132mY:
  case X86::VFNMADDPDr132r:
  case X86::VFNMADDPDr132rY:
  case X86::VFNMADDPDr213m:
  case X86::VFNMADDPDr213mY:
  case X86::VFNMADDPDr213r:
  case X86::VFNMADDPDr213rY:
  case X86::VFNMADDPDr231m:
  case X86::VFNMADDPDr231mY:
  case X86::VFNMADDPDr231r:
  case X86::VFNMADDPDr231rY:
  case X86::VFNMADDPSr132m:
  case X86::VFNMADDPSr132mY:
  case X86::VFNMADDPSr132r:
  case X86::VFNMADDPSr132rY:
  case X86::VFNMADDPSr213m:
  case X86::VFNMADDPSr213mY:
  case X86::VFNMADDPSr213r:
  case X86::VFNMADDPSr213rY:
  case X86::VFNMADDPSr231m:
  case X86::VFNMADDPSr231mY:
  case X86::VFNMADDPSr231r:
  case X86::VFNMADDPSr231rY:
  case X86::VFNMSUBPDr132m:
  case X86::VFNMSUBPDr132mY:
  case X86::VFNMSUBPDr132r:
  case X86::VFNMSUBPDr132rY:
  case X86::VFNMSUBPDr213m:
  case X86::VFNMSUBPDr213mY:
  case X86::VFNMSUBPDr213r:
  case X86::VFNMSUBPDr213rY:
  case X86::VFNMSUBPDr231m:
  case X86::VFNMSUBPDr231mY:
  case X86::VFNMSUBPDr231r:
  case X86::VFNMSUBPDr231rY:
  case X86::VFNMSUBPSr132m:
  case X86::VFNMSUBPSr132mY:
  case X86::VFNMSUBPSr132r:
  case X86::VFNMSUBPSr132rY:
  case X86::VFNMSUBPSr213m:
  case X86::VFNMSUBPSr213mY:
  case X86::VFNMSUBPSr213r:
  case X86::VFNMSUBPSr213rY:
  case X86::VFNMSUBPSr231m:
  case X86::VFNMSUBPSr231mY:
  case X86::VFNMSUBPSr231r:
  case X86::VFNMSUBPSr231rY:
  case X86::VFsANDNPDrm:
  case X86::VFsANDNPDrr:
  case X86::VFsANDNPSrm:
  case X86::VFsANDNPSrr:
  case X86::VFsANDPDrm:
  case X86::VFsANDPDrr:
  case X86::VFsANDPSrm:
  case X86::VFsANDPSrr:
  case X86::VFsORPDrm:
  case X86::VFsORPDrr:
  case X86::VFsORPSrm:
  case X86::VFsORPSrr:
  case X86::VFsXORPDrm:
  case X86::VFsXORPDrr:
  case X86::VFsXORPSrm:
  case X86::VFsXORPSrr:
  case X86::VHADDPDYrm:
  case X86::VHADDPDYrr:
  case X86::VHADDPDrm:
  case X86::VHADDPDrr:
  case X86::VHADDPSYrm:
  case X86::VHADDPSYrr:
  case X86::VHADDPSrm:
  case X86::VHADDPSrr:
  case X86::VHSUBPDYrm:
  case X86::VHSUBPDYrr:
  case X86::VHSUBPDrm:
  case X86::VHSUBPDrr:
  case X86::VHSUBPSYrm:
  case X86::VHSUBPSYrr:
  case X86::VHSUBPSrm:
  case X86::VHSUBPSrr:
  case X86::VMASKMOVPDYrm:
  case X86::VMASKMOVPDrm:
  case X86::VMASKMOVPSYrm:
  case X86::VMASKMOVPSrm:
  case X86::VMAXPDYrm:
  case X86::VMAXPDYrm_Int:
  case X86::VMAXPDYrr:
  case X86::VMAXPDYrr_Int:
  case X86::VMAXPDrm:
  case X86::VMAXPDrm_Int:
  case X86::VMAXPDrr:
  case X86::VMAXPDrr_Int:
  case X86::VMAXPSYrm:
  case X86::VMAXPSYrm_Int:
  case X86::VMAXPSYrr:
  case X86::VMAXPSYrr_Int:
  case X86::VMAXPSrm:
  case X86::VMAXPSrm_Int:
  case X86::VMAXPSrr:
  case X86::VMAXPSrr_Int:
  case X86::VMAXSDrm:
  case X86::VMAXSDrm_Int:
  case X86::VMAXSDrr:
  case X86::VMAXSDrr_Int:
  case X86::VMAXSSrm:
  case X86::VMAXSSrm_Int:
  case X86::VMAXSSrr:
  case X86::VMAXSSrr_Int:
  case X86::VMINPDYrm:
  case X86::VMINPDYrm_Int:
  case X86::VMINPDYrr:
  case X86::VMINPDYrr_Int:
  case X86::VMINPDrm:
  case X86::VMINPDrm_Int:
  case X86::VMINPDrr:
  case X86::VMINPDrr_Int:
  case X86::VMINPSYrm:
  case X86::VMINPSYrm_Int:
  case X86::VMINPSYrr:
  case X86::VMINPSYrr_Int:
  case X86::VMINPSrm:
  case X86::VMINPSrm_Int:
  case X86::VMINPSrr:
  case X86::VMINPSrr_Int:
  case X86::VMINSDrm:
  case X86::VMINSDrm_Int:
  case X86::VMINSDrr:
  case X86::VMINSDrr_Int:
  case X86::VMINSSrm:
  case X86::VMINSSrm_Int:
  case X86::VMINSSrr:
  case X86::VMINSSrr_Int:
  case X86::VMOVHLPSrr:
  case X86::VMOVHPDrm:
  case X86::VMOVHPSrm:
  case X86::VMOVLHPSrr:
  case X86::VMOVLPDrm:
  case X86::VMOVLPSrm:
  case X86::VMOVSDrr:
  case X86::VMOVSDrr_REV:
  case X86::VMOVSSrr:
  case X86::VMOVSSrr_REV:
  case X86::VMULPDYrm:
  case X86::VMULPDYrr:
  case X86::VMULPDrm:
  case X86::VMULPDrr:
  case X86::VMULPSYrm:
  case X86::VMULPSYrr:
  case X86::VMULPSrm:
  case X86::VMULPSrr:
  case X86::VMULSDrm:
  case X86::VMULSDrm_Int:
  case X86::VMULSDrr:
  case X86::VMULSDrr_Int:
  case X86::VMULSSrm:
  case X86::VMULSSrm_Int:
  case X86::VMULSSrr:
  case X86::VMULSSrr_Int:
  case X86::VORPDYrm:
  case X86::VORPDYrr:
  case X86::VORPDrm:
  case X86::VORPDrr:
  case X86::VORPSYrm:
  case X86::VORPSYrr:
  case X86::VORPSrm:
  case X86::VORPSrr:
  case X86::VPACKSSDWrm:
  case X86::VPACKSSDWrr:
  case X86::VPACKSSWBrm:
  case X86::VPACKSSWBrr:
  case X86::VPACKUSDWrm:
  case X86::VPACKUSDWrr:
  case X86::VPACKUSWBrm:
  case X86::VPACKUSWBrr:
  case X86::VPADDBrm:
  case X86::VPADDBrr:
  case X86::VPADDDrm:
  case X86::VPADDDrr:
  case X86::VPADDQrm:
  case X86::VPADDQrr:
  case X86::VPADDSBrm:
  case X86::VPADDSBrr:
  case X86::VPADDSWrm:
  case X86::VPADDSWrr:
  case X86::VPADDUSBrm:
  case X86::VPADDUSBrr:
  case X86::VPADDUSWrm:
  case X86::VPADDUSWrr:
  case X86::VPADDWrm:
  case X86::VPADDWrr:
  case X86::VPANDNrm:
  case X86::VPANDNrr:
  case X86::VPANDrm:
  case X86::VPANDrr:
  case X86::VPAVGBrm:
  case X86::VPAVGBrr:
  case X86::VPAVGWrm:
  case X86::VPAVGWrr:
  case X86::VPCMPEQBrm:
  case X86::VPCMPEQBrr:
  case X86::VPCMPEQDrm:
  case X86::VPCMPEQDrr:
  case X86::VPCMPEQQrm:
  case X86::VPCMPEQQrr:
  case X86::VPCMPEQWrm:
  case X86::VPCMPEQWrr:
  case X86::VPCMPESTRIArm:
  case X86::VPCMPESTRIArr:
  case X86::VPCMPESTRICrm:
  case X86::VPCMPESTRICrr:
  case X86::VPCMPESTRIOrm:
  case X86::VPCMPESTRIOrr:
  case X86::VPCMPESTRISrm:
  case X86::VPCMPESTRISrr:
  case X86::VPCMPESTRIZrm:
  case X86::VPCMPESTRIZrr:
  case X86::VPCMPESTRIrm:
  case X86::VPCMPESTRIrr:
  case X86::VPCMPESTRM128rm:
  case X86::VPCMPESTRM128rr:
  case X86::VPCMPGTBrm:
  case X86::VPCMPGTBrr:
  case X86::VPCMPGTDrm:
  case X86::VPCMPGTDrr:
  case X86::VPCMPGTQrm:
  case X86::VPCMPGTQrr:
  case X86::VPCMPGTWrm:
  case X86::VPCMPGTWrr:
  case X86::VPCMPISTRIArm:
  case X86::VPCMPISTRIArr:
  case X86::VPCMPISTRICrm:
  case X86::VPCMPISTRICrr:
  case X86::VPCMPISTRIOrm:
  case X86::VPCMPISTRIOrr:
  case X86::VPCMPISTRISrm:
  case X86::VPCMPISTRISrr:
  case X86::VPCMPISTRIZrm:
  case X86::VPCMPISTRIZrr:
  case X86::VPCMPISTRIrm:
  case X86::VPCMPISTRIrr:
  case X86::VPCMPISTRM128rm:
  case X86::VPCMPISTRM128rr:
  case X86::VPERMILPDYmi:
  case X86::VPERMILPDYri:
  case X86::VPERMILPDYrm:
  case X86::VPERMILPDYrr:
  case X86::VPERMILPDmi:
  case X86::VPERMILPDri:
  case X86::VPERMILPDrm:
  case X86::VPERMILPDrr:
  case X86::VPERMILPSYmi:
  case X86::VPERMILPSYri:
  case X86::VPERMILPSYrm:
  case X86::VPERMILPSYrr:
  case X86::VPERMILPSmi:
  case X86::VPERMILPSri:
  case X86::VPERMILPSrm:
  case X86::VPERMILPSrr:
  case X86::VPEXTRBmr:
  case X86::VPEXTRBrr:
  case X86::VPEXTRBrr64:
  case X86::VPEXTRDmr:
  case X86::VPEXTRDrr:
  case X86::VPEXTRQmr:
  case X86::VPEXTRQrr:
  case X86::VPEXTRWmr:
  case X86::VPEXTRWri:
  case X86::VPHADDDrm128:
  case X86::VPHADDDrr128:
  case X86::VPHADDSWrm128:
  case X86::VPHADDSWrr128:
  case X86::VPHADDWrm128:
  case X86::VPHADDWrr128:
  case X86::VPHSUBDrm128:
  case X86::VPHSUBDrr128:
  case X86::VPHSUBSWrm128:
  case X86::VPHSUBSWrr128:
  case X86::VPHSUBWrm128:
  case X86::VPHSUBWrr128:
  case X86::VPMADDUBSWrm128:
  case X86::VPMADDUBSWrr128:
  case X86::VPMADDWDrm:
  case X86::VPMADDWDrr:
  case X86::VPMAXSBrm:
  case X86::VPMAXSBrr:
  case X86::VPMAXSDrm:
  case X86::VPMAXSDrr:
  case X86::VPMAXSWrm:
  case X86::VPMAXSWrr:
  case X86::VPMAXUBrm:
  case X86::VPMAXUBrr:
  case X86::VPMAXUDrm:
  case X86::VPMAXUDrr:
  case X86::VPMAXUWrm:
  case X86::VPMAXUWrr:
  case X86::VPMINSBrm:
  case X86::VPMINSBrr:
  case X86::VPMINSDrm:
  case X86::VPMINSDrr:
  case X86::VPMINSWrm:
  case X86::VPMINSWrr:
  case X86::VPMINUBrm:
  case X86::VPMINUBrr:
  case X86::VPMINUDrm:
  case X86::VPMINUDrr:
  case X86::VPMINUWrm:
  case X86::VPMINUWrr:
  case X86::VPMULDQrm:
  case X86::VPMULDQrr:
  case X86::VPMULHRSWrm128:
  case X86::VPMULHRSWrr128:
  case X86::VPMULHUWrm:
  case X86::VPMULHUWrr:
  case X86::VPMULHWrm:
  case X86::VPMULHWrr:
  case X86::VPMULLDrm:
  case X86::VPMULLDrr:
  case X86::VPMULLWrm:
  case X86::VPMULLWrr:
  case X86::VPMULUDQrm:
  case X86::VPMULUDQrr:
  case X86::VPORrm:
  case X86::VPORrr:
  case X86::VPSADBWrm:
  case X86::VPSADBWrr:
  case X86::VPSHUFBrm128:
  case X86::VPSHUFBrr128:
  case X86::VPSHUFDmi:
  case X86::VPSHUFDri:
  case X86::VPSHUFHWmi:
  case X86::VPSHUFHWri:
  case X86::VPSHUFLWmi:
  case X86::VPSHUFLWri:
  case X86::VPSIGNBrm128:
  case X86::VPSIGNBrr128:
  case X86::VPSIGNDrm128:
  case X86::VPSIGNDrr128:
  case X86::VPSIGNWrm128:
  case X86::VPSIGNWrr128:
  case X86::VPSLLDQri:
  case X86::VPSLLDri:
  case X86::VPSLLDrm:
  case X86::VPSLLDrr:
  case X86::VPSLLQri:
  case X86::VPSLLQrm:
  case X86::VPSLLQrr:
  case X86::VPSLLWri:
  case X86::VPSLLWrm:
  case X86::VPSLLWrr:
  case X86::VPSRADri:
  case X86::VPSRADrm:
  case X86::VPSRADrr:
  case X86::VPSRAWri:
  case X86::VPSRAWrm:
  case X86::VPSRAWrr:
  case X86::VPSRLDQri:
  case X86::VPSRLDri:
  case X86::VPSRLDrm:
  case X86::VPSRLDrr:
  case X86::VPSRLQri:
  case X86::VPSRLQrm:
  case X86::VPSRLQrr:
  case X86::VPSRLWri:
  case X86::VPSRLWrm:
  case X86::VPSRLWrr:
  case X86::VPSUBBrm:
  case X86::VPSUBBrr:
  case X86::VPSUBDrm:
  case X86::VPSUBDrr:
  case X86::VPSUBQrm:
  case X86::VPSUBQrr:
  case X86::VPSUBSBrm:
  case X86::VPSUBSBrr:
  case X86::VPSUBSWrm:
  case X86::VPSUBSWrr:
  case X86::VPSUBUSBrm:
  case X86::VPSUBUSBrr:
  case X86::VPSUBUSWrm:
  case X86::VPSUBUSWrr:
  case X86::VPSUBWrm:
  case X86::VPSUBWrr:
  case X86::VPUNPCKHBWrm:
  case X86::VPUNPCKHBWrr:
  case X86::VPUNPCKHDQrm:
  case X86::VPUNPCKHDQrr:
  case X86::VPUNPCKHQDQrm:
  case X86::VPUNPCKHQDQrr:
  case X86::VPUNPCKHWDrm:
  case X86::VPUNPCKHWDrr:
  case X86::VPUNPCKLBWrm:
  case X86::VPUNPCKLBWrr:
  case X86::VPUNPCKLDQrm:
  case X86::VPUNPCKLDQrr:
  case X86::VPUNPCKLQDQrm:
  case X86::VPUNPCKLQDQrr:
  case X86::VPUNPCKLWDrm:
  case X86::VPUNPCKLWDrr:
  case X86::VPXORrm:
  case X86::VPXORrr:
  case X86::VRCPSSm:
  case X86::VRCPSSm_Int:
  case X86::VRCPSSr:
  case X86::VROUNDPDm:
  case X86::VROUNDPDm_AVX:
  case X86::VROUNDPDr:
  case X86::VROUNDPDr_AVX:
  case X86::VROUNDPSm:
  case X86::VROUNDPSm_AVX:
  case X86::VROUNDPSr:
  case X86::VROUNDPSr_AVX:
  case X86::VROUNDYPDm:
  case X86::VROUNDYPDm_AVX:
  case X86::VROUNDYPDr:
  case X86::VROUNDYPDr_AVX:
  case X86::VROUNDYPSm:
  case X86::VROUNDYPSm_AVX:
  case X86::VROUNDYPSr:
  case X86::VROUNDYPSr_AVX:
  case X86::VRSQRTSSm:
  case X86::VRSQRTSSm_Int:
  case X86::VRSQRTSSr:
  case X86::VSQRTSDm:
  case X86::VSQRTSDm_Int:
  case X86::VSQRTSDr:
  case X86::VSQRTSSm:
  case X86::VSQRTSSm_Int:
  case X86::VSQRTSSr:
  case X86::VSUBPDYrm:
  case X86::VSUBPDYrr:
  case X86::VSUBPDrm:
  case X86::VSUBPDrr:
  case X86::VSUBPSYrm:
  case X86::VSUBPSYrr:
  case X86::VSUBPSrm:
  case X86::VSUBPSrr:
  case X86::VSUBSDrm:
  case X86::VSUBSDrm_Int:
  case X86::VSUBSDrr:
  case X86::VSUBSDrr_Int:
  case X86::VSUBSSrm:
  case X86::VSUBSSrm_Int:
  case X86::VSUBSSrr:
  case X86::VSUBSSrr_Int:
  case X86::VUNPCKHPDYrm:
  case X86::VUNPCKHPDYrr:
  case X86::VUNPCKHPDrm:
  case X86::VUNPCKHPDrr:
  case X86::VUNPCKHPSYrm:
  case X86::VUNPCKHPSYrr:
  case X86::VUNPCKHPSrm:
  case X86::VUNPCKHPSrr:
  case X86::VUNPCKLPDYrm:
  case X86::VUNPCKLPDYrr:
  case X86::VUNPCKLPDrm:
  case X86::VUNPCKLPDrr:
  case X86::VUNPCKLPSYrm:
  case X86::VUNPCKLPSYrr:
  case X86::VUNPCKLPSrm:
  case X86::VUNPCKLPSrr:
  case X86::VXORPDYrm:
  case X86::VXORPDYrr:
  case X86::VXORPDrm:
  case X86::VXORPDrr:
  case X86::VXORPSYrm:
  case X86::VXORPSYrr:
  case X86::VXORPSrm:
  case X86::VXORPSrr:
    switch (MI->getOpcode()) {
    case X86::AESKEYGENASSIST128rm: 
    case X86::EXTRACTPSmr: 
    case X86::IMUL16rmi: 
    case X86::IMUL16rmi8: 
    case X86::IMUL32rmi: 
    case X86::IMUL32rmi8: 
    case X86::IMUL64rmi32: 
    case X86::IMUL64rmi8: 
    case X86::MMX_PSHUFWmi: 
    case X86::PCMPESTRIArm: 
    case X86::PCMPESTRICrm: 
    case X86::PCMPESTRIOrm: 
    case X86::PCMPESTRISrm: 
    case X86::PCMPESTRIZrm: 
    case X86::PCMPESTRIrm: 
    case X86::PCMPESTRM128rm: 
    case X86::PCMPISTRIArm: 
    case X86::PCMPISTRICrm: 
    case X86::PCMPISTRIOrm: 
    case X86::PCMPISTRISrm: 
    case X86::PCMPISTRIZrm: 
    case X86::PCMPISTRIrm: 
    case X86::PCMPISTRM128rm: 
    case X86::PEXTRBmr: 
    case X86::PEXTRDmr: 
    case X86::PEXTRQmr: 
    case X86::PEXTRWmr: 
    case X86::PSHUFDmi: 
    case X86::PSHUFHWmi: 
    case X86::PSHUFLWmi: 
    case X86::ROUNDPDm: 
    case X86::ROUNDPSm: 
    case X86::SHLD16mri8: 
    case X86::SHLD32mri8: 
    case X86::SHLD64mri8: 
    case X86::SHRD16mri8: 
    case X86::SHRD32mri8: 
    case X86::SHRD64mri8: 
    case X86::VAESKEYGENASSIST128rm: 
    case X86::VCVTPS2PHmr: 
    case X86::VEXTRACTPSmr: 
    case X86::VPCMPESTRIArm: 
    case X86::VPCMPESTRICrm: 
    case X86::VPCMPESTRIOrm: 
    case X86::VPCMPESTRISrm: 
    case X86::VPCMPESTRIZrm: 
    case X86::VPCMPESTRIrm: 
    case X86::VPCMPESTRM128rm: 
    case X86::VPCMPISTRIArm: 
    case X86::VPCMPISTRICrm: 
    case X86::VPCMPISTRIOrm: 
    case X86::VPCMPISTRISrm: 
    case X86::VPCMPISTRIZrm: 
    case X86::VPCMPISTRIrm: 
    case X86::VPCMPISTRM128rm: 
    case X86::VPERMILPDYmi: 
    case X86::VPERMILPDmi: 
    case X86::VPERMILPSYmi: 
    case X86::VPERMILPSmi: 
    case X86::VPEXTRBmr: 
    case X86::VPEXTRDmr: 
    case X86::VPEXTRQmr: 
    case X86::VPEXTRWmr: 
    case X86::VPSHUFDmi: 
    case X86::VPSHUFHWmi: 
    case X86::VPSHUFLWmi: 
    case X86::VRCPSSm_Int: 
    case X86::VROUNDPDm: 
    case X86::VROUNDPDm_AVX: 
    case X86::VROUNDPSm: 
    case X86::VROUNDPSm_AVX: 
    case X86::VROUNDYPDm: 
    case X86::VROUNDYPDm_AVX: 
    case X86::VROUNDYPSm: 
    case X86::VROUNDYPSm_AVX: 
    case X86::VRSQRTSSm_Int: 
    case X86::VSQRTSSm_Int: printOperand(MI, 6, O); break;
    case X86::AESKEYGENASSIST128rr: 
    case X86::ANDN32rr: 
    case X86::ANDN64rr: 
    case X86::EXTRACTPSrr: 
    case X86::IMUL16rri: 
    case X86::IMUL16rri8: 
    case X86::IMUL32rri: 
    case X86::IMUL32rri8: 
    case X86::IMUL64rri32: 
    case X86::IMUL64rri8: 
    case X86::Int_VCMPSDrr: 
    case X86::Int_VCMPSSrr: 
    case X86::Int_VCVTSD2SSrr: 
    case X86::Int_VCVTSI2SD64rr: 
    case X86::Int_VCVTSI2SDrr: 
    case X86::Int_VCVTSI2SS64rr: 
    case X86::Int_VCVTSI2SSrr: 
    case X86::Int_VCVTSS2SDrr: 
    case X86::MMX_PEXTRWirri: 
    case X86::MMX_PSHUFWri: 
    case X86::PCMPESTRIArr: 
    case X86::PCMPESTRICrr: 
    case X86::PCMPESTRIOrr: 
    case X86::PCMPESTRISrr: 
    case X86::PCMPESTRIZrr: 
    case X86::PCMPESTRIrr: 
    case X86::PCMPESTRM128rr: 
    case X86::PCMPISTRIArr: 
    case X86::PCMPISTRICrr: 
    case X86::PCMPISTRIOrr: 
    case X86::PCMPISTRISrr: 
    case X86::PCMPISTRIZrr: 
    case X86::PCMPISTRIrr: 
    case X86::PCMPISTRM128rr: 
    case X86::PEXTRBrr: 
    case X86::PEXTRDrr: 
    case X86::PEXTRQrr: 
    case X86::PEXTRWri: 
    case X86::PSHUFDri: 
    case X86::PSHUFHWri: 
    case X86::PSHUFLWri: 
    case X86::ROUNDPDr: 
    case X86::ROUNDPSr: 
    case X86::VADDPDYrr: 
    case X86::VADDPDrr: 
    case X86::VADDPSYrr: 
    case X86::VADDPSrr: 
    case X86::VADDSDrr: 
    case X86::VADDSDrr_Int: 
    case X86::VADDSSrr: 
    case X86::VADDSSrr_Int: 
    case X86::VADDSUBPDYrr: 
    case X86::VADDSUBPDrr: 
    case X86::VADDSUBPSYrr: 
    case X86::VADDSUBPSrr: 
    case X86::VAESDECLASTrr: 
    case X86::VAESDECrr: 
    case X86::VAESENCLASTrr: 
    case X86::VAESENCrr: 
    case X86::VAESKEYGENASSIST128rr: 
    case X86::VANDNPDYrr: 
    case X86::VANDNPDrr: 
    case X86::VANDNPSYrr: 
    case X86::VANDNPSrr: 
    case X86::VANDPDYrr: 
    case X86::VANDPDrr: 
    case X86::VANDPSYrr: 
    case X86::VANDPSrr: 
    case X86::VASTART_SAVE_XMM_REGS: 
    case X86::VCMPPDYrri: 
    case X86::VCMPPDrri: 
    case X86::VCMPPSYrri: 
    case X86::VCMPPSrri: 
    case X86::VCMPSDrr: 
    case X86::VCMPSSrr: 
    case X86::VCVTPS2PHYrr: 
    case X86::VCVTPS2PHrr: 
    case X86::VCVTSD2SSrr: 
    case X86::VCVTSI2SD64rr: 
    case X86::VCVTSI2SDLrr: 
    case X86::VCVTSI2SDrr: 
    case X86::VCVTSI2SS64rr: 
    case X86::VCVTSI2SSrr: 
    case X86::VCVTSS2SDrr: 
    case X86::VDIVPDYrr: 
    case X86::VDIVPDrr: 
    case X86::VDIVPSYrr: 
    case X86::VDIVPSrr: 
    case X86::VDIVSDrr: 
    case X86::VDIVSDrr_Int: 
    case X86::VDIVSSrr: 
    case X86::VDIVSSrr_Int: 
    case X86::VEXTRACTF128rr: 
    case X86::VEXTRACTPSrr: 
    case X86::VEXTRACTPSrr64: 
    case X86::VFMADDPDr132r: 
    case X86::VFMADDPDr132rY: 
    case X86::VFMADDPDr213r: 
    case X86::VFMADDPDr213rY: 
    case X86::VFMADDPDr231r: 
    case X86::VFMADDPDr231rY: 
    case X86::VFMADDPSr132r: 
    case X86::VFMADDPSr132rY: 
    case X86::VFMADDPSr213r: 
    case X86::VFMADDPSr213rY: 
    case X86::VFMADDPSr231r: 
    case X86::VFMADDPSr231rY: 
    case X86::VFMADDSUBPDr132r: 
    case X86::VFMADDSUBPDr132rY: 
    case X86::VFMADDSUBPDr213r: 
    case X86::VFMADDSUBPDr213rY: 
    case X86::VFMADDSUBPDr231r: 
    case X86::VFMADDSUBPDr231rY: 
    case X86::VFMADDSUBPSr132r: 
    case X86::VFMADDSUBPSr132rY: 
    case X86::VFMADDSUBPSr213r: 
    case X86::VFMADDSUBPSr213rY: 
    case X86::VFMADDSUBPSr231r: 
    case X86::VFMADDSUBPSr231rY: 
    case X86::VFMSUBADDPDr132r: 
    case X86::VFMSUBADDPDr132rY: 
    case X86::VFMSUBADDPDr213r: 
    case X86::VFMSUBADDPDr213rY: 
    case X86::VFMSUBADDPDr231r: 
    case X86::VFMSUBADDPDr231rY: 
    case X86::VFMSUBADDPSr132r: 
    case X86::VFMSUBADDPSr132rY: 
    case X86::VFMSUBADDPSr213r: 
    case X86::VFMSUBADDPSr213rY: 
    case X86::VFMSUBADDPSr231r: 
    case X86::VFMSUBADDPSr231rY: 
    case X86::VFMSUBPDr132r: 
    case X86::VFMSUBPDr132rY: 
    case X86::VFMSUBPDr213r: 
    case X86::VFMSUBPDr213rY: 
    case X86::VFMSUBPDr231r: 
    case X86::VFMSUBPDr231rY: 
    case X86::VFMSUBPSr132r: 
    case X86::VFMSUBPSr132rY: 
    case X86::VFMSUBPSr213r: 
    case X86::VFMSUBPSr213rY: 
    case X86::VFMSUBPSr231r: 
    case X86::VFMSUBPSr231rY: 
    case X86::VFNMADDPDr132r: 
    case X86::VFNMADDPDr132rY: 
    case X86::VFNMADDPDr213r: 
    case X86::VFNMADDPDr213rY: 
    case X86::VFNMADDPDr231r: 
    case X86::VFNMADDPDr231rY: 
    case X86::VFNMADDPSr132r: 
    case X86::VFNMADDPSr132rY: 
    case X86::VFNMADDPSr213r: 
    case X86::VFNMADDPSr213rY: 
    case X86::VFNMADDPSr231r: 
    case X86::VFNMADDPSr231rY: 
    case X86::VFNMSUBPDr132r: 
    case X86::VFNMSUBPDr132rY: 
    case X86::VFNMSUBPDr213r: 
    case X86::VFNMSUBPDr213rY: 
    case X86::VFNMSUBPDr231r: 
    case X86::VFNMSUBPDr231rY: 
    case X86::VFNMSUBPSr132r: 
    case X86::VFNMSUBPSr132rY: 
    case X86::VFNMSUBPSr213r: 
    case X86::VFNMSUBPSr213rY: 
    case X86::VFNMSUBPSr231r: 
    case X86::VFNMSUBPSr231rY: 
    case X86::VFsANDNPDrr: 
    case X86::VFsANDNPSrr: 
    case X86::VFsANDPDrr: 
    case X86::VFsANDPSrr: 
    case X86::VFsORPDrr: 
    case X86::VFsORPSrr: 
    case X86::VFsXORPDrr: 
    case X86::VFsXORPSrr: 
    case X86::VHADDPDYrr: 
    case X86::VHADDPDrr: 
    case X86::VHADDPSYrr: 
    case X86::VHADDPSrr: 
    case X86::VHSUBPDYrr: 
    case X86::VHSUBPDrr: 
    case X86::VHSUBPSYrr: 
    case X86::VHSUBPSrr: 
    case X86::VMAXPDYrr: 
    case X86::VMAXPDYrr_Int: 
    case X86::VMAXPDrr: 
    case X86::VMAXPDrr_Int: 
    case X86::VMAXPSYrr: 
    case X86::VMAXPSYrr_Int: 
    case X86::VMAXPSrr: 
    case X86::VMAXPSrr_Int: 
    case X86::VMAXSDrr: 
    case X86::VMAXSDrr_Int: 
    case X86::VMAXSSrr: 
    case X86::VMAXSSrr_Int: 
    case X86::VMINPDYrr: 
    case X86::VMINPDYrr_Int: 
    case X86::VMINPDrr: 
    case X86::VMINPDrr_Int: 
    case X86::VMINPSYrr: 
    case X86::VMINPSYrr_Int: 
    case X86::VMINPSrr: 
    case X86::VMINPSrr_Int: 
    case X86::VMINSDrr: 
    case X86::VMINSDrr_Int: 
    case X86::VMINSSrr: 
    case X86::VMINSSrr_Int: 
    case X86::VMOVHLPSrr: 
    case X86::VMOVLHPSrr: 
    case X86::VMOVSDrr: 
    case X86::VMOVSDrr_REV: 
    case X86::VMOVSSrr: 
    case X86::VMOVSSrr_REV: 
    case X86::VMULPDYrr: 
    case X86::VMULPDrr: 
    case X86::VMULPSYrr: 
    case X86::VMULPSrr: 
    case X86::VMULSDrr: 
    case X86::VMULSDrr_Int: 
    case X86::VMULSSrr: 
    case X86::VMULSSrr_Int: 
    case X86::VORPDYrr: 
    case X86::VORPDrr: 
    case X86::VORPSYrr: 
    case X86::VORPSrr: 
    case X86::VPACKSSDWrr: 
    case X86::VPACKSSWBrr: 
    case X86::VPACKUSDWrr: 
    case X86::VPACKUSWBrr: 
    case X86::VPADDBrr: 
    case X86::VPADDDrr: 
    case X86::VPADDQrr: 
    case X86::VPADDSBrr: 
    case X86::VPADDSWrr: 
    case X86::VPADDUSBrr: 
    case X86::VPADDUSWrr: 
    case X86::VPADDWrr: 
    case X86::VPANDNrr: 
    case X86::VPANDrr: 
    case X86::VPAVGBrr: 
    case X86::VPAVGWrr: 
    case X86::VPCMPEQBrr: 
    case X86::VPCMPEQDrr: 
    case X86::VPCMPEQQrr: 
    case X86::VPCMPEQWrr: 
    case X86::VPCMPESTRIArr: 
    case X86::VPCMPESTRICrr: 
    case X86::VPCMPESTRIOrr: 
    case X86::VPCMPESTRISrr: 
    case X86::VPCMPESTRIZrr: 
    case X86::VPCMPESTRIrr: 
    case X86::VPCMPESTRM128rr: 
    case X86::VPCMPGTBrr: 
    case X86::VPCMPGTDrr: 
    case X86::VPCMPGTQrr: 
    case X86::VPCMPGTWrr: 
    case X86::VPCMPISTRIArr: 
    case X86::VPCMPISTRICrr: 
    case X86::VPCMPISTRIOrr: 
    case X86::VPCMPISTRISrr: 
    case X86::VPCMPISTRIZrr: 
    case X86::VPCMPISTRIrr: 
    case X86::VPCMPISTRM128rr: 
    case X86::VPERMILPDYri: 
    case X86::VPERMILPDYrr: 
    case X86::VPERMILPDri: 
    case X86::VPERMILPDrr: 
    case X86::VPERMILPSYri: 
    case X86::VPERMILPSYrr: 
    case X86::VPERMILPSri: 
    case X86::VPERMILPSrr: 
    case X86::VPEXTRBrr: 
    case X86::VPEXTRBrr64: 
    case X86::VPEXTRDrr: 
    case X86::VPEXTRQrr: 
    case X86::VPEXTRWri: 
    case X86::VPHADDDrr128: 
    case X86::VPHADDSWrr128: 
    case X86::VPHADDWrr128: 
    case X86::VPHSUBDrr128: 
    case X86::VPHSUBSWrr128: 
    case X86::VPHSUBWrr128: 
    case X86::VPMADDUBSWrr128: 
    case X86::VPMADDWDrr: 
    case X86::VPMAXSBrr: 
    case X86::VPMAXSDrr: 
    case X86::VPMAXSWrr: 
    case X86::VPMAXUBrr: 
    case X86::VPMAXUDrr: 
    case X86::VPMAXUWrr: 
    case X86::VPMINSBrr: 
    case X86::VPMINSDrr: 
    case X86::VPMINSWrr: 
    case X86::VPMINUBrr: 
    case X86::VPMINUDrr: 
    case X86::VPMINUWrr: 
    case X86::VPMULDQrr: 
    case X86::VPMULHRSWrr128: 
    case X86::VPMULHUWrr: 
    case X86::VPMULHWrr: 
    case X86::VPMULLDrr: 
    case X86::VPMULLWrr: 
    case X86::VPMULUDQrr: 
    case X86::VPORrr: 
    case X86::VPSADBWrr: 
    case X86::VPSHUFBrr128: 
    case X86::VPSHUFDri: 
    case X86::VPSHUFHWri: 
    case X86::VPSHUFLWri: 
    case X86::VPSIGNBrr128: 
    case X86::VPSIGNDrr128: 
    case X86::VPSIGNWrr128: 
    case X86::VPSLLDQri: 
    case X86::VPSLLDri: 
    case X86::VPSLLDrr: 
    case X86::VPSLLQri: 
    case X86::VPSLLQrr: 
    case X86::VPSLLWri: 
    case X86::VPSLLWrr: 
    case X86::VPSRADri: 
    case X86::VPSRADrr: 
    case X86::VPSRAWri: 
    case X86::VPSRAWrr: 
    case X86::VPSRLDQri: 
    case X86::VPSRLDri: 
    case X86::VPSRLDrr: 
    case X86::VPSRLQri: 
    case X86::VPSRLQrr: 
    case X86::VPSRLWri: 
    case X86::VPSRLWrr: 
    case X86::VPSUBBrr: 
    case X86::VPSUBDrr: 
    case X86::VPSUBQrr: 
    case X86::VPSUBSBrr: 
    case X86::VPSUBSWrr: 
    case X86::VPSUBUSBrr: 
    case X86::VPSUBUSWrr: 
    case X86::VPSUBWrr: 
    case X86::VPUNPCKHBWrr: 
    case X86::VPUNPCKHDQrr: 
    case X86::VPUNPCKHQDQrr: 
    case X86::VPUNPCKHWDrr: 
    case X86::VPUNPCKLBWrr: 
    case X86::VPUNPCKLDQrr: 
    case X86::VPUNPCKLQDQrr: 
    case X86::VPUNPCKLWDrr: 
    case X86::VPXORrr: 
    case X86::VRCPSSr: 
    case X86::VROUNDPDr: 
    case X86::VROUNDPDr_AVX: 
    case X86::VROUNDPSr: 
    case X86::VROUNDPSr_AVX: 
    case X86::VROUNDYPDr: 
    case X86::VROUNDYPDr_AVX: 
    case X86::VROUNDYPSr: 
    case X86::VROUNDYPSr_AVX: 
    case X86::VRSQRTSSr: 
    case X86::VSQRTSDr: 
    case X86::VSQRTSSr: 
    case X86::VSUBPDYrr: 
    case X86::VSUBPDrr: 
    case X86::VSUBPSYrr: 
    case X86::VSUBPSrr: 
    case X86::VSUBSDrr: 
    case X86::VSUBSDrr_Int: 
    case X86::VSUBSSrr: 
    case X86::VSUBSSrr_Int: 
    case X86::VUNPCKHPDYrr: 
    case X86::VUNPCKHPDrr: 
    case X86::VUNPCKHPSYrr: 
    case X86::VUNPCKHPSrr: 
    case X86::VUNPCKLPDYrr: 
    case X86::VUNPCKLPDrr: 
    case X86::VUNPCKLPSYrr: 
    case X86::VUNPCKLPSrr: 
    case X86::VXORPDYrr: 
    case X86::VXORPDrr: 
    case X86::VXORPSYrr: 
    case X86::VXORPSrr: printOperand(MI, 2, O); break;
    case X86::ANDN32rm: 
    case X86::Int_VCVTSI2SDrm: 
    case X86::Int_VCVTSI2SSrm: 
    case X86::VCVTSI2SDLrm: 
    case X86::VCVTSI2SDrm: 
    case X86::VCVTSI2SSrm: printi32mem(MI, 2, O); break;
    case X86::ANDN64rm: 
    case X86::Int_VCVTSI2SD64rm: 
    case X86::Int_VCVTSI2SS64rm: 
    case X86::VCVTSI2SD64rm: 
    case X86::VCVTSI2SS64rm: printi64mem(MI, 2, O); break;
    case X86::BLENDPDrmi: 
    case X86::BLENDPSrmi: 
    case X86::CMPPDrmi_alt: 
    case X86::CMPPSrmi_alt: 
    case X86::CMPSDrm_alt: 
    case X86::CMPSSrm_alt: 
    case X86::DPPDrmi: 
    case X86::DPPSrmi: 
    case X86::INSERTPSrm: 
    case X86::MMX_PALIGNR64irm: 
    case X86::MMX_PINSRWirmi: 
    case X86::MPSADBWrmi: 
    case X86::PALIGNR128rm: 
    case X86::PBLENDWrmi: 
    case X86::PCLMULQDQrm: 
    case X86::PINSRDrm: 
    case X86::PINSRQrm: 
    case X86::PINSRWrmi: 
    case X86::ROUNDSDm: 
    case X86::ROUNDSSm: 
    case X86::SHUFPDrmi: 
    case X86::SHUFPSrmi: printOperand(MI, 7, O); break;
    case X86::BLENDPDrri: 
    case X86::BLENDPSrri: 
    case X86::CMPPDrri_alt: 
    case X86::CMPPSrri_alt: 
    case X86::CMPSDrr_alt: 
    case X86::CMPSSrr_alt: 
    case X86::DPPDrri: 
    case X86::DPPSrri: 
    case X86::INSERTPSrr: 
    case X86::MMX_PALIGNR64irr: 
    case X86::MMX_PINSRWirri: 
    case X86::MPSADBWrri: 
    case X86::PALIGNR128rr: 
    case X86::PBLENDWrri: 
    case X86::PCLMULQDQrr: 
    case X86::PINSRBrr: 
    case X86::PINSRDrr: 
    case X86::PINSRQrr: 
    case X86::PINSRWrri: 
    case X86::ROUNDSDr: 
    case X86::ROUNDSSr: 
    case X86::SHLD16rri8: 
    case X86::SHLD32rri8: 
    case X86::SHLD64rri8: 
    case X86::SHRD16rri8: 
    case X86::SHRD32rri8: 
    case X86::SHRD64rri8: 
    case X86::SHUFPDrri: 
    case X86::SHUFPSrri: printOperand(MI, 3, O); break;
    case X86::Int_VCMPSDrm: 
    case X86::Int_VCMPSSrm: 
    case X86::Int_VCVTSS2SDrm: 
    case X86::VADDSSrm: 
    case X86::VADDSSrm_Int: 
    case X86::VCMPSSrm: 
    case X86::VCVTSS2SDrm: 
    case X86::VDIVSSrm: 
    case X86::VDIVSSrm_Int: 
    case X86::VMAXSSrm: 
    case X86::VMAXSSrm_Int: 
    case X86::VMINSSrm: 
    case X86::VMINSSrm_Int: 
    case X86::VMULSSrm: 
    case X86::VMULSSrm_Int: 
    case X86::VRCPSSm: 
    case X86::VRSQRTSSm: 
    case X86::VSQRTSSm: 
    case X86::VSUBSSrm: 
    case X86::VSUBSSrm_Int: printf32mem(MI, 2, O); break;
    case X86::Int_VCVTSD2SSrm: 
    case X86::VADDSDrm: 
    case X86::VADDSDrm_Int: 
    case X86::VCMPSDrm: 
    case X86::VCVTSD2SSrm: 
    case X86::VDIVSDrm: 
    case X86::VDIVSDrm_Int: 
    case X86::VMAXSDrm: 
    case X86::VMAXSDrm_Int: 
    case X86::VMINSDrm: 
    case X86::VMINSDrm_Int: 
    case X86::VMOVHPDrm: 
    case X86::VMOVHPSrm: 
    case X86::VMOVLPDrm: 
    case X86::VMOVLPSrm: 
    case X86::VMULSDrm: 
    case X86::VMULSDrm_Int: 
    case X86::VSQRTSDm: 
    case X86::VSQRTSDm_Int: 
    case X86::VSUBSDrm: 
    case X86::VSUBSDrm_Int: printf64mem(MI, 2, O); break;
    case X86::VADDPDYrm: 
    case X86::VADDPSYrm: 
    case X86::VADDSUBPDYrm: 
    case X86::VADDSUBPSYrm: 
    case X86::VANDNPDYrm: 
    case X86::VANDNPSYrm: 
    case X86::VANDPDYrm: 
    case X86::VANDPSYrm: 
    case X86::VDIVPDYrm: 
    case X86::VDIVPSYrm: 
    case X86::VFMADDPDr132mY: 
    case X86::VFMADDPDr213mY: 
    case X86::VFMADDPDr231mY: 
    case X86::VFMADDPSr132mY: 
    case X86::VFMADDPSr213mY: 
    case X86::VFMADDPSr231mY: 
    case X86::VFMADDSUBPDr132mY: 
    case X86::VFMADDSUBPDr213mY: 
    case X86::VFMADDSUBPDr231mY: 
    case X86::VFMADDSUBPSr132mY: 
    case X86::VFMADDSUBPSr213mY: 
    case X86::VFMADDSUBPSr231mY: 
    case X86::VFMSUBADDPDr132mY: 
    case X86::VFMSUBADDPDr213mY: 
    case X86::VFMSUBADDPDr231mY: 
    case X86::VFMSUBADDPSr132mY: 
    case X86::VFMSUBADDPSr213mY: 
    case X86::VFMSUBADDPSr231mY: 
    case X86::VFMSUBPDr132mY: 
    case X86::VFMSUBPDr213mY: 
    case X86::VFMSUBPDr231mY: 
    case X86::VFMSUBPSr132mY: 
    case X86::VFMSUBPSr213mY: 
    case X86::VFMSUBPSr231mY: 
    case X86::VFNMADDPDr132mY: 
    case X86::VFNMADDPDr213mY: 
    case X86::VFNMADDPDr231mY: 
    case X86::VFNMADDPSr132mY: 
    case X86::VFNMADDPSr213mY: 
    case X86::VFNMADDPSr231mY: 
    case X86::VFNMSUBPDr132mY: 
    case X86::VFNMSUBPDr213mY: 
    case X86::VFNMSUBPDr231mY: 
    case X86::VFNMSUBPSr132mY: 
    case X86::VFNMSUBPSr213mY: 
    case X86::VFNMSUBPSr231mY: 
    case X86::VHADDPDYrm: 
    case X86::VHADDPSYrm: 
    case X86::VHSUBPDYrm: 
    case X86::VHSUBPSYrm: 
    case X86::VMASKMOVPDYrm: 
    case X86::VMASKMOVPSYrm: 
    case X86::VMAXPDYrm: 
    case X86::VMAXPDYrm_Int: 
    case X86::VMAXPSYrm: 
    case X86::VMAXPSYrm_Int: 
    case X86::VMINPDYrm: 
    case X86::VMINPDYrm_Int: 
    case X86::VMINPSYrm: 
    case X86::VMINPSYrm_Int: 
    case X86::VMULPDYrm: 
    case X86::VMULPSYrm: 
    case X86::VORPDYrm: 
    case X86::VORPSYrm: 
    case X86::VSUBPDYrm: 
    case X86::VSUBPSYrm: 
    case X86::VUNPCKHPDYrm: 
    case X86::VUNPCKHPSYrm: 
    case X86::VUNPCKLPDYrm: 
    case X86::VUNPCKLPSYrm: 
    case X86::VXORPDYrm: 
    case X86::VXORPSYrm: printf256mem(MI, 2, O); break;
    case X86::VADDPDrm: 
    case X86::VADDPSrm: 
    case X86::VADDSUBPDrm: 
    case X86::VADDSUBPSrm: 
    case X86::VANDNPDrm: 
    case X86::VANDNPSrm: 
    case X86::VANDPDrm: 
    case X86::VANDPSrm: 
    case X86::VCMPPDYrmi: 
    case X86::VCMPPDrmi: 
    case X86::VCMPPSYrmi: 
    case X86::VCMPPSrmi: 
    case X86::VDIVPDrm: 
    case X86::VDIVPSrm: 
    case X86::VFMADDPDr132m: 
    case X86::VFMADDPDr213m: 
    case X86::VFMADDPDr231m: 
    case X86::VFMADDPSr132m: 
    case X86::VFMADDPSr213m: 
    case X86::VFMADDPSr231m: 
    case X86::VFMADDSUBPDr132m: 
    case X86::VFMADDSUBPDr213m: 
    case X86::VFMADDSUBPDr231m: 
    case X86::VFMADDSUBPSr132m: 
    case X86::VFMADDSUBPSr213m: 
    case X86::VFMADDSUBPSr231m: 
    case X86::VFMSUBADDPDr132m: 
    case X86::VFMSUBADDPDr213m: 
    case X86::VFMSUBADDPDr231m: 
    case X86::VFMSUBADDPSr132m: 
    case X86::VFMSUBADDPSr213m: 
    case X86::VFMSUBADDPSr231m: 
    case X86::VFMSUBPDr132m: 
    case X86::VFMSUBPDr213m: 
    case X86::VFMSUBPDr231m: 
    case X86::VFMSUBPSr132m: 
    case X86::VFMSUBPSr213m: 
    case X86::VFMSUBPSr231m: 
    case X86::VFNMADDPDr132m: 
    case X86::VFNMADDPDr213m: 
    case X86::VFNMADDPDr231m: 
    case X86::VFNMADDPSr132m: 
    case X86::VFNMADDPSr213m: 
    case X86::VFNMADDPSr231m: 
    case X86::VFNMSUBPDr132m: 
    case X86::VFNMSUBPDr213m: 
    case X86::VFNMSUBPDr231m: 
    case X86::VFNMSUBPSr132m: 
    case X86::VFNMSUBPSr213m: 
    case X86::VFNMSUBPSr231m: 
    case X86::VFsANDNPDrm: 
    case X86::VFsANDNPSrm: 
    case X86::VFsANDPDrm: 
    case X86::VFsANDPSrm: 
    case X86::VFsORPDrm: 
    case X86::VFsORPSrm: 
    case X86::VFsXORPDrm: 
    case X86::VFsXORPSrm: 
    case X86::VHADDPDrm: 
    case X86::VHADDPSrm: 
    case X86::VHSUBPDrm: 
    case X86::VHSUBPSrm: 
    case X86::VMASKMOVPDrm: 
    case X86::VMASKMOVPSrm: 
    case X86::VMAXPDrm: 
    case X86::VMAXPDrm_Int: 
    case X86::VMAXPSrm: 
    case X86::VMAXPSrm_Int: 
    case X86::VMINPDrm: 
    case X86::VMINPDrm_Int: 
    case X86::VMINPSrm: 
    case X86::VMINPSrm_Int: 
    case X86::VMULPDrm: 
    case X86::VMULPSrm: 
    case X86::VORPDrm: 
    case X86::VORPSrm: 
    case X86::VSUBPDrm: 
    case X86::VSUBPSrm: 
    case X86::VUNPCKHPDrm: 
    case X86::VUNPCKHPSrm: 
    case X86::VUNPCKLPDrm: 
    case X86::VUNPCKLPSrm: 
    case X86::VXORPDrm: 
    case X86::VXORPSrm: printf128mem(MI, 2, O); break;
    case X86::VAESDECLASTrm: 
    case X86::VAESDECrm: 
    case X86::VAESENCLASTrm: 
    case X86::VAESENCrm: 
    case X86::VPACKSSDWrm: 
    case X86::VPACKSSWBrm: 
    case X86::VPACKUSDWrm: 
    case X86::VPACKUSWBrm: 
    case X86::VPADDBrm: 
    case X86::VPADDDrm: 
    case X86::VPADDQrm: 
    case X86::VPADDSBrm: 
    case X86::VPADDSWrm: 
    case X86::VPADDUSBrm: 
    case X86::VPADDUSWrm: 
    case X86::VPADDWrm: 
    case X86::VPANDNrm: 
    case X86::VPANDrm: 
    case X86::VPAVGBrm: 
    case X86::VPAVGWrm: 
    case X86::VPCMPEQBrm: 
    case X86::VPCMPEQDrm: 
    case X86::VPCMPEQQrm: 
    case X86::VPCMPEQWrm: 
    case X86::VPCMPGTBrm: 
    case X86::VPCMPGTDrm: 
    case X86::VPCMPGTQrm: 
    case X86::VPCMPGTWrm: 
    case X86::VPERMILPDrm: 
    case X86::VPERMILPSrm: 
    case X86::VPHADDDrm128: 
    case X86::VPHADDSWrm128: 
    case X86::VPHADDWrm128: 
    case X86::VPHSUBDrm128: 
    case X86::VPHSUBSWrm128: 
    case X86::VPHSUBWrm128: 
    case X86::VPMADDUBSWrm128: 
    case X86::VPMADDWDrm: 
    case X86::VPMAXSBrm: 
    case X86::VPMAXSDrm: 
    case X86::VPMAXSWrm: 
    case X86::VPMAXUBrm: 
    case X86::VPMAXUDrm: 
    case X86::VPMAXUWrm: 
    case X86::VPMINSBrm: 
    case X86::VPMINSDrm: 
    case X86::VPMINSWrm: 
    case X86::VPMINUBrm: 
    case X86::VPMINUDrm: 
    case X86::VPMINUWrm: 
    case X86::VPMULDQrm: 
    case X86::VPMULHRSWrm128: 
    case X86::VPMULHUWrm: 
    case X86::VPMULHWrm: 
    case X86::VPMULLDrm: 
    case X86::VPMULLWrm: 
    case X86::VPMULUDQrm: 
    case X86::VPORrm: 
    case X86::VPSADBWrm: 
    case X86::VPSHUFBrm128: 
    case X86::VPSIGNBrm128: 
    case X86::VPSIGNDrm128: 
    case X86::VPSIGNWrm128: 
    case X86::VPSLLDrm: 
    case X86::VPSLLQrm: 
    case X86::VPSLLWrm: 
    case X86::VPSRADrm: 
    case X86::VPSRAWrm: 
    case X86::VPSRLDrm: 
    case X86::VPSRLQrm: 
    case X86::VPSRLWrm: 
    case X86::VPSUBBrm: 
    case X86::VPSUBDrm: 
    case X86::VPSUBQrm: 
    case X86::VPSUBSBrm: 
    case X86::VPSUBSWrm: 
    case X86::VPSUBUSBrm: 
    case X86::VPSUBUSWrm: 
    case X86::VPSUBWrm: 
    case X86::VPUNPCKHBWrm: 
    case X86::VPUNPCKHDQrm: 
    case X86::VPUNPCKHQDQrm: 
    case X86::VPUNPCKHWDrm: 
    case X86::VPUNPCKLBWrm: 
    case X86::VPUNPCKLDQrm: 
    case X86::VPUNPCKLQDQrm: 
    case X86::VPUNPCKLWDrm: 
    case X86::VPXORrm: printi128mem(MI, 2, O); break;
    case X86::VPERMILPDYrm: 
    case X86::VPERMILPSYrm: printi256mem(MI, 2, O); break;
    }
    return;
    break;
  case X86::VAARG_64:
    printOperand(MI, 6, O); 
    O << ", "; 
    printOperand(MI, 7, O); 
    O << ", "; 
    printOperand(MI, 8, O); 
    return;
    break;
  case X86::VBLENDPDYrmi:
  case X86::VBLENDPDrmi:
  case X86::VBLENDPSYrmi:
  case X86::VBLENDPSrmi:
  case X86::VBLENDVPDYrm:
  case X86::VBLENDVPDrm:
  case X86::VBLENDVPSYrm:
  case X86::VBLENDVPSrm:
  case X86::VCMPPDYrmi_alt:
  case X86::VCMPPDrmi_alt:
  case X86::VCMPPSYrmi_alt:
  case X86::VCMPPSrmi_alt:
  case X86::VCMPSDrm_alt:
  case X86::VCMPSSrm_alt:
  case X86::VDPPDrmi:
  case X86::VDPPSYrmi:
  case X86::VDPPSrmi:
  case X86::VINSERTF128rm:
  case X86::VINSERTPSrm:
  case X86::VMPSADBWrmi:
  case X86::VPALIGNR128rm:
  case X86::VPBLENDVBrm:
  case X86::VPBLENDWrmi:
  case X86::VPCLMULQDQrm:
  case X86::VPERM2F128rm:
  case X86::VPINSRBrm:
  case X86::VPINSRDrm:
  case X86::VPINSRQrm:
  case X86::VPINSRWrmi:
  case X86::VROUNDSDm:
  case X86::VROUNDSDm_AVX:
  case X86::VROUNDSSm:
  case X86::VROUNDSSm_AVX:
  case X86::VSHUFPDYrmi:
  case X86::VSHUFPDrmi:
  case X86::VSHUFPSYrmi:
  case X86::VSHUFPSrmi:
    switch (MI->getOpcode()) {
    case X86::VBLENDPDYrmi: 
    case X86::VBLENDPSYrmi: 
    case X86::VBLENDVPDYrm: 
    case X86::VBLENDVPSYrm: 
    case X86::VDPPSYrmi: printi256mem(MI, 2, O); break;
    case X86::VBLENDPDrmi: 
    case X86::VBLENDPSrmi: 
    case X86::VBLENDVPDrm: 
    case X86::VBLENDVPSrm: 
    case X86::VDPPDrmi: 
    case X86::VDPPSrmi: 
    case X86::VMPSADBWrmi: 
    case X86::VPALIGNR128rm: 
    case X86::VPBLENDVBrm: 
    case X86::VPBLENDWrmi: 
    case X86::VPCLMULQDQrm: printi128mem(MI, 2, O); break;
    case X86::VCMPPDYrmi_alt: 
    case X86::VCMPPDrmi_alt: 
    case X86::VCMPPSYrmi_alt: 
    case X86::VCMPPSrmi_alt: 
    case X86::VINSERTF128rm: 
    case X86::VSHUFPDYrmi: 
    case X86::VSHUFPDrmi: 
    case X86::VSHUFPSYrmi: 
    case X86::VSHUFPSrmi: printf128mem(MI, 2, O); break;
    case X86::VCMPSDrm_alt: 
    case X86::VROUNDSDm: 
    case X86::VROUNDSDm_AVX: printf64mem(MI, 2, O); break;
    case X86::VCMPSSrm_alt: 
    case X86::VINSERTPSrm: 
    case X86::VROUNDSSm: 
    case X86::VROUNDSSm_AVX: printf32mem(MI, 2, O); break;
    case X86::VPERM2F128rm: printf256mem(MI, 2, O); break;
    case X86::VPINSRBrm: printi8mem(MI, 2, O); break;
    case X86::VPINSRDrm: printi32mem(MI, 2, O); break;
    case X86::VPINSRQrm: printi64mem(MI, 2, O); break;
    case X86::VPINSRWrmi: printi16mem(MI, 2, O); break;
    }
    O << ", "; 
    printOperand(MI, 7, O); 
    return;
    break;
  case X86::VBLENDPDYrri:
  case X86::VBLENDPDrri:
  case X86::VBLENDPSYrri:
  case X86::VBLENDPSrri:
  case X86::VBLENDVPDYrr:
  case X86::VBLENDVPDrr:
  case X86::VBLENDVPSYrr:
  case X86::VBLENDVPSrr:
  case X86::VCMPPDYrri_alt:
  case X86::VCMPPDrri_alt:
  case X86::VCMPPSYrri_alt:
  case X86::VCMPPSrri_alt:
  case X86::VCMPSDrr_alt:
  case X86::VCMPSSrr_alt:
  case X86::VDPPDrri:
  case X86::VDPPSYrri:
  case X86::VDPPSrri:
  case X86::VINSERTF128rr:
  case X86::VINSERTPSrr:
  case X86::VMPSADBWrri:
  case X86::VPALIGNR128rr:
  case X86::VPBLENDVBrr:
  case X86::VPBLENDWrri:
  case X86::VPCLMULQDQrr:
  case X86::VPERM2F128rr:
  case X86::VPINSRBrr:
  case X86::VPINSRDrr:
  case X86::VPINSRQrr:
  case X86::VPINSRWrr64i:
  case X86::VPINSRWrri:
  case X86::VROUNDSDr:
  case X86::VROUNDSDr_AVX:
  case X86::VROUNDSSr:
  case X86::VROUNDSSr_AVX:
  case X86::VSHUFPDYrri:
  case X86::VSHUFPDrri:
  case X86::VSHUFPSYrri:
  case X86::VSHUFPSrri:
    printOperand(MI, 2, O); 
    O << ", "; 
    printOperand(MI, 3, O); 
    return;
    break;
  }
  return;
}


/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description.  This returns the assembler name
/// for the specified register.
const char *X86IntelInstPrinter::getRegisterName(unsigned RegNo) {
  assert(RegNo && RegNo < 160 && "Invalid register number!");

  static const unsigned RegAsmOffset[] = {
    0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 35, 39, 43,
    47, 51, 55, 59, 63, 67, 71, 76, 81, 86, 91, 96, 101, 104,
    107, 110, 113, 117, 120, 124, 128, 132, 136, 140, 144, 148, 152, 155,
    158, 162, 166, 170, 174, 178, 182, 188, 192, 196, 199, 203, 207, 211,
    215, 219, 223, 227, 231, 235, 238, 241, 244, 248, 252, 256, 260, 264,
    268, 272, 276, 279, 283, 287, 291, 294, 298, 302, 306, 310, 315, 320,
    325, 329, 334, 339, 344, 348, 353, 358, 363, 367, 372, 377, 382, 386,
    391, 396, 401, 405, 410, 415, 420, 424, 428, 432, 436, 440, 444, 448,
    452, 456, 460, 463, 467, 470, 474, 477, 483, 489, 495, 501, 507, 513,
    519, 525, 530, 535, 540, 545, 550, 555, 560, 565, 570, 575, 581, 587,
    593, 599, 605, 611, 616, 621, 626, 631, 636, 641, 646, 651, 656, 661,
    667, 673, 679, 685, 691, 0
  };

  const char *AsmStrs =
    "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1"
    "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cr9\000cr10\000cr1"
    "1\000cr12\000cr13\000cr14\000cr15\000cs\000cx\000dh\000di\000dil\000dl\000"
    "dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7\000ds\000dx\000eax"
    "\000ebp\000ebx\000ecx\000edi\000edx\000flags\000eip\000eiz\000es\000esi"
    "\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp6\000fs\000gs\000"
    "ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000mm7\000r8\000r8b"
    "\000r8d\000r8w\000r9\000r9b\000r9d\000r9w\000r10\000r10b\000r10d\000r10"
    "w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000r12d\000r12w\000r13\000"
    "r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r14w\000r15\000r15b\000r"
    "15d\000r15w\000rax\000rbp\000rbx\000rcx\000rdi\000rdx\000rip\000riz\000"
    "rsi\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st(1)\000st(2)\000"
    "st(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xmm1\000xmm2\000xm"
    "m3\000xmm4\000xmm5\000xmm6\000xmm7\000xmm8\000xmm9\000xmm10\000xmm11\000"
    "xmm12\000xmm13\000xmm14\000xmm15\000ymm0\000ymm1\000ymm2\000ymm3\000ymm"
    "4\000ymm5\000ymm6\000ymm7\000ymm8\000ymm9\000ymm10\000ymm11\000ymm12\000"
    "ymm13\000ymm14\000ymm15\000";
  assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&
          "Invalid alt name index for register!");
  return AsmStrs+RegAsmOffset[RegNo-1];
}


#ifdef GET_INSTRUCTION_NAME
#undef GET_INSTRUCTION_NAME

/// getInstructionName: This method is automatically generated by tblgen
/// from the instruction set description.  This returns the enum name of the
/// specified instruction.
const char *X86IntelInstPrinter::getInstructionName(unsigned Opcode) {
  assert(Opcode < 3807 && "Invalid instruction number!");

  static const unsigned InstAsmOffset[] = {
    0, 4, 14, 27, 36, 45, 50, 65, 79, 92, 106, 123, 133, 146, 
    151, 155, 162, 169, 173, 179, 188, 197, 206, 222, 238, 254, 269, 278, 
    286, 295, 303, 311, 320, 328, 336, 348, 357, 365, 374, 382, 390, 399, 
    407, 415, 427, 436, 446, 455, 463, 473, 482, 490, 498, 510, 517, 524, 
    531, 538, 545, 552, 563, 572, 580, 589, 597, 605, 614, 626, 637, 645, 
    653, 664, 676, 685, 693, 702, 710, 718, 727, 739, 750, 758, 766, 777, 
    789, 798, 808, 817, 825, 835, 848, 857, 869, 877, 885, 896, 908, 915, 
    922, 929, 936, 943, 950, 961, 969, 977, 985, 993, 1001, 1013, 1021, 1033, 
    1041, 1053, 1061, 1073, 1084, 1095, 1106, 1117, 1126, 1135, 1145, 1155, 1166, 1176, 
    1185, 1195, 1204, 1214, 1226, 1235, 1247, 1259, 1272, 1285, 1298, 1311, 1324, 1337, 
    1347, 1366, 1385, 1402, 1419, 1432, 1445, 1454, 1463, 1476, 1489, 1498, 1507, 1516, 
    1525, 1546, 1567, 1576, 1584, 1593, 1601, 1609, 1618, 1626, 1634, 1646, 1655, 1663, 
    1672, 1680, 1688, 1697, 1705, 1713, 1725, 1734, 1744, 1753, 1761, 1771, 1780, 1788, 
    1796, 1808, 1815, 1822, 1829, 1836, 1843, 1850, 1861, 1870, 1879, 1888, 1897, 1906, 
    1915, 1924, 1933, 1941, 1949, 1957, 1965, 1974, 1983, 1995, 2005, 2015, 2025, 2037, 
    2046, 2056, 2066, 2076, 2086, 2096, 2106, 2117, 2128, 2139, 2152, 2162, 2171, 2180, 
    2189, 2200, 2208, 2220, 2233, 2244, 2255, 2266, 2277, 2288, 2299, 2309, 2319, 2329, 
    2341, 2350, 2362, 2374, 2389, 2400, 2411, 2422, 2433, 2445, 2457, 2469, 2481, 2492, 
    2503, 2511, 2519, 2527, 2535, 2543, 2551, 2559, 2567, 2575, 2583, 2591, 2599, 2608, 
    2617, 2625, 2632, 2640, 2647, 2655, 2662, 2670, 2677, 2685, 2692, 2700, 2707, 2716, 
    2724, 2733, 2741, 2750, 2758, 2767, 2775, 2784, 2792, 2801, 2809, 2818, 2826, 2835, 
    2843, 2852, 2860, 2869, 2877, 2886, 2894, 2903, 2911, 2920, 2928, 2937, 2945, 2954, 
    2962, 2971, 2979, 2988, 2996, 3005, 3013, 3021, 3029, 3037, 3051, 3059, 3071, 3083, 
    3087, 3091, 3096, 3102, 3111, 3120, 3129, 3133, 3137, 3145, 3149, 3154, 3158, 3168, 
    3178, 3188, 3198, 3208, 3218, 3229, 3240, 3251, 3262, 3273, 3284, 3294, 3304, 3314, 
    3324, 3334, 3344, 3355, 3366, 3377, 3388, 3399, 3410, 3419, 3431, 3443, 3455, 3463, 
    3474, 3485, 3496, 3506, 3516, 3526, 3536, 3546, 3556, 3564, 3575, 3586, 3597, 3607, 
    3617, 3627, 3637, 3647, 3657, 3668, 3679, 3690, 3701, 3712, 3723, 3733, 3743, 3753, 
    3763, 3773, 3783, 3794, 3805, 3816, 3827, 3838, 3849, 3859, 3872, 3885, 3898, 3907, 
    3919, 3931, 3943, 3954, 3965, 3976, 3987, 3998, 4009, 4018, 4030, 4042, 4054, 4065, 
    4076, 4087, 4098, 4109, 4120, 4131, 4142, 4153, 4164, 4175, 4186, 4195, 4207, 4219, 
    4231, 4242, 4253, 4264, 4275, 4286, 4297, 4307, 4317, 4327, 4337, 4347, 4357, 4367, 
    4377, 4387, 4397, 4407, 4417, 4425, 4436, 4447, 4458, 4468, 4478, 4488, 4498, 4508, 
    4518, 4528, 4538, 4548, 4558, 4567, 4578, 4589, 4600, 4611, 4622, 4633, 4644, 4655, 
    4666, 4675, 4683, 4692, 4700, 4708, 4717, 4725, 4733, 4745, 4754, 4762, 4771, 4779, 
    4787, 4796, 4804, 4812, 4824, 4833, 4843, 4852, 4860, 4870, 4879, 4887, 4895, 4907, 
    4914, 4921, 4928, 4935, 4942, 4949, 4960, 4969, 4982, 4991, 5004, 5013, 5026, 5035, 
    5048, 5055, 5062, 5069, 5075, 5083, 5095, 5103, 5115, 5123, 5135, 5143, 5155, 5166, 
    5178, 5190, 5202, 5214, 5226, 5238, 5248, 5259, 5270, 5279, 5288, 5297, 5306, 5317, 
    5326, 5334, 5344, 5350, 5359, 5368, 5377, 5383, 5387, 5399, 5411, 5422, 5434, 5446, 
    5457, 5469, 5480, 5492, 5503, 5513, 5524, 5535, 5546, 5557, 5568, 5579, 5590, 5601, 
    5612, 5623, 5634, 5645, 5658, 5671, 5682, 5693, 5704, 5715, 5728, 5741, 5752, 5763, 
    5776, 5789, 5800, 5811, 5822, 5833, 5846, 5859, 5870, 5881, 5893, 5905, 5917, 5929, 
    5943, 5957, 5969, 5981, 5995, 6009, 6021, 6033, 6037, 6042, 6046, 6050, 6064, 6071, 
    6078, 6085, 6092, 6102, 6112, 6122, 6132, 6139, 6146, 6152, 6158, 6165, 6172, 6179, 
    6186, 6193, 6200, 6206, 6212, 6220, 6228, 6236, 6244, 6254, 6264, 6275, 6286, 6298, 
    6309, 6320, 6331, 6344, 6357, 6370, 6384, 6398, 6412, 6426, 6440, 6454, 6465, 6473, 
    6485, 6493, 6505, 6513, 6525, 6533, 6545, 6554, 6563, 6573, 6583, 6594, 6604, 6613, 
    6623, 6632, 6642, 6654, 6663, 6675, 6687, 6700, 6713, 6726, 6739, 6752, 6765, 6775, 
    6783, 6791, 6799, 6807, 6817, 6827, 6839, 6845, 6855, 6867, 6879, 6885, 6896, 6907, 
    6918, 6929, 6939, 6949, 6959, 6969, 6979, 6988, 6994, 7001, 7009, 7017, 7026, 7035, 
    7042, 7050, 7056, 7062, 7071, 7080, 7090, 7100, 7108, 7117, 7125, 7132, 7139, 7146, 
    7153, 7159, 7166, 7173, 7178, 7188, 7197, 7205, 7226, 7247, 7268, 7289, 7310, 7331, 
    7352, 7373, 7394, 7401, 7407, 7414, 7420, 7428, 7436, 7443, 7450, 7458, 7466, 7476, 
    7481, 7489, 7499, 7506, 7515, 7523, 7529, 7537, 7550, 7561, 7572, 7583, 7594, 7604, 
    7614, 7624, 7634, 7643, 7652, 7663, 7674, 7685, 7696, 7705, 7714, 7723, 7732, 7744, 
    7756, 7768, 7780, 7790, 7800, 7810, 7820, 7830, 7839, 7848, 7857, 7866, 7870, 7879, 
    7888, 7897, 7906, 7914, 7922, 7930, 7938, 7946, 7954, 7961, 7968, 7977, 7986, 7995, 
    8007, 8019, 8031, 8043, 8055, 8067, 8079, 8091, 8103, 8111, 8119, 8128, 8138, 8149, 
    8158, 8168, 8179, 8187, 8195, 8204, 8214, 8225, 8234, 8244, 8255, 8263, 8271, 8280, 
    8292, 8303, 8312, 8324, 8335, 8342, 8349, 8354, 8361, 8368, 8373, 8380, 8387, 8391, 
    8397, 8403, 8410, 8417, 8424, 8431, 8441, 8451, 8461, 8471, 8478, 8485, 8491, 8497, 
    8508, 8519, 8523, 8528, 8533, 8538, 8547, 8556, 8563, 8573, 8583, 8590, 8597, 8604, 
    8615, 8626, 8637, 8650, 8663, 8676, 8689, 8702, 8715, 8728, 8741, 8754, 8763, 8772, 
    8782, 8792, 8802, 8814, 8826, 8838, 8850, 8862, 8874, 8886, 8898, 8910, 8922, 8934, 
    8946, 8958, 8971, 8984, 8997, 9010, 9025, 9040, 9055, 9070, 9085, 9100, 9115, 9130, 
    9145, 9160, 9175, 9190, 9205, 9220, 9237, 9254, 9269, 9284, 9301, 9318, 9333, 9348, 
    9363, 9378, 9396, 9414, 9430, 9446, 9464, 9482, 9498, 9514, 9529, 9551, 9565, 9579, 
    9593, 9607, 9620, 9633, 9646, 9659, 9673, 9687, 9701, 9715, 9731, 9747, 9763, 9779, 
    9795, 9811, 9827, 9843, 9859, 9875, 9891, 9907, 9925, 9943, 9959, 9975, 9991, 10007, 
    10025, 10043, 10059, 10075, 10093, 10111, 10127, 10143, 10159, 10175, 10192, 10209, 10228, 10247, 
    10264, 10281, 10300, 10319, 10336, 10353, 10368, 10383, 10398, 10413, 10419, 10425, 10430, 10435, 
    10441, 10447, 10452, 10457, 10462, 10471, 10480, 10485, 10490, 10496, 10502, 10507, 10512, 10518, 
    10524, 10529, 10534, 10541, 10548, 10555, 10568, 10575, 10581, 10587, 10593, 10599, 10605, 10611, 
    10617, 10623, 10629, 10635, 10640, 10645, 10650, 10655, 10661, 10666, 10671, 10676, 10684, 10692, 
    10700, 10708, 10716, 10724, 10735, 10747, 10758, 10769, 10779, 10790, 10798, 10806, 10814, 10822, 
    10828, 10834, 10842, 10850, 10858, 10867, 10876, 10885, 10894, 10903, 10912, 10921, 10932, 10943, 
    10952, 10963, 10972, 10979, 10986, 10993, 11003, 11010, 11016, 11024, 11032, 11040, 11047, 11055, 
    11063, 11071, 11079, 11085, 11093, 11101, 11109, 11117, 11123, 11131, 11139, 11147, 11155, 11168, 
    11182, 11195, 11208, 11222, 11235, 11250, 11264, 11277, 11289, 11301, 11314, 11328, 11341, 11354, 
    11368, 11381, 11396, 11410, 11423, 11435, 11447, 11459, 11471, 11483, 11494, 11506, 11518, 11530, 
    11541, 11553, 11566, 11578, 11590, 11603, 11615, 11629, 11642, 11654, 11665, 11676, 11688, 11701, 
    11715, 11728, 11741, 11755, 11768, 11783, 11797, 11810, 11822, 11834, 11847, 11861, 11874, 11887, 
    11901, 11914, 11929, 11943, 11956, 11968, 11980, 11986, 11992, 11998, 12004, 12009, 12015, 12022, 
    12028, 12035, 12041, 12047, 12055, 12063, 12071, 12079, 12087, 12095, 12103, 12111, 12119, 12124, 
    12129, 12137, 12145, 12153, 12160, 12170, 12180, 12190, 12200, 12210, 12220, 12231, 12244, 12252, 
    12264, 12272, 12284, 12292, 12304, 12312, 12324, 12332, 12344, 12352, 12364, 12372, 12384, 12392, 
    12404, 12411, 12419, 12431, 12439, 12451, 12459, 12471, 12479, 12491, 12499, 12511, 12519, 12531, 
    12539, 12551, 12559, 12571, 12587, 12603, 12619, 12635, 12651, 12667, 12683, 12699, 12716, 12733, 
    12750, 12767, 12776, 12789, 12804, 12823, 12837, 12850, 12863, 12876, 12893, 12910, 12924, 12940, 
    12953, 12967, 12983, 12996, 13009, 13022, 13039, 13056, 13070, 13084, 13098, 13112, 13126, 13140, 
    13156, 13172, 13188, 13204, 13220, 13236, 13249, 13262, 13275, 13288, 13301, 13314, 13328, 13342, 
    13356, 13370, 13385, 13400, 13415, 13430, 13443, 13456, 13473, 13490, 13503, 13516, 13528, 13540, 
    13553, 13566, 13579, 13592, 13607, 13622, 13637, 13652, 13667, 13682, 13697, 13712, 13727, 13742, 
    13757, 13772, 13787, 13803, 13819, 13834, 13849, 13863, 13877, 13892, 13907, 13923, 13939, 13954, 
    13969, 13984, 13999, 14017, 14035, 14050, 14065, 14079, 14093, 14107, 14121, 14135, 14149, 14163, 
    14177, 14192, 14209, 14226, 14241, 14256, 14270, 14284, 14298, 14312, 14327, 14342, 14353, 14364, 
    14378, 14392, 14407, 14422, 14435, 14448, 14463, 14478, 14493, 14508, 14523, 14538, 14550, 14562, 
    14574, 14586, 14598, 14610, 14622, 14634, 14646, 14658, 14670, 14682, 14694, 14706, 14718, 14730, 
    14742, 14754, 14766, 14778, 14790, 14802, 14814, 14826, 14839, 14852, 14865, 14878, 14891, 14904, 
    14918, 14932, 14946, 14960, 14975, 14990, 15005, 15020, 15033, 15046, 15063, 15080, 15097, 15114, 
    15131, 15148, 15165, 15182, 15199, 15216, 15233, 15250, 15262, 15274, 15282, 15293, 15301, 15311, 
    15319, 15327, 15335, 15345, 15353, 15361, 15369, 15377, 15389, 15397, 15405, 15413, 15423, 15431, 
    15439, 15447, 15455, 15463, 15473, 15481, 15489, 15497, 15505, 15513, 15521, 15533, 15541, 15549, 
    15557, 15565, 15573, 15583, 15591, 15599, 15607, 15615, 15623, 15631, 15641, 15654, 15662, 15670, 
    15682, 15690, 15698, 15706, 15719, 15731, 15743, 15751, 15758, 15765, 15778, 15786, 15793, 15800, 
    15807, 15820, 15827, 15840, 15851, 15860, 15869, 15878, 15891, 15900, 15909, 15918, 15931, 15941, 
    15951, 15961, 15971, 15981, 15991, 16001, 16011, 16023, 16035, 16046, 16057, 16066, 16075, 16084, 
    16097, 16106, 16119, 16128, 16137, 16150, 16160, 16169, 16178, 16187, 16196, 16206, 16215, 16224, 
    16233, 16242, 16253, 16266, 16279, 16292, 16305, 16316, 16329, 16339, 16351, 16360, 16370, 16380, 
    16389, 16401, 16413, 16425, 16438, 16450, 16459, 16465, 16471, 16479, 16487, 16495, 16507, 16519, 
    16531, 16542, 16553, 16564, 16575, 16581, 16592, 16603, 16611, 16619, 16627, 16639, 16645, 16656, 
    16667, 16679, 16690, 16702, 16713, 16725, 16737, 16748, 16760, 16772, 16783, 16792, 16801, 16810, 
    16823, 16832, 16841, 16850, 16863, 16876, 16889, 16905, 16921, 16934, 16947, 16958, 16969, 16986, 
    17003, 17015, 17026, 17038, 17049, 17061, 17075, 17087, 17098, 17111, 17123, 17137, 17149, 17160, 
    17173, 17184, 17195, 17202, 17209, 17216, 17223, 17230, 17237, 17243, 17249, 17257, 17265, 17273, 
    17281, 17289, 17301, 17309, 17321, 17329, 17341, 17349, 17361, 17370, 17379, 17389, 17399, 17410, 
    17420, 17429, 17439, 17448, 17458, 17470, 17479, 17491, 17503, 17516, 17529, 17542, 17555, 17568, 
    17581, 17591, 17597, 17605, 17612, 17619, 17626, 17633, 17640, 17647, 17653, 17659, 17664, 17670, 
    17676, 17683, 17690, 17697, 17704, 17711, 17718, 17724, 17730, 17738, 17745, 17753, 17760, 17767, 
    17775, 17782, 17789, 17800, 17808, 17815, 17823, 17830, 17843, 17850, 17858, 17865, 17872, 17883, 
    17891, 17900, 17908, 17915, 17924, 17932, 17939, 17946, 17957, 17963, 17969, 17975, 17981, 17987, 
    17993, 18003, 18010, 18017, 18024, 18031, 18039, 18047, 18055, 18063, 18070, 18077, 18083, 18089, 
    18095, 18106, 18117, 18128, 18139, 18150, 18161, 18172, 18183, 18194, 18205, 18216, 18227, 18238, 
    18249, 18257, 18265, 18273, 18281, 18289, 18297, 18306, 18315, 18324, 18333, 18343, 18353, 18363, 
    18373, 18381, 18389, 18402, 18415, 18423, 18431, 18438, 18445, 18451, 18459, 18467, 18477, 18487, 
    18495, 18503, 18515, 18527, 18538, 18549, 18561, 18573, 18583, 18593, 18603, 18613, 18623, 18633, 
    18643, 18653, 18666, 18679, 18692, 18705, 18718, 18731, 18744, 18757, 18770, 18783, 18795, 18807, 
    18823, 18839, 18854, 18869, 18879, 18889, 18899, 18909, 18919, 18929, 18939, 18949, 18962, 18975, 
    18988, 19001, 19014, 19027, 19040, 19053, 19066, 19079, 19091, 19103, 19119, 19135, 19150, 19165, 
    19174, 19183, 19192, 19201, 19210, 19219, 19228, 19237, 19245, 19253, 19261, 19269, 19277, 19285, 
    19293, 19301, 19311, 19321, 19331, 19341, 19351, 19361, 19369, 19377, 19385, 19393, 19401, 19409, 
    19418, 19427, 19437, 19447, 19458, 19469, 19480, 19491, 19499, 19507, 19518, 19529, 19539, 19549, 
    19558, 19567, 19575, 19583, 19595, 19607, 19620, 19633, 19645, 19657, 19673, 19689, 19701, 19713, 
    19726, 19739, 19751, 19763, 19771, 19779, 19787, 19795, 19804, 19813, 19822, 19831, 19840, 19849, 
    19859, 19869, 19884, 19899, 19909, 19919, 19928, 19937, 19946, 19955, 19964, 19973, 19982, 19991, 
    20000, 20009, 20018, 20027, 20036, 20045, 20054, 20063, 20072, 20081, 20090, 20099, 20108, 20117, 
    20126, 20135, 20146, 20157, 20168, 20179, 20190, 20201, 20212, 20223, 20234, 20245, 20256, 20267, 
    20278, 20289, 20300, 20311, 20322, 20333, 20344, 20355, 20366, 20377, 20388, 20399, 20410, 20419, 
    20428, 20442, 20456, 20466, 20476, 20486, 20496, 20505, 20514, 20523, 20532, 20541, 20550, 20560, 
    20570, 20577, 20586, 20595, 20602, 20611, 20620, 20627, 20636, 20645, 20652, 20663, 20674, 20685, 
    20696, 20707, 20718, 20726, 20734, 20742, 20750, 20757, 20764, 20771, 20779, 20787, 20795, 20803, 
    20811, 20819, 20827, 20835, 20841, 20847, 20856, 20868, 20879, 20890, 20901, 20911, 20920, 20929, 
    20941, 20953, 20962, 20971, 20981, 20991, 21001, 21011, 21023, 21035, 21047, 21059, 21071, 21083, 
    21092, 21100, 21108, 21116, 21124, 21132, 21140, 21148, 21156, 21164, 21172, 21180, 21188, 21196, 
    21204, 21212, 21221, 21229, 21237, 21245, 21253, 21261, 21269, 21277, 21285, 21293, 21301, 21309, 
    21317, 21325, 21333, 21341, 21350, 21359, 21368, 21377, 21387, 21397, 21407, 21417, 21425, 21433, 
    21442, 21451, 21459, 21467, 21479, 21491, 21503, 21515, 21528, 21541, 21553, 21565, 21577, 21589, 
    21601, 21613, 21626, 21639, 21651, 21663, 21671, 21681, 21691, 21699, 21709, 21719, 21729, 21739, 
    21748, 21756, 21766, 21776, 21784, 21793, 21802, 21811, 21820, 21829, 21838, 21846, 21854, 21862, 
    21871, 21880, 21889, 21898, 21907, 21916, 21925, 21934, 21942, 21950, 21957, 21964, 21971, 21979, 
    21988, 21996, 22004, 22013, 22021, 22029, 22038, 22046, 22054, 22063, 22071, 22079, 22088, 22096, 
    22104, 22113, 22121, 22128, 22136, 22143, 22150, 22158, 22165, 22172, 22183, 22190, 22201, 22208, 
    22219, 22226, 22237, 22245, 22254, 22262, 22270, 22279, 22287, 22295, 22304, 22312, 22320, 22329, 
    22337, 22345, 22354, 22362, 22370, 22379, 22387, 22394, 22402, 22409, 22416, 22424, 22431, 22440, 
    22451, 22460, 22471, 22477, 22483, 22493, 22503, 22513, 22519, 22526, 22542, 22558, 22574, 22589, 
    22602, 22612, 22622, 22632, 22642, 22653, 22663, 22673, 22683, 22693, 22697, 22702, 22708, 22721, 
    22729, 22738, 22746, 22754, 22763, 22771, 22779, 22788, 22796, 22804, 22813, 22821, 22829, 22838, 
    22846, 22854, 22863, 22871, 22878, 22886, 22893, 22900, 22908, 22915, 22923, 22932, 22940, 22948, 
    22957, 22965, 22973, 22982, 22990, 22998, 23007, 23015, 23023, 23032, 23040, 23048, 23057, 23065, 
    23072, 23080, 23087, 23094, 23102, 23109, 23118, 23127, 23136, 23145, 23154, 23163, 23172, 23181, 
    23185, 23194, 23207, 23216, 23229, 23238, 23251, 23260, 23273, 23278, 23286, 23295, 23303, 23311, 
    23320, 23328, 23336, 23345, 23353, 23361, 23370, 23378, 23386, 23395, 23403, 23411, 23420, 23428, 
    23435, 23443, 23450, 23457, 23465, 23472, 23481, 23489, 23498, 23506, 23514, 23523, 23531, 23539, 
    23551, 23560, 23568, 23577, 23585, 23593, 23602, 23610, 23618, 23630, 23639, 23649, 23658, 23666, 
    23676, 23685, 23693, 23701, 23713, 23720, 23727, 23734, 23741, 23748, 23755, 23766, 23773, 23780, 
    23787, 23793, 23807, 23821, 23828, 23835, 23841, 23847, 23854, 23861, 23871, 23881, 23891, 23900, 
    23906, 23912, 23918, 23924, 23931, 23938, 23944, 23950, 23957, 23964, 23970, 23976, 23983, 23990, 
    23997, 24004, 24011, 24018, 24025, 24032, 24038, 24044, 24050, 24056, 24062, 24068, 24075, 24083, 
    24089, 24097, 24106, 24114, 24122, 24131, 24139, 24147, 24156, 24164, 24172, 24181, 24189, 24197, 
    24206, 24214, 24222, 24231, 24239, 24246, 24254, 24261, 24268, 24276, 24283, 24294, 24305, 24316, 
    24327, 24338, 24349, 24360, 24371, 24382, 24393, 24404, 24415, 24423, 24432, 24440, 24448, 24457, 
    24465, 24473, 24482, 24490, 24498, 24507, 24515, 24523, 24532, 24540, 24548, 24557, 24565, 24572, 
    24580, 24587, 24594, 24602, 24609, 24620, 24631, 24642, 24653, 24664, 24675, 24686, 24697, 24708, 
    24719, 24730, 24741, 24751, 24761, 24771, 24781, 24789, 24795, 24801, 24810, 24819, 24828, 24836, 
    24844, 24852, 24860, 24868, 24876, 24884, 24892, 24900, 24908, 24920, 24928, 24940, 24948, 24960, 
    24968, 24980, 24988, 25000, 25008, 25020, 25028, 25040, 25048, 25060, 25067, 25077, 25087, 25097, 
    25107, 25111, 25115, 25119, 25127, 25133, 25139, 25145, 25151, 25158, 25165, 25172, 25177, 25185, 
    25193, 25202, 25211, 25220, 25228, 25237, 25246, 25257, 25268, 25279, 25289, 25299, 25311, 25321, 
    25333, 25345, 25352, 25361, 25369, 25378, 25386, 25394, 25403, 25411, 25419, 25431, 25440, 25448, 
    25457, 25465, 25473, 25482, 25490, 25498, 25510, 25519, 25529, 25538, 25546, 25556, 25565, 25573, 
    25581, 25593, 25600, 25607, 25614, 25621, 25628, 25635, 25646, 25654, 25662, 25670, 25678, 25688, 
    25698, 25709, 25720, 25732, 25743, 25754, 25765, 25778, 25791, 25804, 25818, 25832, 25846, 25860, 
    25874, 25888, 25899, 25907, 25919, 25927, 25939, 25947, 25959, 25967, 25979, 25988, 25997, 26007, 
    26017, 26028, 26038, 26047, 26057, 26066, 26076, 26088, 26097, 26109, 26121, 26134, 26147, 26160, 
    26173, 26186, 26199, 26209, 26216, 26224, 26233, 26241, 26251, 26259, 26267, 26276, 26287, 26296, 
    26307, 26316, 26327, 26338, 26351, 26362, 26375, 26386, 26399, 26409, 26418, 26427, 26436, 26445, 
    26455, 26464, 26473, 26482, 26491, 26501, 26512, 26523, 26532, 26541, 26549, 26557, 26565, 26579, 
    26587, 26595, 26606, 26617, 26628, 26639, 26644, 26650, 26659, 26668, 26677, 26687, 26697, 26707, 
    26717, 26727, 26737, 26747, 26757, 26767, 26777, 26787, 26796, 26806, 26815, 26827, 26839, 26851, 
    26862, 26873, 26884, 26892, 26897, 26908, 26919, 26930, 26941, 26952, 26963, 26974, 26985, 26994, 
    27004, 27014, 27023, 27032, 27042, 27052, 27061, 27070, 27079, 27092, 27101, 27114, 27123, 27136, 
    27145, 27158, 27171, 27184, 27196, 27208, 27221, 27234, 27246, 27258, 27272, 27286, 27296, 27306, 
    27320, 27334, 27344, 27354, 27364, 27374, 27396, 27418, 27429, 27440, 27450, 27460, 27471, 27482, 
    27492, 27502, 27512, 27522, 27531, 27540, 27550, 27560, 27569, 27578, 27600, 27613, 27626, 27638, 
    27650, 27663, 27676, 27688, 27700, 27713, 27726, 27738, 27750, 27763, 27776, 27788, 27800, 27815, 
    27828, 27841, 27855, 27866, 27881, 27892, 27907, 27917, 27931, 27941, 27955, 27966, 27981, 27992, 
    28007, 28017, 28031, 28041, 28055, 28064, 28077, 28086, 28099, 28108, 28121, 28130, 28143, 28153, 
    28163, 28173, 28183, 28196, 28209, 28221, 28233, 28246, 28259, 28271, 28283, 28297, 28310, 28323, 
    28336, 28349, 28361, 28375, 28388, 28401, 28414, 28427, 28439, 28452, 28465, 28477, 28489, 28502, 
    28515, 28527, 28539, 28552, 28565, 28577, 28589, 28602, 28615, 28627, 28639, 28653, 28667, 28679, 
    28691, 28703, 28715, 28729, 28743, 28756, 28769, 28781, 28793, 28807, 28821, 28833, 28845, 28857, 
    28869, 28883, 28897, 28909, 28921, 28936, 28950, 28964, 28978, 28992, 29005, 29018, 29032, 29046, 
    29059, 29072, 29087, 29102, 29115, 29128, 29143, 29158, 29171, 29184, 29194, 29204, 29213, 29222, 
    29232, 29242, 29251, 29260, 29269, 29282, 29291, 29304, 29313, 29326, 29335, 29348, 29357, 29366, 
    29376, 29386, 29395, 29404, 29410, 29416, 29422, 29428, 29443, 29458, 29471, 29484, 29499, 29513, 
    29528, 29542, 29557, 29571, 29586, 29600, 29615, 29629, 29644, 29658, 29673, 29687, 29702, 29716, 
    29731, 29745, 29760, 29774, 29789, 29803, 29818, 29832, 29847, 29864, 29882, 29899, 29917, 29934, 
    29952, 29969, 29987, 30004, 30022, 30039, 30057, 30074, 30092, 30109, 30127, 30144, 30162, 30179, 
    30197, 30214, 30232, 30249, 30267, 30284, 30302, 30319, 30337, 30354, 30372, 30389, 30407, 30424, 
    30442, 30459, 30477, 30494, 30512, 30529, 30547, 30564, 30582, 30599, 30617, 30634, 30652, 30669, 
    30687, 30701, 30716, 30730, 30745, 30759, 30774, 30788, 30803, 30817, 30832, 30846, 30861, 30875, 
    30890, 30904, 30919, 30933, 30948, 30962, 30977, 30991, 31006, 31020, 31035, 31050, 31066, 31081, 
    31097, 31112, 31128, 31143, 31159, 31174, 31190, 31205, 31221, 31236, 31252, 31267, 31283, 31298, 
    31314, 31329, 31345, 31360, 31376, 31391, 31407, 31422, 31438, 31453, 31469, 31484, 31500, 31515, 
    31531, 31546, 31562, 31577, 31593, 31608, 31624, 31639, 31655, 31670, 31686, 31701, 31717, 31732, 
    31748, 31763, 31779, 31791, 31803, 31815, 31827, 31838, 31849, 31860, 31871, 31881, 31891, 31901, 
    31911, 31922, 31933, 31944, 31955, 31966, 31977, 31987, 31997, 32008, 32019, 32029, 32039, 32050, 
    32061, 32071, 32081, 32092, 32103, 32113, 32123, 32137, 32151, 32163, 32175, 32185, 32194, 32203, 
    32215, 32229, 32243, 32257, 32270, 32283, 32297, 32311, 32324, 32337, 32347, 32361, 32371, 32385, 
    32394, 32407, 32416, 32429, 32439, 32453, 32463, 32477, 32486, 32499, 32508, 32521, 32530, 32543, 
    32552, 32565, 32574, 32587, 32596, 32609, 32616, 32625, 32635, 32649, 32659, 32673, 32682, 32695, 
    32704, 32717, 32727, 32741, 32751, 32765, 32774, 32787, 32796, 32809, 32818, 32831, 32840, 32853, 
    32862, 32875, 32884, 32897, 32906, 32920, 32933, 32946, 32957, 32968, 32979, 32994, 33004, 33014, 
    33024, 33038, 33049, 33060, 33071, 33086, 33096, 33106, 33116, 33130, 33142, 33154, 33165, 33176, 
    33189, 33202, 33214, 33226, 33237, 33248, 33259, 33274, 33284, 33294, 33304, 33318, 33329, 33340, 
    33351, 33366, 33376, 33390, 33400, 33410, 33424, 33435, 33445, 33455, 33465, 33475, 33486, 33496, 
    33506, 33516, 33526, 33538, 33553, 33568, 33583, 33597, 33611, 33625, 33640, 33655, 33670, 33684, 
    33698, 33712, 33724, 33739, 33751, 33765, 33776, 33788, 33799, 33811, 33822, 33835, 33848, 33861, 
    33875, 33888, 33899, 33914, 33925, 33935, 33944, 33953, 33962, 33975, 33988, 34001, 34014, 34027, 
    34039, 34051, 34064, 34077, 34089, 34101, 34113, 34125, 34134, 34143, 34152, 34165, 34176, 34187, 
    34198, 34213, 34223, 34233, 34243, 34257, 34268, 34279, 34290, 34305, 34315, 34325, 34335, 34349, 
    34363, 34377, 34394, 34411, 34425, 34439, 34451, 34463, 34472, 34481, 34492, 34503, 34514, 34525, 
    34534, 34544, 34554, 34563, 34572, 34582, 34592, 34601, 34610, 34619, 34632, 34641, 34654, 34663, 
    34676, 34685, 34698, 34710, 34722, 34734, 34746, 34753, 34759, 34768, 34777, 34785, 34793, 34802, 
    34811, 34819, 34827, 34839, 34851, 34863, 34875, 34887, 34899, 34911, 34923, 34935, 34947, 34959, 
    34971, 34983, 34995, 35004, 35013, 35022, 35031, 35040, 35049, 35059, 35069, 35079, 35089, 35100, 
    35111, 35122, 35133, 35142, 35151, 35165, 35179, 35188, 35197, 35205, 35213, 35222, 35231, 35240, 
    35249, 35261, 35273, 35285, 35297, 35310, 35323, 35334, 35345, 35356, 35367, 35378, 35389, 35400, 
    35411, 35425, 35439, 35453, 35467, 35481, 35495, 35509, 35523, 35537, 35551, 35564, 35577, 35594, 
    35611, 35627, 35643, 35654, 35665, 35676, 35687, 35698, 35709, 35720, 35731, 35745, 35759, 35773, 
    35787, 35801, 35815, 35829, 35843, 35857, 35871, 35884, 35897, 35914, 35931, 35947, 35963, 35976, 
    35989, 36002, 36015, 36028, 36041, 36053, 36065, 36077, 36089, 36102, 36115, 36128, 36141, 36153, 
    36165, 36177, 36189, 36199, 36209, 36221, 36231, 36241, 36251, 36261, 36271, 36281, 36294, 36307, 
    36321, 36335, 36348, 36361, 36378, 36395, 36408, 36421, 36435, 36449, 36462, 36475, 36485, 36495, 
    36505, 36515, 36525, 36535, 36546, 36559, 36570, 36586, 36602, 36613, 36624, 36634, 36644, 36654, 
    36664, 36674, 36684, 36694, 36704, 36714, 36724, 36734, 36744, 36754, 36764, 36774, 36784, 36794, 
    36804, 36814, 36824, 36834, 36844, 36854, 36864, 36878, 36890, 36902, 36914, 36926, 36938, 36950, 
    36962, 36974, 36986, 36998, 37010, 37022, 37034, 37046, 37058, 37070, 37082, 37094, 37106, 37118, 
    37130, 37142, 37154, 37166, 37178, 37188, 37198, 37213, 37228, 37239, 37250, 37260, 37270, 37280, 
    37290, 37300, 37310, 37321, 37332, 37339, 37346, 37356, 37366, 37379, 37392, 37402, 37412, 37423, 
    37434, 37445, 37456, 37469, 37482, 37495, 37508, 37521, 37534, 37544, 37553, 37562, 37571, 37580, 
    37589, 37598, 37607, 37616, 37625, 37634, 37643, 37652, 37661, 37670, 37679, 37689, 37698, 37707, 
    37716, 37725, 37734, 37743, 37752, 37761, 37770, 37779, 37788, 37797, 37806, 37815, 37824, 37834, 
    37844, 37854, 37864, 37875, 37886, 37897, 37908, 37917, 37926, 37936, 37946, 37955, 37964, 37977, 
    37990, 38003, 38016, 38030, 38044, 38057, 38070, 38083, 38096, 38109, 38122, 38136, 38150, 38163, 
    38176, 38184, 38192, 38201, 38214, 38223, 38236, 38244, 38256, 38264, 38276, 38284, 38296, 38304, 
    38314, 38328, 38338, 38352, 38362, 38376, 38386, 38400, 38410, 38424, 38434, 38448, 38458, 38472, 
    38482, 38496, 38507, 38522, 38533, 38548, 38559, 38574, 38585, 38600, 38611, 38626, 38637, 38652, 
    38662, 38676, 38686, 38700, 38710, 38724, 38734, 38746, 38758, 38769, 38780, 38792, 38804, 38815, 
    38826, 38836, 38850, 38860, 38874, 38883, 38896, 38905, 38918, 38928, 38942, 38952, 38966, 38975, 
    38988, 38997, 39010, 39019, 39032, 39041, 39050, 39063, 39072, 39081, 39091, 39101, 39110, 39119, 
    39129, 39139, 39148, 39157, 39166, 39179, 39188, 39201, 39210, 39223, 39232, 39245, 39256, 39267, 
    39277, 39287, 39298, 39309, 39319, 39329, 39340, 39351, 39362, 39373, 39386, 39399, 39411, 39423, 
    39436, 39449, 39461, 39473, 39486, 39499, 39511, 39523, 39536, 39549, 39561, 39573, 39583, 39593, 
    39602, 39611, 39621, 39631, 39640, 39649, 39658, 39669, 39676, 39689, 39699, 39704, 39711, 39722, 
    39739, 39750, 39761, 39770, 39781, 39790, 39801, 39807, 39816, 39825, 39834, 39843, 39852, 39861, 
    39869, 39877, 39886, 39895, 39904, 39913, 39924, 39933, 39942, 39951, 39960, 39969, 39977, 39985, 
    39991, 40001, 40011, 40021, 40031, 40041, 40048, 40053, 40062, 40070, 40079, 40087, 40095, 40104, 
    40112, 40120, 40132, 40141, 40149, 40158, 40166, 40174, 40183, 40191, 40199, 40211, 40220, 40230, 
    40239, 40247, 40257, 40266, 40274, 40282, 40294, 40301, 40308, 40315, 40322, 40329, 40336, 40347, 
    40355, 40363, 40371, 40379, 40386, 40395, 40401, 40409, 40418, 40429, 40436, 40442, 40450, 0
  };

  const char *Strs =
    "PHI\000INLINEASM\000PROLOG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXT"
    "RACT_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_T"
    "O_REGCLASS\000DBG_VALUE\000REG_SEQUENCE\000COPY\000AAA\000AAD8i8\000AAM"
    "8i8\000AAS\000ABS_F\000ABS_Fp32\000ABS_Fp64\000ABS_Fp80\000ACQUIRE_MOV1"
    "6rm\000ACQUIRE_MOV32rm\000ACQUIRE_MOV64rm\000ACQUIRE_MOV8rm\000ADC16i16"
    "\000ADC16mi\000ADC16mi8\000ADC16mr\000ADC16ri\000ADC16ri8\000ADC16rm\000"
    "ADC16rr\000ADC16rr_REV\000ADC32i32\000ADC32mi\000ADC32mi8\000ADC32mr\000"
    "ADC32ri\000ADC32ri8\000ADC32rm\000ADC32rr\000ADC32rr_REV\000ADC64i32\000"
    "ADC64mi32\000ADC64mi8\000ADC64mr\000ADC64ri32\000ADC64ri8\000ADC64rm\000"
    "ADC64rr\000ADC64rr_REV\000ADC8i8\000ADC8mi\000ADC8mr\000ADC8ri\000ADC8r"
    "m\000ADC8rr\000ADC8rr_REV\000ADD16i16\000ADD16mi\000ADD16mi8\000ADD16mr"
    "\000ADD16ri\000ADD16ri8\000ADD16ri8_DB\000ADD16ri_DB\000ADD16rm\000ADD1"
    "6rr\000ADD16rr_DB\000ADD16rr_REV\000ADD32i32\000ADD32mi\000ADD32mi8\000"
    "ADD32mr\000ADD32ri\000ADD32ri8\000ADD32ri8_DB\000ADD32ri_DB\000ADD32rm\000"
    "ADD32rr\000ADD32rr_DB\000ADD32rr_REV\000ADD64i32\000ADD64mi32\000ADD64m"
    "i8\000ADD64mr\000ADD64ri32\000ADD64ri32_DB\000ADD64ri8\000ADD64ri8_DB\000"
    "ADD64rm\000ADD64rr\000ADD64rr_DB\000ADD64rr_REV\000ADD8i8\000ADD8mi\000"
    "ADD8mr\000ADD8ri\000ADD8rm\000ADD8rr\000ADD8rr_REV\000ADDPDrm\000ADDPDr"
    "r\000ADDPSrm\000ADDPSrr\000ADDSDrm\000ADDSDrm_Int\000ADDSDrr\000ADDSDrr"
    "_Int\000ADDSSrm\000ADDSSrm_Int\000ADDSSrr\000ADDSSrr_Int\000ADDSUBPDrm\000"
    "ADDSUBPDrr\000ADDSUBPSrm\000ADDSUBPSrr\000ADD_F32m\000ADD_F64m\000ADD_F"
    "I16m\000ADD_FI32m\000ADD_FPrST0\000ADD_FST0r\000ADD_Fp32\000ADD_Fp32m\000"
    "ADD_Fp64\000ADD_Fp64m\000ADD_Fp64m32\000ADD_Fp80\000ADD_Fp80m32\000ADD_"
    "Fp80m64\000ADD_FpI16m32\000ADD_FpI16m64\000ADD_FpI16m80\000ADD_FpI32m32"
    "\000ADD_FpI32m64\000ADD_FpI32m80\000ADD_FrST0\000ADJCALLSTACKDOWN32\000"
    "ADJCALLSTACKDOWN64\000ADJCALLSTACKUP32\000ADJCALLSTACKUP64\000AESDECLAS"
    "Trm\000AESDECLASTrr\000AESDECrm\000AESDECrr\000AESENCLASTrm\000AESENCLA"
    "STrr\000AESENCrm\000AESENCrr\000AESIMCrm\000AESIMCrr\000AESKEYGENASSIST"
    "128rm\000AESKEYGENASSIST128rr\000AND16i16\000AND16mi\000AND16mi8\000AND"
    "16mr\000AND16ri\000AND16ri8\000AND16rm\000AND16rr\000AND16rr_REV\000AND"
    "32i32\000AND32mi\000AND32mi8\000AND32mr\000AND32ri\000AND32ri8\000AND32"
    "rm\000AND32rr\000AND32rr_REV\000AND64i32\000AND64mi32\000AND64mi8\000AN"
    "D64mr\000AND64ri32\000AND64ri8\000AND64rm\000AND64rr\000AND64rr_REV\000"
    "AND8i8\000AND8mi\000AND8mr\000AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000"
    "ANDN32rm\000ANDN32rr\000ANDN64rm\000ANDN64rr\000ANDNPDrm\000ANDNPDrr\000"
    "ANDNPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000ARP"
    "L16mr\000ARPL16rr\000ATOMADD6432\000ATOMAND16\000ATOMAND32\000ATOMAND64"
    "\000ATOMAND6432\000ATOMAND8\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000A"
    "TOMMIN16\000ATOMMIN32\000ATOMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMN"
    "AND64\000ATOMNAND6432\000ATOMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000"
    "ATOMOR6432\000ATOMOR8\000ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000A"
    "TOMUMAX32\000ATOMUMAX64\000ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000AT"
    "OMXOR16\000ATOMXOR32\000ATOMXOR64\000ATOMXOR6432\000ATOMXOR8\000AVX_SET"
    "0PDY\000AVX_SET0PSY\000AVX_SETALLONES\000BLENDPDrmi\000BLENDPDrri\000BL"
    "ENDPSrmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000"
    "BLENDVPSrr0\000BOUNDS16rm\000BOUNDS32rm\000BSF16rm\000BSF16rr\000BSF32r"
    "m\000BSF32rr\000BSF64rm\000BSF64rr\000BSR16rm\000BSR16rr\000BSR32rm\000"
    "BSR32rr\000BSR64rm\000BSR64rr\000BSWAP32r\000BSWAP64r\000BT16mi8\000BT1"
    "6mr\000BT16ri8\000BT16rr\000BT32mi8\000BT32mr\000BT32ri8\000BT32rr\000B"
    "T64mi8\000BT64mr\000BT64ri8\000BT64rr\000BTC16mi8\000BTC16mr\000BTC16ri"
    "8\000BTC16rr\000BTC32mi8\000BTC32mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000"
    "BTC64mr\000BTC64ri8\000BTC64rr\000BTR16mi8\000BTR16mr\000BTR16ri8\000BT"
    "R16rr\000BTR32mi8\000BTR32mr\000BTR32ri8\000BTR32rr\000BTR64mi8\000BTR6"
    "4mr\000BTR64ri8\000BTR64rr\000BTS16mi8\000BTS16mr\000BTS16ri8\000BTS16r"
    "r\000BTS32mi8\000BTS32mr\000BTS32ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000"
    "BTS64ri8\000BTS64rr\000CALL32m\000CALL32r\000CALL64m\000CALL64pcrel32\000"
    "CALL64r\000CALLpcrel16\000CALLpcrel32\000CBW\000CDQ\000CDQE\000CHS_F\000"
    "CHS_Fp32\000CHS_Fp64\000CHS_Fp80\000CLC\000CLD\000CLFLUSH\000CLI\000CLT"
    "S\000CMC\000CMOVA16rm\000CMOVA16rr\000CMOVA32rm\000CMOVA32rr\000CMOVA64"
    "rm\000CMOVA64rr\000CMOVAE16rm\000CMOVAE16rr\000CMOVAE32rm\000CMOVAE32rr"
    "\000CMOVAE64rm\000CMOVAE64rr\000CMOVB16rm\000CMOVB16rr\000CMOVB32rm\000"
    "CMOVB32rr\000CMOVB64rm\000CMOVB64rr\000CMOVBE16rm\000CMOVBE16rr\000CMOV"
    "BE32rm\000CMOVBE32rr\000CMOVBE64rm\000CMOVBE64rr\000CMOVBE_F\000CMOVBE_"
    "Fp32\000CMOVBE_Fp64\000CMOVBE_Fp80\000CMOVB_F\000CMOVB_Fp32\000CMOVB_Fp"
    "64\000CMOVB_Fp80\000CMOVE16rm\000CMOVE16rr\000CMOVE32rm\000CMOVE32rr\000"
    "CMOVE64rm\000CMOVE64rr\000CMOVE_F\000CMOVE_Fp32\000CMOVE_Fp64\000CMOVE_"
    "Fp80\000CMOVG16rm\000CMOVG16rr\000CMOVG32rm\000CMOVG32rr\000CMOVG64rm\000"
    "CMOVG64rr\000CMOVGE16rm\000CMOVGE16rr\000CMOVGE32rm\000CMOVGE32rr\000CM"
    "OVGE64rm\000CMOVGE64rr\000CMOVL16rm\000CMOVL16rr\000CMOVL32rm\000CMOVL3"
    "2rr\000CMOVL64rm\000CMOVL64rr\000CMOVLE16rm\000CMOVLE16rr\000CMOVLE32rm"
    "\000CMOVLE32rr\000CMOVLE64rm\000CMOVLE64rr\000CMOVNBE_F\000CMOVNBE_Fp32"
    "\000CMOVNBE_Fp64\000CMOVNBE_Fp80\000CMOVNB_F\000CMOVNB_Fp32\000CMOVNB_F"
    "p64\000CMOVNB_Fp80\000CMOVNE16rm\000CMOVNE16rr\000CMOVNE32rm\000CMOVNE3"
    "2rr\000CMOVNE64rm\000CMOVNE64rr\000CMOVNE_F\000CMOVNE_Fp32\000CMOVNE_Fp"
    "64\000CMOVNE_Fp80\000CMOVNO16rm\000CMOVNO16rr\000CMOVNO32rm\000CMOVNO32"
    "rr\000CMOVNO64rm\000CMOVNO64rr\000CMOVNP16rm\000CMOVNP16rr\000CMOVNP32r"
    "m\000CMOVNP32rr\000CMOVNP64rm\000CMOVNP64rr\000CMOVNP_F\000CMOVNP_Fp32\000"
    "CMOVNP_Fp64\000CMOVNP_Fp80\000CMOVNS16rm\000CMOVNS16rr\000CMOVNS32rm\000"
    "CMOVNS32rr\000CMOVNS64rm\000CMOVNS64rr\000CMOVO16rm\000CMOVO16rr\000CMO"
    "VO32rm\000CMOVO32rr\000CMOVO64rm\000CMOVO64rr\000CMOVP16rm\000CMOVP16rr"
    "\000CMOVP32rm\000CMOVP32rr\000CMOVP64rm\000CMOVP64rr\000CMOVP_F\000CMOV"
    "P_Fp32\000CMOVP_Fp64\000CMOVP_Fp80\000CMOVS16rm\000CMOVS16rr\000CMOVS32"
    "rm\000CMOVS32rr\000CMOVS64rm\000CMOVS64rr\000CMOV_FR32\000CMOV_FR64\000"
    "CMOV_GR16\000CMOV_GR32\000CMOV_GR8\000CMOV_RFP32\000CMOV_RFP64\000CMOV_"
    "RFP80\000CMOV_V2F64\000CMOV_V2I64\000CMOV_V4F32\000CMOV_V4F64\000CMOV_V"
    "4I64\000CMOV_V8F32\000CMP16i16\000CMP16mi\000CMP16mi8\000CMP16mr\000CMP"
    "16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP16rr_REV\000CMP32i32\000CM"
    "P32mi\000CMP32mi8\000CMP32mr\000CMP32ri\000CMP32ri8\000CMP32rm\000CMP32"
    "rr\000CMP32rr_REV\000CMP64i32\000CMP64mi32\000CMP64mi8\000CMP64mr\000CM"
    "P64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000CMP64rr_REV\000CMP8i8\000C"
    "MP8mi\000CMP8mr\000CMP8ri\000CMP8rm\000CMP8rr\000CMP8rr_REV\000CMPPDrmi"
    "\000CMPPDrmi_alt\000CMPPDrri\000CMPPDrri_alt\000CMPPSrmi\000CMPPSrmi_al"
    "t\000CMPPSrri\000CMPPSrri_alt\000CMPS16\000CMPS32\000CMPS64\000CMPS8\000"
    "CMPSDrm\000CMPSDrm_alt\000CMPSDrr\000CMPSDrr_alt\000CMPSSrm\000CMPSSrm_"
    "alt\000CMPSSrr\000CMPSSrr_alt\000CMPXCHG16B\000CMPXCHG16rm\000CMPXCHG16"
    "rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000CMPXC"
    "HG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISSrm\000"
    "COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS_F\000"
    "COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32r32m16\000CRC3"
    "2r32m32\000CRC32r32m8\000CRC32r32r16\000CRC32r32r32\000CRC32r32r8\000CR"
    "C32r64m64\000CRC32r64m8\000CRC32r64r64\000CRC32r64r8\000CS_PREFIX\000CV"
    "TDQ2PDrm\000CVTDQ2PDrr\000CVTDQ2PSrm\000CVTDQ2PSrr\000CVTPD2DQrm\000CVT"
    "PD2DQrr\000CVTPD2PSrm\000CVTPD2PSrr\000CVTPS2DQrm\000CVTPS2DQrr\000CVTP"
    "S2PDrm\000CVTPS2PDrr\000CVTSD2SI64rm\000CVTSD2SI64rr\000CVTSD2SIrm\000C"
    "VTSD2SIrr\000CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000CVTSI2SD64rr\000"
    "CVTSI2SDrm\000CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64rr\000CVTSI2SSrm\000"
    "CVTSI2SSrr\000CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64rm\000CVTSS2SI64rr\000"
    "CVTSS2SIrm\000CVTSS2SIrr\000CVTTPD2DQrm\000CVTTPD2DQrr\000CVTTPS2DQrm\000"
    "CVTTPS2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI64rr\000CVTTSD2SIrm\000CVTTSD2"
    "SIrr\000CVTTSS2SI64rm\000CVTTSS2SI64rr\000CVTTSS2SIrm\000CVTTSS2SIrr\000"
    "CWD\000CWDE\000DAA\000DAS\000DATA16_PREFIX\000DEC16m\000DEC16r\000DEC32"
    "m\000DEC32r\000DEC64_16m\000DEC64_16r\000DEC64_32m\000DEC64_32r\000DEC6"
    "4m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000DIV16r\000DIV32m\000DIV32r\000"
    "DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIVPDrm\000DIVPDrr\000DIVPSrm\000"
    "DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR_FI16m\000DIVR_FI32m\000DIVR_F"
    "PrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR_Fp64m\000DIVR_Fp64m32\000DIVR"
    "_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32\000DIVR_FpI16m64\000DIVR_FpI1"
    "6m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000DIVR_FpI32m80\000DIVR_FrST0\000"
    "DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIVSDrr_Int\000DIVSSrm\000DIVSSrm_"
    "Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32m\000DIV_F64m\000DIV_FI16m\000D"
    "IV_FI32m\000DIV_FPrST0\000DIV_FST0r\000DIV_Fp32\000DIV_Fp32m\000DIV_Fp6"
    "4\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp80\000DIV_Fp80m32\000DIV_Fp80m64"
    "\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_FpI16m80\000DIV_FpI32m32\000DIV"
    "_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000DPPDrmi\000DPPDrri\000DPPSrmi"
    "\000DPPSrri\000DS_PREFIX\000EH_RETURN\000EH_RETURN64\000ENTER\000ES_PRE"
    "FIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1\000FARCALL16i\000FARCALL16m\000"
    "FARCALL32i\000FARCALL32m\000FARCALL64\000FARJMP16i\000FARJMP16m\000FARJ"
    "MP32i\000FARJMP32m\000FARJMP64\000FBLDm\000FBSTPm\000FCOM32m\000FCOM64m"
    "\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECSTP\000FEMMS\000FFREE\000FICO"
    "M16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FL"
    "DENVm\000FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLDPI\000FNCLEX\000FNI"
    "NIT\000FNOP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000FP32_TO_INT16_IN_MEM"
    "\000FP32_TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000FP64_TO_INT16_IN_ME"
    "M\000FP64_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000FP80_TO_INT16_IN_M"
    "EM\000FP80_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000FPATAN\000FPREM\000"
    "FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINCOS\000"
    "FSTENVm\000FS_PREFIX\000FXAM\000FXRSTOR\000FXRSTOR64\000FXSAVE\000FXSAV"
    "E64\000FXTRACT\000FYL2X\000FYL2XP1\000FpPOP_RETVAL\000FsANDNPDrm\000FsA"
    "NDNPDrr\000FsANDNPSrm\000FsANDNPSrr\000FsANDPDrm\000FsANDPDrr\000FsANDP"
    "Srm\000FsANDPSrr\000FsFLD0SD\000FsFLD0SS\000FsMOVAPDrm\000FsMOVAPDrr\000"
    "FsMOVAPSrm\000FsMOVAPSrr\000FsORPDrm\000FsORPDrr\000FsORPSrm\000FsORPSr"
    "r\000FsVMOVAPDrm\000FsVMOVAPDrr\000FsVMOVAPSrm\000FsVMOVAPSrr\000FsXORP"
    "Drm\000FsXORPDrr\000FsXORPSrm\000FsXORPSrr\000GS_PREFIX\000HADDPDrm\000"
    "HADDPDrr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUB"
    "PSrm\000HSUBPSrr\000IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m"
    "\000IDIV64r\000IDIV8m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000"
    "ILD_Fp16m32\000ILD_Fp16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64"
    "\000ILD_Fp32m80\000ILD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m"
    "\000IMUL16r\000IMUL16rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL1"
    "6rri\000IMUL16rri8\000IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IM"
    "UL32rmi8\000IMUL32rr\000IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000"
    "IMUL64rm\000IMUL64rmi32\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMU"
    "L64rri8\000IMUL8m\000IMUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32"
    "ri\000IN32rr\000IN8\000IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000"
    "INC32r\000INC64_16m\000INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000"
    "INC64r\000INC8m\000INC8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000"
    "INTO\000INVD\000INVEPT32\000INVEPT64\000INVLPG\000INVVPID32\000INVVPID6"
    "4\000IRET16\000IRET32\000IRET64\000ISTT_FP16m\000ISTT_FP32m\000ISTT_FP6"
    "4m\000ISTT_Fp16m32\000ISTT_Fp16m64\000ISTT_Fp16m80\000ISTT_Fp32m32\000I"
    "STT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp64m32\000ISTT_Fp64m64\000ISTT_Fp6"
    "4m80\000IST_F16m\000IST_F32m\000IST_FP16m\000IST_FP32m\000IST_FP64m\000"
    "IST_Fp16m32\000IST_Fp16m64\000IST_Fp16m80\000IST_Fp32m32\000IST_Fp32m64"
    "\000IST_Fp32m80\000IST_Fp64m32\000IST_Fp64m64\000IST_Fp64m80\000Int_CMP"
    "SDrm\000Int_CMPSDrr\000Int_CMPSSrm\000Int_CMPSSrr\000Int_COMISDrm\000In"
    "t_COMISDrr\000Int_COMISSrm\000Int_COMISSrr\000Int_CVTDQ2PDrm\000Int_CVT"
    "DQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ2PSrr\000Int_CVTPD2DQrm\000Int_CV"
    "TPD2DQrr\000Int_CVTPD2PSrm\000Int_CVTPD2PSrr\000Int_CVTPS2DQrm\000Int_C"
    "VTPS2DQrr\000Int_CVTPS2PDrm\000Int_CVTPS2PDrr\000Int_CVTSD2SSrm\000Int_"
    "CVTSD2SSrr\000Int_CVTSI2SD64rm\000Int_CVTSI2SD64rr\000Int_CVTSI2SDrm\000"
    "Int_CVTSI2SDrr\000Int_CVTSI2SS64rm\000Int_CVTSI2SS64rr\000Int_CVTSI2SSr"
    "m\000Int_CVTSI2SSrr\000Int_CVTSS2SDrm\000Int_CVTSS2SDrr\000Int_CVTTSD2S"
    "I64rm\000Int_CVTTSD2SI64rr\000Int_CVTTSD2SIrm\000Int_CVTTSD2SIrr\000Int"
    "_CVTTSS2SI64rm\000Int_CVTTSS2SI64rr\000Int_CVTTSS2SIrm\000Int_CVTTSS2SI"
    "rr\000Int_MemBarrier\000Int_MemBarrierNoSSE64\000Int_UCOMISDrm\000Int_U"
    "COMISDrr\000Int_UCOMISSrm\000Int_UCOMISSrr\000Int_VCMPSDrm\000Int_VCMPS"
    "Drr\000Int_VCMPSSrm\000Int_VCMPSSrr\000Int_VCOMISDrm\000Int_VCOMISDrr\000"
    "Int_VCOMISSrm\000Int_VCOMISSrr\000Int_VCVTDQ2PDrm\000Int_VCVTDQ2PDrr\000"
    "Int_VCVTDQ2PSrm\000Int_VCVTDQ2PSrr\000Int_VCVTPD2DQrm\000Int_VCVTPD2DQr"
    "r\000Int_VCVTPD2PSrm\000Int_VCVTPD2PSrr\000Int_VCVTPS2DQrm\000Int_VCVTP"
    "S2DQrr\000Int_VCVTPS2PDrm\000Int_VCVTPS2PDrr\000Int_VCVTSD2SI64rm\000In"
    "t_VCVTSD2SI64rr\000Int_VCVTSD2SIrm\000Int_VCVTSD2SIrr\000Int_VCVTSD2SSr"
    "m\000Int_VCVTSD2SSrr\000Int_VCVTSI2SD64rm\000Int_VCVTSI2SD64rr\000Int_V"
    "CVTSI2SDrm\000Int_VCVTSI2SDrr\000Int_VCVTSI2SS64rm\000Int_VCVTSI2SS64rr"
    "\000Int_VCVTSI2SSrm\000Int_VCVTSI2SSrr\000Int_VCVTSS2SDrm\000Int_VCVTSS"
    "2SDrr\000Int_VCVTTPS2DQrm\000Int_VCVTTPS2DQrr\000Int_VCVTTSD2SI64rm\000"
    "Int_VCVTTSD2SI64rr\000Int_VCVTTSD2SIrm\000Int_VCVTTSD2SIrr\000Int_VCVTT"
    "SS2SI64rm\000Int_VCVTTSS2SI64rr\000Int_VCVTTSS2SIrm\000Int_VCVTTSS2SIrr"
    "\000Int_VUCOMISDrm\000Int_VUCOMISDrr\000Int_VUCOMISSrm\000Int_VUCOMISSr"
    "r\000JAE_1\000JAE_4\000JA_1\000JA_4\000JBE_1\000JBE_4\000JB_1\000JB_4\000"
    "JCXZ\000JECXZ_32\000JECXZ_64\000JE_1\000JE_4\000JGE_1\000JGE_4\000JG_1\000"
    "JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000JMP32m\000JMP32r\000JMP64m\000"
    "JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000JNE_1\000JNE_4\000JNO_1\000"
    "JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000JO_1\000JO_4\000JP_1\000JP"
    "_4\000JRCXZ\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
    "LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXCHG16B\000LCMPXCHG3"
    "2\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS"
    "16rm\000LDS32rm\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000L"
    "D_Fp032\000LD_Fp064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000"
    "LD_Fp32m\000LD_Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp"
    "80m\000LD_Frr\000LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LE"
    "AVE64\000LES16rm\000LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000"
    "LGDT16m\000LGDTm\000LGS16rm\000LGS32rm\000LGS64rm\000LIDT16m\000LIDTm\000"
    "LLDT16m\000LLDT16r\000LMSW16m\000LMSW16r\000LOCK_ADD16mi\000LOCK_ADD16m"
    "i8\000LOCK_ADD16mr\000LOCK_ADD32mi\000LOCK_ADD32mi8\000LOCK_ADD32mr\000"
    "LOCK_ADD64mi32\000LOCK_ADD64mi8\000LOCK_ADD64mr\000LOCK_ADD8mi\000LOCK_"
    "ADD8mr\000LOCK_AND16mi\000LOCK_AND16mi8\000LOCK_AND16mr\000LOCK_AND32mi"
    "\000LOCK_AND32mi8\000LOCK_AND32mr\000LOCK_AND64mi32\000LOCK_AND64mi8\000"
    "LOCK_AND64mr\000LOCK_AND8mi\000LOCK_AND8mr\000LOCK_DEC16m\000LOCK_DEC32"
    "m\000LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000LOCK_IN"
    "C64m\000LOCK_INC8m\000LOCK_OR16mi\000LOCK_OR16mi8\000LOCK_OR16mr\000LOC"
    "K_OR32mi\000LOCK_OR32mi8\000LOCK_OR32mr\000LOCK_OR64mi32\000LOCK_OR64mi"
    "8\000LOCK_OR64mr\000LOCK_OR8mi\000LOCK_OR8mr\000LOCK_PREFIX\000LOCK_SUB"
    "16mi\000LOCK_SUB16mi8\000LOCK_SUB16mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000"
    "LOCK_SUB32mr\000LOCK_SUB64mi32\000LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK"
    "_SUB8mi\000LOCK_SUB8mr\000LOCK_XOR16mi\000LOCK_XOR16mi8\000LOCK_XOR16mr"
    "\000LOCK_XOR32mi\000LOCK_XOR32mi8\000LOCK_XOR32mr\000LOCK_XOR64mi32\000"
    "LOCK_XOR64mi8\000LOCK_XOR64mr\000LOCK_XOR8mi\000LOCK_XOR8mr\000LODSB\000"
    "LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000LRETI\000LRETIW\000"
    "LRETL\000LRETQ\000LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000"
    "LSL64rr\000LSS16rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000"
    "LXADD32\000LXADD64\000LXADD8\000LZCNT16rm\000LZCNT16rr\000LZCNT32rm\000"
    "LZCNT32rr\000LZCNT64rm\000LZCNT64rr\000MASKMOVDQU\000MASKMOVDQU64\000MA"
    "XPDrm\000MAXPDrm_Int\000MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_In"
    "t\000MAXPSrr\000MAXPSrr_Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAX"
    "SDrr_Int\000MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000"
    "MINPDrm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000MINPSrm_"
    "Int\000MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSDrr\000M"
    "INSDrr_Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000MMX_C"
    "VTPD2PIirm\000MMX_CVTPD2PIirr\000MMX_CVTPI2PDirm\000MMX_CVTPI2PDirr\000"
    "MMX_CVTPI2PSirm\000MMX_CVTPI2PSirr\000MMX_CVTPS2PIirm\000MMX_CVTPS2PIir"
    "r\000MMX_CVTTPD2PIirm\000MMX_CVTTPD2PIirr\000MMX_CVTTPS2PIirm\000MMX_CV"
    "TTPS2PIirr\000MMX_EMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOVD64f"
    "rom64rr\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOVD64r"
    "r\000MMX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_MOVFR"
    "642Qrr\000MMX_MOVNTQmr\000MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_MOVQ6"
    "4mr\000MMX_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZDI2P"
    "DIrr\000MMX_PABSBrm64\000MMX_PABSBrr64\000MMX_PABSDrm64\000MMX_PABSDrr6"
    "4\000MMX_PABSWrm64\000MMX_PABSWrr64\000MMX_PACKSSDWirm\000MMX_PACKSSDWi"
    "rr\000MMX_PACKSSWBirm\000MMX_PACKSSWBirr\000MMX_PACKUSWBirm\000MMX_PACK"
    "USWBirr\000MMX_PADDBirm\000MMX_PADDBirr\000MMX_PADDDirm\000MMX_PADDDirr"
    "\000MMX_PADDQirm\000MMX_PADDQirr\000MMX_PADDSBirm\000MMX_PADDSBirr\000M"
    "MX_PADDSWirm\000MMX_PADDSWirr\000MMX_PADDUSBirm\000MMX_PADDUSBirr\000MM"
    "X_PADDUSWirm\000MMX_PADDUSWirr\000MMX_PADDWirm\000MMX_PADDWirr\000MMX_P"
    "ALIGNR64irm\000MMX_PALIGNR64irr\000MMX_PANDNirm\000MMX_PANDNirr\000MMX_"
    "PANDirm\000MMX_PANDirr\000MMX_PAVGBirm\000MMX_PAVGBirr\000MMX_PAVGWirm\000"
    "MMX_PAVGWirr\000MMX_PCMPEQBirm\000MMX_PCMPEQBirr\000MMX_PCMPEQDirm\000M"
    "MX_PCMPEQDirr\000MMX_PCMPEQWirm\000MMX_PCMPEQWirr\000MMX_PCMPGTBirm\000"
    "MMX_PCMPGTBirr\000MMX_PCMPGTDirm\000MMX_PCMPGTDirr\000MMX_PCMPGTWirm\000"
    "MMX_PCMPGTWirr\000MMX_PEXTRWirri\000MMX_PHADDSWrm64\000MMX_PHADDSWrr64\000"
    "MMX_PHADDWrm64\000MMX_PHADDWrr64\000MMX_PHADDrm64\000MMX_PHADDrr64\000M"
    "MX_PHSUBDrm64\000MMX_PHSUBDrr64\000MMX_PHSUBSWrm64\000MMX_PHSUBSWrr64\000"
    "MMX_PHSUBWrm64\000MMX_PHSUBWrr64\000MMX_PINSRWirmi\000MMX_PINSRWirri\000"
    "MMX_PMADDUBSWrm64\000MMX_PMADDUBSWrr64\000MMX_PMADDWDirm\000MMX_PMADDWD"
    "irr\000MMX_PMAXSWirm\000MMX_PMAXSWirr\000MMX_PMAXUBirm\000MMX_PMAXUBirr"
    "\000MMX_PMINSWirm\000MMX_PMINSWirr\000MMX_PMINUBirm\000MMX_PMINUBirr\000"
    "MMX_PMOVMSKBrr\000MMX_PMULHRSWrm64\000MMX_PMULHRSWrr64\000MMX_PMULHUWir"
    "m\000MMX_PMULHUWirr\000MMX_PMULHWirm\000MMX_PMULHWirr\000MMX_PMULLWirm\000"
    "MMX_PMULLWirr\000MMX_PMULUDQirm\000MMX_PMULUDQirr\000MMX_PORirm\000MMX_"
    "PORirr\000MMX_PSADBWirm\000MMX_PSADBWirr\000MMX_PSHUFBrm64\000MMX_PSHUF"
    "Brr64\000MMX_PSHUFWmi\000MMX_PSHUFWri\000MMX_PSIGNBrm64\000MMX_PSIGNBrr"
    "64\000MMX_PSIGNDrm64\000MMX_PSIGNDrr64\000MMX_PSIGNWrm64\000MMX_PSIGNWr"
    "r64\000MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_"
    "PSLLQrm\000MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000"
    "MMX_PSRADri\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm"
    "\000MMX_PSRAWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSR"
    "LQri\000MMX_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX"
    "_PSRLWrr\000MMX_PSUBBirm\000MMX_PSUBBirr\000MMX_PSUBDirm\000MMX_PSUBDir"
    "r\000MMX_PSUBQirm\000MMX_PSUBQirr\000MMX_PSUBSBirm\000MMX_PSUBSBirr\000"
    "MMX_PSUBSWirm\000MMX_PSUBSWirr\000MMX_PSUBUSBirm\000MMX_PSUBUSBirr\000M"
    "MX_PSUBUSWirm\000MMX_PSUBUSWirr\000MMX_PSUBWirm\000MMX_PSUBWirr\000MMX_"
    "PUNPCKHBWirm\000MMX_PUNPCKHBWirr\000MMX_PUNPCKHDQirm\000MMX_PUNPCKHDQir"
    "r\000MMX_PUNPCKHWDirm\000MMX_PUNPCKHWDirr\000MMX_PUNPCKLBWirm\000MMX_PU"
    "NPCKLBWirr\000MMX_PUNPCKLDQirm\000MMX_PUNPCKLDQirr\000MMX_PUNPCKLWDirm\000"
    "MMX_PUNPCKLWDirr\000MMX_PXORirm\000MMX_PXORirr\000MONITOR\000MONITORrrr"
    "\000MONTMUL\000MOV16ao16\000MOV16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000"
    "MOV16r0\000MOV16ri\000MOV16rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000M"
    "OV16sm\000MOV16sr\000MOV32ao32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV3"
    "2mr\000MOV32ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri"
    "\000MOV32rm\000MOV32rr\000MOV32rr_REV\000MOV32rs\000MOV32sm\000MOV32sr\000"
    "MOV64cr\000MOV64dr\000MOV64mi32\000MOV64mr\000MOV64ms\000MOV64r0\000MOV"
    "64rc\000MOV64rd\000MOV64ri\000MOV64ri32\000MOV64ri64i32\000MOV64rm\000M"
    "OV64rr\000MOV64rr_REV\000MOV64rs\000MOV64sm\000MOV64sr\000MOV64toPQIrr\000"
    "MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr\000MOV8mr_NOR"
    "EX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOREX\000MOV8rr\000"
    "MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000MOVAPDrr\000MOVAP"
    "Drr_REV\000MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVAPSrr_REV\000MOVBE16m"
    "r\000MOVBE16rm\000MOVBE32mr\000MOVBE32rm\000MOVBE64mr\000MOVBE64rm\000M"
    "OVDDUPrm\000MOVDDUPrr\000MOVDI2PDIrm\000MOVDI2PDIrr\000MOVDI2SSrm\000MO"
    "VDI2SSrr\000MOVDQAmr\000MOVDQArm\000MOVDQArr\000MOVDQArr_REV\000MOVDQUm"
    "r\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrr\000MOVDQUrr_REV\000MOVHLPSrr\000"
    "MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MOVLHPSrr\000MOVLPDmr\000"
    "MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000MOVMSKPDrr32\000MOVMS"
    "KPDrr64\000MOVMSKPSrr32\000MOVMSKPSrr64\000MOVNTDQArm\000MOVNTDQ_64mr\000"
    "MOVNTDQmr\000MOVNTI_64mr\000MOVNTImr\000MOVNTPDmr\000MOVNTPSmr\000MOVPC"
    "32r\000MOVPDI2DImr\000MOVPDI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOV"
    "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr"
    "\000MOVSDrr_REV\000MOVSDto64mr\000MOVSDto64rr\000MOVSHDUPrm\000MOVSHDUP"
    "rr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSQ\000MOVSS2DImr\000MOVSS2DIrr\000"
    "MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSSrr_REV\000MOVSW\000MOVSX16rm8\000"
    "MOVSX16rr8\000MOVSX32rm16\000MOVSX32rm8\000MOVSX32rr16\000MOVSX32rr8\000"
    "MOVSX64rm16\000MOVSX64rm32\000MOVSX64rm8\000MOVSX64rr16\000MOVSX64rr32\000"
    "MOVSX64rr8\000MOVUPDmr\000MOVUPDrm\000MOVUPDrr\000MOVUPDrr_REV\000MOVUP"
    "Smr\000MOVUPSrm\000MOVUPSrr\000MOVUPSrr_REV\000MOVZDI2PDIrm\000MOVZDI2P"
    "DIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZQI2PQ"
    "Irr\000MOVZX16rm8\000MOVZX16rr8\000MOVZX32_NOREXrm8\000MOVZX32_NOREXrr8"
    "\000MOVZX32rm16\000MOVZX32rm8\000MOVZX32rr16\000MOVZX32rr8\000MOVZX64rm"
    "16\000MOVZX64rm16_Q\000MOVZX64rm32\000MOVZX64rm8\000MOVZX64rm8_Q\000MOV"
    "ZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr32\000MOVZX64rr8\000MOVZX64rr8_Q\000"
    "MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL32m\000MUL32r\000MUL"
    "64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPDrr\000MULPSrm\000MUL"
    "PSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDrr_Int\000MULSSrm\000"
    "MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000MUL_F64m\000MUL_FI"
    "16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp32\000MUL_Fp32m\000"
    "MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000MUL_Fp80m32\000MUL_"
    "Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16m80\000MUL_FpI32m32"
    "\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWAIT\000MWAITrr\000NE"
    "G16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m\000NEG8"
    "r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NOT32r\000"
    "NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16mi8\000O"
    "R16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000OR32i32"
    "\000OR32mi\000OR32mi8\000OR32mr\000OR32mrLocked\000OR32ri\000OR32ri8\000"
    "OR32rm\000OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR6"
    "4mr\000OR64ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000"
    "OR8mi\000OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORP"
    "Drr\000ORPSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000"
    "OUT8ir\000OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrr128"
    "\000PABSDrm128\000PABSDrr128\000PABSWrm128\000PABSWrr128\000PACKSSDWrm\000"
    "PACKSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000P"
    "ACKUSWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000"
    "PADDQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000P"
    "ADDUSBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000"
    "PALIGNR128rm\000PALIGNR128rr\000PANDNrm\000PANDNrr\000PANDrm\000PANDrr\000"
    "PAUSE\000PAVGBrm\000PAVGBrr\000PAVGUSBrm\000PAVGUSBrr\000PAVGWrm\000PAV"
    "GWrr\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PCLMU"
    "LQDQrm\000PCLMULQDQrr\000PCMPEQBrm\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQD"
    "rr\000PCMPEQQrm\000PCMPEQQrr\000PCMPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000"
    "PCMPESTRIArr\000PCMPESTRICrm\000PCMPESTRICrr\000PCMPESTRIOrm\000PCMPEST"
    "RIOrr\000PCMPESTRISrm\000PCMPESTRISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000"
    "PCMPESTRIrm\000PCMPESTRIrr\000PCMPESTRM128MEM\000PCMPESTRM128REG\000PCM"
    "PESTRM128rm\000PCMPESTRM128rr\000PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000"
    "PCMPGTDrr\000PCMPGTQrm\000PCMPGTQrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPIS"
    "TRIArm\000PCMPISTRIArr\000PCMPISTRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000"
    "PCMPISTRIOrr\000PCMPISTRISrm\000PCMPISTRISrr\000PCMPISTRIZrm\000PCMPIST"
    "RIZrr\000PCMPISTRIrm\000PCMPISTRIrr\000PCMPISTRM128MEM\000PCMPISTRM128R"
    "EG\000PCMPISTRM128rm\000PCMPISTRM128rr\000PEXTRBmr\000PEXTRBrr\000PEXTR"
    "Dmr\000PEXTRDrr\000PEXTRQmr\000PEXTRQrr\000PEXTRWmr\000PEXTRWri\000PF2I"
    "Drm\000PF2IDrr\000PF2IWrm\000PF2IWrr\000PFACCrm\000PFACCrr\000PFADDrm\000"
    "PFADDrr\000PFCMPEQrm\000PFCMPEQrr\000PFCMPGErm\000PFCMPGErr\000PFCMPGTr"
    "m\000PFCMPGTrr\000PFMAXrm\000PFMAXrr\000PFMINrm\000PFMINrr\000PFMULrm\000"
    "PFMULrr\000PFNACCrm\000PFNACCrr\000PFPNACCrm\000PFPNACCrr\000PFRCPIT1rm"
    "\000PFRCPIT1rr\000PFRCPIT2rm\000PFRCPIT2rr\000PFRCPrm\000PFRCPrr\000PFR"
    "SQIT1rm\000PFRSQIT1rr\000PFRSQRTrm\000PFRSQRTrr\000PFSUBRrm\000PFSUBRrr"
    "\000PFSUBrm\000PFSUBrr\000PHADDDrm128\000PHADDDrr128\000PHADDSWrm128\000"
    "PHADDSWrr128\000PHADDWrm128\000PHADDWrr128\000PHMINPOSUWrm128\000PHMINP"
    "OSUWrr128\000PHSUBDrm128\000PHSUBDrr128\000PHSUBSWrm128\000PHSUBSWrr128"
    "\000PHSUBWrm128\000PHSUBWrr128\000PI2FDrm\000PI2FDrr\000PI2FWrm\000PI2F"
    "Wrr\000PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000PINS"
    "RQrr\000PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrr128\000P"
    "MADDWDrm\000PMADDWDrr\000PMAXSBrm\000PMAXSBrr\000PMAXSDrm\000PMAXSDrr\000"
    "PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000PMAXUBrr\000PMAXUDrm\000PMAXUDrr\000"
    "PMAXUWrm\000PMAXUWrr\000PMINSBrm\000PMINSBrr\000PMINSDrm\000PMINSDrr\000"
    "PMINSWrm\000PMINSWrr\000PMINUBrm\000PMINUBrr\000PMINUDrm\000PMINUDrr\000"
    "PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000PMOVSXBDrm\000PMOVSXBDrr\000PMOVS"
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    "VFMADDSUBPSr213r\000VFMADDSUBPSr213rY\000VFMADDSUBPSr231m\000VFMADDSUBP"
    "Sr231mY\000VFMADDSUBPSr231r\000VFMADDSUBPSr231rY\000VFMSUBADDPDr132m\000"
    "VFMSUBADDPDr132mY\000VFMSUBADDPDr132r\000VFMSUBADDPDr132rY\000VFMSUBADD"
    "PDr213m\000VFMSUBADDPDr213mY\000VFMSUBADDPDr213r\000VFMSUBADDPDr213rY\000"
    "VFMSUBADDPDr231m\000VFMSUBADDPDr231mY\000VFMSUBADDPDr231r\000VFMSUBADDP"
    "Dr231rY\000VFMSUBADDPSr132m\000VFMSUBADDPSr132mY\000VFMSUBADDPSr132r\000"
    "VFMSUBADDPSr132rY\000VFMSUBADDPSr213m\000VFMSUBADDPSr213mY\000VFMSUBADD"
    "PSr213r\000VFMSUBADDPSr213rY\000VFMSUBADDPSr231m\000VFMSUBADDPSr231mY\000"
    "VFMSUBADDPSr231r\000VFMSUBADDPSr231rY\000VFMSUBPDr132m\000VFMSUBPDr132m"
    "Y\000VFMSUBPDr132r\000VFMSUBPDr132rY\000VFMSUBPDr213m\000VFMSUBPDr213mY"
    "\000VFMSUBPDr213r\000VFMSUBPDr213rY\000VFMSUBPDr231m\000VFMSUBPDr231mY\000"
    "VFMSUBPDr231r\000VFMSUBPDr231rY\000VFMSUBPSr132m\000VFMSUBPSr132mY\000V"
    "FMSUBPSr132r\000VFMSUBPSr132rY\000VFMSUBPSr213m\000VFMSUBPSr213mY\000VF"
    "MSUBPSr213r\000VFMSUBPSr213rY\000VFMSUBPSr231m\000VFMSUBPSr231mY\000VFM"
    "SUBPSr231r\000VFMSUBPSr231rY\000VFNMADDPDr132m\000VFNMADDPDr132mY\000VF"
    "NMADDPDr132r\000VFNMADDPDr132rY\000VFNMADDPDr213m\000VFNMADDPDr213mY\000"
    "VFNMADDPDr213r\000VFNMADDPDr213rY\000VFNMADDPDr231m\000VFNMADDPDr231mY\000"
    "VFNMADDPDr231r\000VFNMADDPDr231rY\000VFNMADDPSr132m\000VFNMADDPSr132mY\000"
    "VFNMADDPSr132r\000VFNMADDPSr132rY\000VFNMADDPSr213m\000VFNMADDPSr213mY\000"
    "VFNMADDPSr213r\000VFNMADDPSr213rY\000VFNMADDPSr231m\000VFNMADDPSr231mY\000"
    "VFNMADDPSr231r\000VFNMADDPSr231rY\000VFNMSUBPDr132m\000VFNMSUBPDr132mY\000"
    "VFNMSUBPDr132r\000VFNMSUBPDr132rY\000VFNMSUBPDr213m\000VFNMSUBPDr213mY\000"
    "VFNMSUBPDr213r\000VFNMSUBPDr213rY\000VFNMSUBPDr231m\000VFNMSUBPDr231mY\000"
    "VFNMSUBPDr231r\000VFNMSUBPDr231rY\000VFNMSUBPSr132m\000VFNMSUBPSr132mY\000"
    "VFNMSUBPSr132r\000VFNMSUBPSr132rY\000VFNMSUBPSr213m\000VFNMSUBPSr213mY\000"
    "VFNMSUBPSr213r\000VFNMSUBPSr213rY\000VFNMSUBPSr231m\000VFNMSUBPSr231mY\000"
    "VFNMSUBPSr231r\000VFNMSUBPSr231rY\000VFsANDNPDrm\000VFsANDNPDrr\000VFsA"
    "NDNPSrm\000VFsANDNPSrr\000VFsANDPDrm\000VFsANDPDrr\000VFsANDPSrm\000VFs"
    "ANDPSrr\000VFsORPDrm\000VFsORPDrr\000VFsORPSrm\000VFsORPSrr\000VFsXORPD"
    "rm\000VFsXORPDrr\000VFsXORPSrm\000VFsXORPSrr\000VHADDPDYrm\000VHADDPDYr"
    "r\000VHADDPDrm\000VHADDPDrr\000VHADDPSYrm\000VHADDPSYrr\000VHADDPSrm\000"
    "VHADDPSrr\000VHSUBPDYrm\000VHSUBPDYrr\000VHSUBPDrm\000VHSUBPDrr\000VHSU"
    "BPSYrm\000VHSUBPSYrr\000VHSUBPSrm\000VHSUBPSrr\000VINSERTF128rm\000VINS"
    "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD"
    "MXCSR\000VMASKMOVDQU\000VMASKMOVDQU64\000VMASKMOVPDYmr\000VMASKMOVPDYrm"
    "\000VMASKMOVPDmr\000VMASKMOVPDrm\000VMASKMOVPSYmr\000VMASKMOVPSYrm\000V"
    "MASKMOVPSmr\000VMASKMOVPSrm\000VMAXPDYrm\000VMAXPDYrm_Int\000VMAXPDYrr\000"
    "VMAXPDYrr_Int\000VMAXPDrm\000VMAXPDrm_Int\000VMAXPDrr\000VMAXPDrr_Int\000"
    "VMAXPSYrm\000VMAXPSYrm_Int\000VMAXPSYrr\000VMAXPSYrr_Int\000VMAXPSrm\000"
    "VMAXPSrm_Int\000VMAXPSrr\000VMAXPSrr_Int\000VMAXSDrm\000VMAXSDrm_Int\000"
    "VMAXSDrr\000VMAXSDrr_Int\000VMAXSSrm\000VMAXSSrm_Int\000VMAXSSrr\000VMA"
    "XSSrr_Int\000VMCALL\000VMCLEARm\000VMINPDYrm\000VMINPDYrm_Int\000VMINPD"
    "Yrr\000VMINPDYrr_Int\000VMINPDrm\000VMINPDrm_Int\000VMINPDrr\000VMINPDr"
    "r_Int\000VMINPSYrm\000VMINPSYrm_Int\000VMINPSYrr\000VMINPSYrr_Int\000VM"
    "INPSrm\000VMINPSrm_Int\000VMINPSrr\000VMINPSrr_Int\000VMINSDrm\000VMINS"
    "Drm_Int\000VMINSDrr\000VMINSDrr_Int\000VMINSSrm\000VMINSSrm_Int\000VMIN"
    "SSrr\000VMINSSrr_Int\000VMLAUNCH\000VMOV64toPQIrr\000VMOV64toSDrm\000VM"
    "OV64toSDrr\000VMOVAPDYmr\000VMOVAPDYrm\000VMOVAPDYrr\000VMOVAPDYrr_REV\000"
    "VMOVAPDmr\000VMOVAPDrm\000VMOVAPDrr\000VMOVAPDrr_REV\000VMOVAPSYmr\000V"
    "MOVAPSYrm\000VMOVAPSYrr\000VMOVAPSYrr_REV\000VMOVAPSmr\000VMOVAPSrm\000"
    "VMOVAPSrr\000VMOVAPSrr_REV\000VMOVDDUPYrm\000VMOVDDUPYrr\000VMOVDDUPrm\000"
    "VMOVDDUPrr\000VMOVDI2PDIrm\000VMOVDI2PDIrr\000VMOVDI2SSrm\000VMOVDI2SSr"
    "r\000VMOVDQAYmr\000VMOVDQAYrm\000VMOVDQAYrr\000VMOVDQAYrr_REV\000VMOVDQ"
    "Amr\000VMOVDQArm\000VMOVDQArr\000VMOVDQArr_REV\000VMOVDQUYmr\000VMOVDQU"
    "Yrm\000VMOVDQUYrr\000VMOVDQUYrr_REV\000VMOVDQUmr\000VMOVDQUmr_Int\000VM"
    "OVDQUrm\000VMOVDQUrr\000VMOVDQUrr_REV\000VMOVHLPSrr\000VMOVHPDmr\000VMO"
    "VHPDrm\000VMOVHPSmr\000VMOVHPSrm\000VMOVLHPSrr\000VMOVLPDmr\000VMOVLPDr"
    "m\000VMOVLPSmr\000VMOVLPSrm\000VMOVLQ128mr\000VMOVMSKPDYr64r\000VMOVMSK"
    "PDYrr32\000VMOVMSKPDYrr64\000VMOVMSKPDr64r\000VMOVMSKPDrr32\000VMOVMSKP"
    "Drr64\000VMOVMSKPSYr64r\000VMOVMSKPSYrr32\000VMOVMSKPSYrr64\000VMOVMSKP"
    "Sr64r\000VMOVMSKPSrr32\000VMOVMSKPSrr64\000VMOVNTDQArm\000VMOVNTDQY_64m"
    "r\000VMOVNTDQYmr\000VMOVNTDQ_64mr\000VMOVNTDQmr\000VMOVNTPDYmr\000VMOVN"
    "TPDmr\000VMOVNTPSYmr\000VMOVNTPSmr\000VMOVPDI2DImr\000VMOVPDI2DIrr\000V"
    "MOVPQI2QImr\000VMOVPQIto64rr\000VMOVQI2PQIrm\000VMOVQd64rr\000VMOVQd64r"
    "r_alt\000VMOVQs64rr\000VMOVQxrxr\000VMOVSDmr\000VMOVSDrm\000VMOVSDrr\000"
    "VMOVSDrr_REV\000VMOVSDto64mr\000VMOVSDto64rr\000VMOVSHDUPYrm\000VMOVSHD"
    "UPYrr\000VMOVSHDUPrm\000VMOVSHDUPrr\000VMOVSLDUPYrm\000VMOVSLDUPYrr\000"
    "VMOVSLDUPrm\000VMOVSLDUPrr\000VMOVSS2DImr\000VMOVSS2DIrr\000VMOVSSmr\000"
    "VMOVSSrm\000VMOVSSrr\000VMOVSSrr_REV\000VMOVUPDYmr\000VMOVUPDYrm\000VMO"
    "VUPDYrr\000VMOVUPDYrr_REV\000VMOVUPDmr\000VMOVUPDrm\000VMOVUPDrr\000VMO"
    "VUPDrr_REV\000VMOVUPSYmr\000VMOVUPSYrm\000VMOVUPSYrr\000VMOVUPSYrr_REV\000"
    "VMOVUPSmr\000VMOVUPSrm\000VMOVUPSrr\000VMOVUPSrr_REV\000VMOVZDI2PDIrm\000"
    "VMOVZDI2PDIrr\000VMOVZPQILo2PQIrm\000VMOVZPQILo2PQIrr\000VMOVZQI2PQIrm\000"
    "VMOVZQI2PQIrr\000VMPSADBWrmi\000VMPSADBWrri\000VMPTRLDm\000VMPTRSTm\000"
    "VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMRESUME\000VMU"
    "LPDYrm\000VMULPDYrr\000VMULPDrm\000VMULPDrr\000VMULPSYrm\000VMULPSYrr\000"
    "VMULPSrm\000VMULPSrr\000VMULSDrm\000VMULSDrm_Int\000VMULSDrr\000VMULSDr"
    "r_Int\000VMULSSrm\000VMULSSrm_Int\000VMULSSrr\000VMULSSrr_Int\000VMWRIT"
    "E32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VMXOFF\000VMXON\000"
    "VORPDYrm\000VORPDYrr\000VORPDrm\000VORPDrr\000VORPSYrm\000VORPSYrr\000V"
    "ORPSrm\000VORPSrr\000VPABSBrm128\000VPABSBrr128\000VPABSDrm128\000VPABS"
    "Drr128\000VPABSWrm128\000VPABSWrr128\000VPACKSSDWrm\000VPACKSSDWrr\000V"
    "PACKSSWBrm\000VPACKSSWBrr\000VPACKUSDWrm\000VPACKUSDWrr\000VPACKUSWBrm\000"
    "VPACKUSWBrr\000VPADDBrm\000VPADDBrr\000VPADDDrm\000VPADDDrr\000VPADDQrm"
    "\000VPADDQrr\000VPADDSBrm\000VPADDSBrr\000VPADDSWrm\000VPADDSWrr\000VPA"
    "DDUSBrm\000VPADDUSBrr\000VPADDUSWrm\000VPADDUSWrr\000VPADDWrm\000VPADDW"
    "rr\000VPALIGNR128rm\000VPALIGNR128rr\000VPANDNrm\000VPANDNrr\000VPANDrm"
    "\000VPANDrr\000VPAVGBrm\000VPAVGBrr\000VPAVGWrm\000VPAVGWrr\000VPBLENDV"
    "Brm\000VPBLENDVBrr\000VPBLENDWrmi\000VPBLENDWrri\000VPCLMULQDQrm\000VPC"
    "LMULQDQrr\000VPCMPEQBrm\000VPCMPEQBrr\000VPCMPEQDrm\000VPCMPEQDrr\000VP"
    "CMPEQQrm\000VPCMPEQQrr\000VPCMPEQWrm\000VPCMPEQWrr\000VPCMPESTRIArm\000"
    "VPCMPESTRIArr\000VPCMPESTRICrm\000VPCMPESTRICrr\000VPCMPESTRIOrm\000VPC"
    "MPESTRIOrr\000VPCMPESTRISrm\000VPCMPESTRISrr\000VPCMPESTRIZrm\000VPCMPE"
    "STRIZrr\000VPCMPESTRIrm\000VPCMPESTRIrr\000VPCMPESTRM128MEM\000VPCMPEST"
    "RM128REG\000VPCMPESTRM128rm\000VPCMPESTRM128rr\000VPCMPGTBrm\000VPCMPGT"
    "Brr\000VPCMPGTDrm\000VPCMPGTDrr\000VPCMPGTQrm\000VPCMPGTQrr\000VPCMPGTW"
    "rm\000VPCMPGTWrr\000VPCMPISTRIArm\000VPCMPISTRIArr\000VPCMPISTRICrm\000"
    "VPCMPISTRICrr\000VPCMPISTRIOrm\000VPCMPISTRIOrr\000VPCMPISTRISrm\000VPC"
    "MPISTRISrr\000VPCMPISTRIZrm\000VPCMPISTRIZrr\000VPCMPISTRIrm\000VPCMPIS"
    "TRIrr\000VPCMPISTRM128MEM\000VPCMPISTRM128REG\000VPCMPISTRM128rm\000VPC"
    "MPISTRM128rr\000VPERM2F128rm\000VPERM2F128rr\000VPERMILPDYmi\000VPERMIL"
    "PDYri\000VPERMILPDYrm\000VPERMILPDYrr\000VPERMILPDmi\000VPERMILPDri\000"
    "VPERMILPDrm\000VPERMILPDrr\000VPERMILPSYmi\000VPERMILPSYri\000VPERMILPS"
    "Yrm\000VPERMILPSYrr\000VPERMILPSmi\000VPERMILPSri\000VPERMILPSrm\000VPE"
    "RMILPSrr\000VPEXTRBmr\000VPEXTRBrr\000VPEXTRBrr64\000VPEXTRDmr\000VPEXT"
    "RDrr\000VPEXTRQmr\000VPEXTRQrr\000VPEXTRWmr\000VPEXTRWri\000VPHADDDrm12"
    "8\000VPHADDDrr128\000VPHADDSWrm128\000VPHADDSWrr128\000VPHADDWrm128\000"
    "VPHADDWrr128\000VPHMINPOSUWrm128\000VPHMINPOSUWrr128\000VPHSUBDrm128\000"
    "VPHSUBDrr128\000VPHSUBSWrm128\000VPHSUBSWrr128\000VPHSUBWrm128\000VPHSU"
    "BWrr128\000VPINSRBrm\000VPINSRBrr\000VPINSRDrm\000VPINSRDrr\000VPINSRQr"
    "m\000VPINSRQrr\000VPINSRWrmi\000VPINSRWrr64i\000VPINSRWrri\000VPMADDUBS"
    "Wrm128\000VPMADDUBSWrr128\000VPMADDWDrm\000VPMADDWDrr\000VPMAXSBrm\000V"
    "PMAXSBrr\000VPMAXSDrm\000VPMAXSDrr\000VPMAXSWrm\000VPMAXSWrr\000VPMAXUB"
    "rm\000VPMAXUBrr\000VPMAXUDrm\000VPMAXUDrr\000VPMAXUWrm\000VPMAXUWrr\000"
    "VPMINSBrm\000VPMINSBrr\000VPMINSDrm\000VPMINSDrr\000VPMINSWrm\000VPMINS"
    "Wrr\000VPMINUBrm\000VPMINUBrr\000VPMINUDrm\000VPMINUDrr\000VPMINUWrm\000"
    "VPMINUWrr\000VPMOVMSKBr64r\000VPMOVMSKBrr\000VPMOVSXBDrm\000VPMOVSXBDrr"
    "\000VPMOVSXBQrm\000VPMOVSXBQrr\000VPMOVSXBWrm\000VPMOVSXBWrr\000VPMOVSX"
    "DQrm\000VPMOVSXDQrr\000VPMOVSXWDrm\000VPMOVSXWDrr\000VPMOVSXWQrm\000VPM"
    "OVSXWQrr\000VPMOVZXBDrm\000VPMOVZXBDrr\000VPMOVZXBQrm\000VPMOVZXBQrr\000"
    "VPMOVZXBWrm\000VPMOVZXBWrr\000VPMOVZXDQrm\000VPMOVZXDQrr\000VPMOVZXWDrm"
    "\000VPMOVZXWDrr\000VPMOVZXWQrm\000VPMOVZXWQrr\000VPMULDQrm\000VPMULDQrr"
    "\000VPMULHRSWrm128\000VPMULHRSWrr128\000VPMULHUWrm\000VPMULHUWrr\000VPM"
    "ULHWrm\000VPMULHWrr\000VPMULLDrm\000VPMULLDrr\000VPMULLWrm\000VPMULLWrr"
    "\000VPMULUDQrm\000VPMULUDQrr\000VPORrm\000VPORrr\000VPSADBWrm\000VPSADB"
    "Wrr\000VPSHUFBrm128\000VPSHUFBrr128\000VPSHUFDmi\000VPSHUFDri\000VPSHUF"
    "HWmi\000VPSHUFHWri\000VPSHUFLWmi\000VPSHUFLWri\000VPSIGNBrm128\000VPSIG"
    "NBrr128\000VPSIGNDrm128\000VPSIGNDrr128\000VPSIGNWrm128\000VPSIGNWrr128"
    "\000VPSLLDQri\000VPSLLDri\000VPSLLDrm\000VPSLLDrr\000VPSLLQri\000VPSLLQ"
    "rm\000VPSLLQrr\000VPSLLWri\000VPSLLWrm\000VPSLLWrr\000VPSRADri\000VPSRA"
    "Drm\000VPSRADrr\000VPSRAWri\000VPSRAWrm\000VPSRAWrr\000VPSRLDQri\000VPS"
    "RLDri\000VPSRLDrm\000VPSRLDrr\000VPSRLQri\000VPSRLQrm\000VPSRLQrr\000VP"
    "SRLWri\000VPSRLWrm\000VPSRLWrr\000VPSUBBrm\000VPSUBBrr\000VPSUBDrm\000V"
    "PSUBDrr\000VPSUBQrm\000VPSUBQrr\000VPSUBSBrm\000VPSUBSBrr\000VPSUBSWrm\000"
    "VPSUBSWrr\000VPSUBUSBrm\000VPSUBUSBrr\000VPSUBUSWrm\000VPSUBUSWrr\000VP"
    "SUBWrm\000VPSUBWrr\000VPTESTYrm\000VPTESTYrr\000VPTESTrm\000VPTESTrr\000"
    "VPUNPCKHBWrm\000VPUNPCKHBWrr\000VPUNPCKHDQrm\000VPUNPCKHDQrr\000VPUNPCK"
    "HQDQrm\000VPUNPCKHQDQrr\000VPUNPCKHWDrm\000VPUNPCKHWDrr\000VPUNPCKLBWrm"
    "\000VPUNPCKLBWrr\000VPUNPCKLDQrm\000VPUNPCKLDQrr\000VPUNPCKLQDQrm\000VP"
    "UNPCKLQDQrr\000VPUNPCKLWDrm\000VPUNPCKLWDrr\000VPXORrm\000VPXORrr\000VR"
    "CPPSYm\000VRCPPSYm_Int\000VRCPPSYr\000VRCPPSYr_Int\000VRCPPSm\000VRCPPS"
    "m_Int\000VRCPPSr\000VRCPPSr_Int\000VRCPSSm\000VRCPSSm_Int\000VRCPSSr\000"
    "VROUNDPDm\000VROUNDPDm_AVX\000VROUNDPDr\000VROUNDPDr_AVX\000VROUNDPSm\000"
    "VROUNDPSm_AVX\000VROUNDPSr\000VROUNDPSr_AVX\000VROUNDSDm\000VROUNDSDm_A"
    "VX\000VROUNDSDr\000VROUNDSDr_AVX\000VROUNDSSm\000VROUNDSSm_AVX\000VROUN"
    "DSSr\000VROUNDSSr_AVX\000VROUNDYPDm\000VROUNDYPDm_AVX\000VROUNDYPDr\000"
    "VROUNDYPDr_AVX\000VROUNDYPSm\000VROUNDYPSm_AVX\000VROUNDYPSr\000VROUNDY"
    "PSr_AVX\000VRSQRTPSYm\000VRSQRTPSYm_Int\000VRSQRTPSYr\000VRSQRTPSYr_Int"
    "\000VRSQRTPSm\000VRSQRTPSm_Int\000VRSQRTPSr\000VRSQRTPSr_Int\000VRSQRTS"
    "Sm\000VRSQRTSSm_Int\000VRSQRTSSr\000VSHUFPDYrmi\000VSHUFPDYrri\000VSHUF"
    "PDrmi\000VSHUFPDrri\000VSHUFPSYrmi\000VSHUFPSYrri\000VSHUFPSrmi\000VSHU"
    "FPSrri\000VSQRTPDYm\000VSQRTPDYm_Int\000VSQRTPDYr\000VSQRTPDYr_Int\000V"
    "SQRTPDm\000VSQRTPDm_Int\000VSQRTPDr\000VSQRTPDr_Int\000VSQRTPSYm\000VSQ"
    "RTPSYm_Int\000VSQRTPSYr\000VSQRTPSYr_Int\000VSQRTPSm\000VSQRTPSm_Int\000"
    "VSQRTPSr\000VSQRTPSr_Int\000VSQRTSDm\000VSQRTSDm_Int\000VSQRTSDr\000VSQ"
    "RTSSm\000VSQRTSSm_Int\000VSQRTSSr\000VSTMXCSR\000VSUBPDYrm\000VSUBPDYrr"
    "\000VSUBPDrm\000VSUBPDrr\000VSUBPSYrm\000VSUBPSYrr\000VSUBPSrm\000VSUBP"
    "Srr\000VSUBSDrm\000VSUBSDrm_Int\000VSUBSDrr\000VSUBSDrr_Int\000VSUBSSrm"
    "\000VSUBSSrm_Int\000VSUBSSrr\000VSUBSSrr_Int\000VTESTPDYrm\000VTESTPDYr"
    "r\000VTESTPDrm\000VTESTPDrr\000VTESTPSYrm\000VTESTPSYrr\000VTESTPSrm\000"
    "VTESTPSrr\000VUCOMISDrm\000VUCOMISDrr\000VUCOMISSrm\000VUCOMISSrr\000VU"
    "NPCKHPDYrm\000VUNPCKHPDYrr\000VUNPCKHPDrm\000VUNPCKHPDrr\000VUNPCKHPSYr"
    "m\000VUNPCKHPSYrr\000VUNPCKHPSrm\000VUNPCKHPSrr\000VUNPCKLPDYrm\000VUNP"
    "CKLPDYrr\000VUNPCKLPDrm\000VUNPCKLPDrr\000VUNPCKLPSYrm\000VUNPCKLPSYrr\000"
    "VUNPCKLPSrm\000VUNPCKLPSrr\000VXORPDYrm\000VXORPDYrr\000VXORPDrm\000VXO"
    "RPDrr\000VXORPSYrm\000VXORPSYrr\000VXORPSrm\000VXORPSrr\000VZEROALL\000"
    "VZEROUPPER\000V_SET0\000V_SETALLONES\000W64ALLOCA\000WAIT\000WBINVD\000"
    "WINCALL64m\000WINCALL64pcrel32\000WINCALL64r\000WIN_ALLOCA\000WRFSBASE\000"
    "WRFSBASE64\000WRGSBASE\000WRGSBASE64\000WRMSR\000XADD16rm\000XADD16rr\000"
    "XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XADD8rm\000XADD8rr\000X"
    "CHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG32ar64\000XCHG32rm\000"
    "XCHG32rr\000XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG8rr\000X"
    "CH_F\000XCRYPTCBC\000XCRYPTCFB\000XCRYPTCTR\000XCRYPTECB\000XCRYPTOFB\000"
    "XGETBV\000XLAT\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000XOR16ri"
    "\000XOR16ri8\000XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000XOR32m"
    "i\000XOR32mi8\000XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR32rr\000"
    "XOR32rr_REV\000XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000XOR64ri3"
    "2\000XOR64ri8\000XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000XOR8mi\000"
    "XOR8mr\000XOR8ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm\000XORPDr"
    "r\000XORPSrm\000XORPSrr\000XRSTOR\000XRSTOR64\000XSAVE\000XSAVE64\000XS"
    "AVEOPT\000XSAVEOPT64\000XSETBV\000XSHA1\000XSHA256\000XSTORE\000";
  return Strs+InstAsmOffset[Opcode];
}

#endif

#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR

namespace { // Register classes
  enum RegClass {
    RC_GR8,
    RC_GR64,
    RC_GR16,
    RC_GR32,
    RC_FR32,
    RC_GR64_with_sub_8bit,
    RC_FR64,
    RC_CONTROL_REG,
    RC_VR128,
    RC_VR256,
    RC_GR32_NOSP,
    RC_GR32_NOAX,
    RC_GR64_NOSP,
    RC_GR64_TC,
    RC_GR64_NOREX,
    RC_GR8_NOREX,
    RC_GR16_NOREX,
    RC_GR32_NOREX,
    RC_DEBUG_REG,
    RC_VR64,
    RC_GR64_TC_with_sub_8bit,
    RC_GR64_NOREX_with_sub_8bit,
    RC_RST,
    RC_RFP32,
    RC_GR32_NOREX_NOSP,
    RC_RFP64,
    RC_GR64_NOREX_NOSP,
    RC_RFP80,
    RC_SEGMENT_REG,
    RC_GR64_TCW64,
    RC_GR8_ABCD_L,
    RC_GR8_ABCD_H,
    RC_GR16_ABCD,
    RC_GR32_ABCD,
    RC_GR64_ABCD,
    RC_GR32_TC,
    RC_GR32_NOAX_with_sub_8bit_hi,
    RC_GR64_TC_with_sub_8bit_hi,
    RC_GR32_AD,
    RC_CCR
  };
} // end anonymous namespace

static bool regIsInRegisterClass(unsigned RegClass, unsigned Reg) {
  switch (RegClass) {
  default: break;
  case RC_GR8:
    switch (Reg) {
    default: break;
    case X86::AL:
    case X86::CL:
    case X86::DL:
    case X86::AH:
    case X86::CH:
    case X86::DH:
    case X86::BL:
    case X86::BH:
    case X86::SIL:
    case X86::DIL:
    case X86::BPL:
    case X86::SPL:
    case X86::R8B:
    case X86::R9B:
    case X86::R10B:
    case X86::R11B:
    case X86::R14B:
    case X86::R15B:
    case X86::R12B:
    case X86::R13B:
      return true;
    }
    break;
  case RC_GR64:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::R8:
    case X86::R9:
    case X86::R10:
    case X86::R11:
    case X86::RBX:
    case X86::R14:
    case X86::R15:
    case X86::R12:
    case X86::R13:
    case X86::RBP:
    case X86::RSP:
    case X86::RIP:
      return true;
    }
    break;
  case RC_GR16:
    switch (Reg) {
    default: break;
    case X86::AX:
    case X86::CX:
    case X86::DX:
    case X86::SI:
    case X86::DI:
    case X86::BX:
    case X86::BP:
    case X86::SP:
    case X86::R8W:
    case X86::R9W:
    case X86::R10W:
    case X86::R11W:
    case X86::R14W:
    case X86::R15W:
    case X86::R12W:
    case X86::R13W:
      return true;
    }
    break;
  case RC_GR32:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
    case X86::ESI:
    case X86::EDI:
    case X86::EBX:
    case X86::EBP:
    case X86::ESP:
    case X86::R8D:
    case X86::R9D:
    case X86::R10D:
    case X86::R11D:
    case X86::R14D:
    case X86::R15D:
    case X86::R12D:
    case X86::R13D:
      return true;
    }
    break;
  case RC_FR32:
    switch (Reg) {
    default: break;
    case X86::XMM0:
    case X86::XMM1:
    case X86::XMM2:
    case X86::XMM3:
    case X86::XMM4:
    case X86::XMM5:
    case X86::XMM6:
    case X86::XMM7:
    case X86::XMM8:
    case X86::XMM9:
    case X86::XMM10:
    case X86::XMM11:
    case X86::XMM12:
    case X86::XMM13:
    case X86::XMM14:
    case X86::XMM15:
      return true;
    }
    break;
  case RC_GR64_with_sub_8bit:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::R8:
    case X86::R9:
    case X86::R10:
    case X86::R11:
    case X86::RBX:
    case X86::R14:
    case X86::R15:
    case X86::R12:
    case X86::R13:
    case X86::RBP:
    case X86::RSP:
      return true;
    }
    break;
  case RC_FR64:
    switch (Reg) {
    default: break;
    case X86::XMM0:
    case X86::XMM1:
    case X86::XMM2:
    case X86::XMM3:
    case X86::XMM4:
    case X86::XMM5:
    case X86::XMM6:
    case X86::XMM7:
    case X86::XMM8:
    case X86::XMM9:
    case X86::XMM10:
    case X86::XMM11:
    case X86::XMM12:
    case X86::XMM13:
    case X86::XMM14:
    case X86::XMM15:
      return true;
    }
    break;
  case RC_CONTROL_REG:
    switch (Reg) {
    default: break;
    case X86::CR0:
    case X86::CR1:
    case X86::CR2:
    case X86::CR3:
    case X86::CR4:
    case X86::CR5:
    case X86::CR6:
    case X86::CR7:
    case X86::CR8:
    case X86::CR9:
    case X86::CR10:
    case X86::CR11:
    case X86::CR12:
    case X86::CR13:
    case X86::CR14:
    case X86::CR15:
      return true;
    }
    break;
  case RC_VR128:
    switch (Reg) {
    default: break;
    case X86::XMM0:
    case X86::XMM1:
    case X86::XMM2:
    case X86::XMM3:
    case X86::XMM4:
    case X86::XMM5:
    case X86::XMM6:
    case X86::XMM7:
    case X86::XMM8:
    case X86::XMM9:
    case X86::XMM10:
    case X86::XMM11:
    case X86::XMM12:
    case X86::XMM13:
    case X86::XMM14:
    case X86::XMM15:
      return true;
    }
    break;
  case RC_VR256:
    switch (Reg) {
    default: break;
    case X86::YMM0:
    case X86::YMM1:
    case X86::YMM2:
    case X86::YMM3:
    case X86::YMM4:
    case X86::YMM5:
    case X86::YMM6:
    case X86::YMM7:
    case X86::YMM8:
    case X86::YMM9:
    case X86::YMM10:
    case X86::YMM11:
    case X86::YMM12:
    case X86::YMM13:
    case X86::YMM14:
    case X86::YMM15:
      return true;
    }
    break;
  case RC_GR32_NOSP:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
    case X86::ESI:
    case X86::EDI:
    case X86::EBX:
    case X86::EBP:
    case X86::R8D:
    case X86::R9D:
    case X86::R10D:
    case X86::R11D:
    case X86::R14D:
    case X86::R15D:
    case X86::R12D:
    case X86::R13D:
      return true;
    }
    break;
  case RC_GR32_NOAX:
    switch (Reg) {
    default: break;
    case X86::ECX:
    case X86::EDX:
    case X86::ESI:
    case X86::EDI:
    case X86::EBX:
    case X86::EBP:
    case X86::ESP:
    case X86::R8D:
    case X86::R9D:
    case X86::R10D:
    case X86::R11D:
    case X86::R14D:
    case X86::R15D:
    case X86::R12D:
    case X86::R13D:
      return true;
    }
    break;
  case RC_GR64_NOSP:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::R8:
    case X86::R9:
    case X86::R10:
    case X86::R11:
    case X86::RBX:
    case X86::R14:
    case X86::R15:
    case X86::R12:
    case X86::R13:
    case X86::RBP:
      return true;
    }
    break;
  case RC_GR64_TC:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::R8:
    case X86::R9:
    case X86::R11:
    case X86::RIP:
      return true;
    }
    break;
  case RC_GR64_NOREX:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::RBX:
    case X86::RBP:
    case X86::RSP:
    case X86::RIP:
      return true;
    }
    break;
  case RC_GR8_NOREX:
    switch (Reg) {
    default: break;
    case X86::AL:
    case X86::CL:
    case X86::DL:
    case X86::AH:
    case X86::CH:
    case X86::DH:
    case X86::BL:
    case X86::BH:
      return true;
    }
    break;
  case RC_GR16_NOREX:
    switch (Reg) {
    default: break;
    case X86::AX:
    case X86::CX:
    case X86::DX:
    case X86::SI:
    case X86::DI:
    case X86::BX:
    case X86::BP:
    case X86::SP:
      return true;
    }
    break;
  case RC_GR32_NOREX:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
    case X86::ESI:
    case X86::EDI:
    case X86::EBX:
    case X86::EBP:
    case X86::ESP:
      return true;
    }
    break;
  case RC_DEBUG_REG:
    switch (Reg) {
    default: break;
    case X86::DR0:
    case X86::DR1:
    case X86::DR2:
    case X86::DR3:
    case X86::DR4:
    case X86::DR5:
    case X86::DR6:
    case X86::DR7:
      return true;
    }
    break;
  case RC_VR64:
    switch (Reg) {
    default: break;
    case X86::MM0:
    case X86::MM1:
    case X86::MM2:
    case X86::MM3:
    case X86::MM4:
    case X86::MM5:
    case X86::MM6:
    case X86::MM7:
      return true;
    }
    break;
  case RC_GR64_TC_with_sub_8bit:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::R8:
    case X86::R9:
    case X86::R11:
      return true;
    }
    break;
  case RC_GR64_NOREX_with_sub_8bit:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::RBX:
    case X86::RBP:
    case X86::RSP:
      return true;
    }
    break;
  case RC_RST:
    switch (Reg) {
    default: break;
    case X86::ST0:
    case X86::ST1:
    case X86::ST2:
    case X86::ST3:
    case X86::ST4:
    case X86::ST5:
    case X86::ST6:
    case X86::ST7:
      return true;
    }
    break;
  case RC_RFP32:
    switch (Reg) {
    default: break;
    case X86::FP0:
    case X86::FP1:
    case X86::FP2:
    case X86::FP3:
    case X86::FP4:
    case X86::FP5:
    case X86::FP6:
      return true;
    }
    break;
  case RC_GR32_NOREX_NOSP:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
    case X86::ESI:
    case X86::EDI:
    case X86::EBX:
    case X86::EBP:
      return true;
    }
    break;
  case RC_RFP64:
    switch (Reg) {
    default: break;
    case X86::FP0:
    case X86::FP1:
    case X86::FP2:
    case X86::FP3:
    case X86::FP4:
    case X86::FP5:
    case X86::FP6:
      return true;
    }
    break;
  case RC_GR64_NOREX_NOSP:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RSI:
    case X86::RDI:
    case X86::RBX:
    case X86::RBP:
      return true;
    }
    break;
  case RC_RFP80:
    switch (Reg) {
    default: break;
    case X86::FP0:
    case X86::FP1:
    case X86::FP2:
    case X86::FP3:
    case X86::FP4:
    case X86::FP5:
    case X86::FP6:
      return true;
    }
    break;
  case RC_SEGMENT_REG:
    switch (Reg) {
    default: break;
    case X86::CS:
    case X86::DS:
    case X86::SS:
    case X86::ES:
    case X86::FS:
    case X86::GS:
      return true;
    }
    break;
  case RC_GR64_TCW64:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::R8:
    case X86::R9:
    case X86::R11:
      return true;
    }
    break;
  case RC_GR8_ABCD_L:
    switch (Reg) {
    default: break;
    case X86::AL:
    case X86::CL:
    case X86::DL:
    case X86::BL:
      return true;
    }
    break;
  case RC_GR8_ABCD_H:
    switch (Reg) {
    default: break;
    case X86::AH:
    case X86::CH:
    case X86::DH:
    case X86::BH:
      return true;
    }
    break;
  case RC_GR16_ABCD:
    switch (Reg) {
    default: break;
    case X86::AX:
    case X86::CX:
    case X86::DX:
    case X86::BX:
      return true;
    }
    break;
  case RC_GR32_ABCD:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
    case X86::EBX:
      return true;
    }
    break;
  case RC_GR64_ABCD:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
    case X86::RBX:
      return true;
    }
    break;
  case RC_GR32_TC:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::ECX:
    case X86::EDX:
      return true;
    }
    break;
  case RC_GR32_NOAX_with_sub_8bit_hi:
    switch (Reg) {
    default: break;
    case X86::ECX:
    case X86::EDX:
    case X86::EBX:
      return true;
    }
    break;
  case RC_GR64_TC_with_sub_8bit_hi:
    switch (Reg) {
    default: break;
    case X86::RAX:
    case X86::RCX:
    case X86::RDX:
      return true;
    }
    break;
  case RC_GR32_AD:
    switch (Reg) {
    default: break;
    case X86::EAX:
    case X86::EDX:
      return true;
    }
    break;
  case RC_CCR:
    if (Reg == X86::EFLAGS)
      return true;
    break;
  }

  return false;
}

static unsigned getMapOperandNumber(const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,
                                    StringRef Name) {
  for (SmallVectorImpl<std::pair<StringRef, unsigned> >::const_iterator
         I = OpMap.begin(), E = OpMap.end(); I != E; ++I)
    if (I->first == Name)
      return I->second;
  assert(false && "Operand not in map!");
  return 0;
}

bool X86IntelInstPrinter::printAliasInstr(const MCInst *MI, raw_ostream &OS) {
  StringRef AsmString;
  SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;
  switch (MI->getOpcode()) {
  default: return false;
  case X86::AAD8i8:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getImm() == 10) {
      // (AAD8i8 10)
      AsmString = "aad";
      break;
    }
    return false;
  case X86::AAM8i8:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getImm() == 10) {
      // (AAM8i8 10)
      AsmString = "aam";
      break;
    }
    return false;
  case X86::COM_FIPr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (COM_FIPr ST1)
      AsmString = "fcompi";
      break;
    }
    return false;
  case X86::COM_FIr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (COM_FIr ST1)
      AsmString = "fcomi";
      break;
    }
    return false;
  case X86::DIVR_FPrST0:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (DIVR_FPrST0 ST1)
      AsmString = "fdivp";
      break;
    }
    return false;
  case X86::DIV_FPrST0:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (DIV_FPrST0 ST1)
      AsmString = "fdivrp";
      break;
    }
    return false;
  case X86::FNSTSW8r:
    if (MI->getNumOperands() == 0) {
      // (FNSTSW8r)
      AsmString = "fnstsw";
      break;
    }
    return false;
  case X86::IN16rr:
    if (MI->getNumOperands() == 0) {
      // (IN16rr)
      AsmString = "inw %dx";
      break;
    }
    return false;
  case X86::IN32rr:
    if (MI->getNumOperands() == 0) {
      // (IN32rr)
      AsmString = "inl %dx";
      break;
    }
    return false;
  case X86::IN8rr:
    if (MI->getNumOperands() == 0) {
      // (IN8rr)
      AsmString = "inb %dx";
      break;
    }
    return false;
  case X86::MOVSD:
    if (MI->getNumOperands() == 0) {
      // (MOVSD)
      AsmString = "movsd";
      break;
    }
    return false;
  case X86::MUL_FPrST0:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (MUL_FPrST0 ST1)
      AsmString = "fmulp";
      break;
    }
    return false;
  case X86::OUT16rr:
    if (MI->getNumOperands() == 0) {
      // (OUT16rr)
      AsmString = "outw %dx";
      break;
    }
    return false;
  case X86::OUT32rr:
    if (MI->getNumOperands() == 0) {
      // (OUT32rr)
      AsmString = "outl %dx";
      break;
    }
    return false;
  case X86::OUT8rr:
    if (MI->getNumOperands() == 0) {
      // (OUT8rr)
      AsmString = "outb %dx";
      break;
    }
    return false;
  case X86::SHLD16rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHLD16rri8 GR16:$r1, GR16:$r2, 1)
      AsmString = "shldw $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SHLD32rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHLD32rri8 GR32:$r1, GR32:$r2, 1)
      AsmString = "shldl $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SHLD64rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHLD64rri8 GR64:$r1, GR64:$r2, 1)
      AsmString = "shldq $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SHRD16rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHRD16rri8 GR16:$r1, GR16:$r2, 1)
      AsmString = "shrdw $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SHRD32rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHRD32rri8 GR32:$r1, GR32:$r2, 1)
      AsmString = "shrdl $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SHRD64rri8:
    if (MI->getNumOperands() == 3 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) &&
        MI->getOperand(2).getImm() == 1) {
      // (SHRD64rri8 GR64:$r1, GR64:$r2, 1)
      AsmString = "shrdq $r1, $r2";
      OpMap.push_back(std::make_pair("r1", 0));
      OpMap.push_back(std::make_pair("r2", 1));
      break;
    }
    return false;
  case X86::SUBR_FPrST0:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (SUBR_FPrST0 ST1)
      AsmString = "fsubp";
      break;
    }
    return false;
  case X86::SUB_FPrST0:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (SUB_FPrST0 ST1)
      AsmString = "fsubrp";
      break;
    }
    return false;
  case X86::UCOM_FIPr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (UCOM_FIPr ST1)
      AsmString = "fucompi";
      break;
    }
    return false;
  case X86::UCOM_FIr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (UCOM_FIr ST1)
      AsmString = "fucomi";
      break;
    }
    return false;
  case X86::UCOM_FPr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (UCOM_FPr ST1)
      AsmString = "fucomp";
      break;
    }
    return false;
  case X86::UCOM_Fr:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (UCOM_Fr ST1)
      AsmString = "fucom";
      break;
    }
    return false;
  case X86::XCH_F:
    if (MI->getNumOperands() == 1 &&
        MI->getOperand(0).getReg() == X86::ST1) {
      // (XCH_F ST1)
      AsmString = "fxch";
      break;
    }
    return false;
  case X86::XOR16rr:
    if (MI->getNumOperands() == 2 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
      // (XOR16rr GR16:$reg, GR16:$reg)
      AsmString = "clrw $reg";
      OpMap.push_back(std::make_pair("reg", 0));
      break;
    }
    return false;
  case X86::XOR32rr:
    if (MI->getNumOperands() == 2 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
      // (XOR32rr GR32:$reg, GR32:$reg)
      AsmString = "clrl $reg";
      OpMap.push_back(std::make_pair("reg", 0));
      break;
    }
    return false;
  case X86::XOR64rr:
    if (MI->getNumOperands() == 2 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
      // (XOR64rr GR64:$reg, GR64:$reg)
      AsmString = "clrq $reg";
      OpMap.push_back(std::make_pair("reg", 0));
      break;
    }
    return false;
  case X86::XOR8rr:
    if (MI->getNumOperands() == 2 &&
        MI->getOperand(0).isReg() &&
        regIsInRegisterClass(RC_GR8, MI->getOperand(0).getReg()) &&
        MI->getOperand(1).isReg() &&
        MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
      // (XOR8rr GR8:$reg, GR8:$reg)
      AsmString = "clrb $reg";
      OpMap.push_back(std::make_pair("reg", 0));
      break;
    }
    return false;
  case X86::XSTORE:
    if (MI->getNumOperands() == 0) {
      // (XSTORE)
      AsmString = "xstorerng";
      break;
    }
    return false;
  }

  std::pair<StringRef, StringRef> ASM = AsmString.split(' ');
  OS << '\t' << ASM.first;
  if (!ASM.second.empty()) {
    OS << '\t';
    for (StringRef::iterator
         I = ASM.second.begin(), E = ASM.second.end(); I != E; ) {
      if (*I == '$') {
        StringRef::iterator Start = ++I;
        while (I != E &&
               ((*I >= 'a' && *I <= 'z') ||
                (*I >= 'A' && *I <= 'Z') ||
                (*I >= '0' && *I <= '9') ||
                *I == '_'))
          ++I;
        StringRef Name(Start, I - Start);
        printOperand(MI, getMapOperandNumber(OpMap, Name), OS);
      } else {
        OS << *I++;
      }
    }
  }

  return true;
}

#endif // PRINT_ALIAS_INSTR