diff --git a/src/IceCfg.h b/src/IceCfg.h
index e96804c..83c4ddd 100644
--- a/src/IceCfg.h
+++ b/src/IceCfg.h
@@ -104,6 +104,8 @@
   // Manage Variables.
   // Create a new Variable with a particular type and an optional
   // name.  The Node argument is the node where the variable is defined.
+  // TODO(jpp): untemplate this with two separate methods: makeVariable and
+  // makeSpillVariable.
   template <typename T = Variable> T *makeVariable(Type Ty) {
     SizeT Index = Variables.size();
     T *Var = T::create(this, Ty, Index);
diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index 4570d9f..94e9687 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -85,15 +85,15 @@
   }
 
   // The maximum number of arguments to pass in XMM registers
-  static constexpr uint32_t X86_MAX_XMM_ARGS = 4;
+  static const uint32_t X86_MAX_XMM_ARGS = 4;
   // The number of bits in a byte
-  static constexpr uint32_t X86_CHAR_BIT = 8;
+  static const uint32_t X86_CHAR_BIT = 8;
   // Stack alignment
   static const uint32_t X86_STACK_ALIGNMENT_BYTES;
   // Size of the return address on the stack
-  static constexpr uint32_t X86_RET_IP_SIZE_BYTES = 4;
+  static const uint32_t X86_RET_IP_SIZE_BYTES = 4;
   // The number of different NOP instructions
-  static constexpr uint32_t X86_NUM_NOP_VARIANTS = 5;
+  static const uint32_t X86_NUM_NOP_VARIANTS = 5;
 
   // Value is in bytes. Return Value adjusted to the next highest multiple
   // of the stack alignment.
@@ -111,7 +111,7 @@
 #undef X
 };
 
-constexpr size_t MachineTraits<TargetX8632>::TableFcmpSize =
+const size_t MachineTraits<TargetX8632>::TableFcmpSize =
     llvm::array_lengthof(TableFcmp);
 
 const MachineTraits<TargetX8632>::TableIcmp32Type
@@ -123,7 +123,7 @@
 #undef X
 };
 
-constexpr size_t MachineTraits<TargetX8632>::TableIcmp32Size =
+const size_t MachineTraits<TargetX8632>::TableIcmp32Size =
     llvm::array_lengthof(TableIcmp32);
 
 const MachineTraits<TargetX8632>::TableIcmp64Type
@@ -135,7 +135,7 @@
 #undef X
 };
 
-constexpr size_t MachineTraits<TargetX8632>::TableIcmp64Size =
+const size_t MachineTraits<TargetX8632>::TableIcmp64Size =
     llvm::array_lengthof(TableIcmp64);
 
 const MachineTraits<TargetX8632>::TableTypeX8632AttributesType
@@ -147,7 +147,7 @@
 #undef X
 };
 
-constexpr size_t MachineTraits<TargetX8632>::TableTypeX8632AttributesSize =
+const size_t MachineTraits<TargetX8632>::TableTypeX8632AttributesSize =
     llvm::array_lengthof(TableTypeX8632Attributes);
 
 const uint32_t MachineTraits<TargetX8632>::X86_STACK_ALIGNMENT_BYTES = 16;
diff --git a/src/IceTargetLoweringX86Base.h b/src/IceTargetLoweringX86Base.h
index a7c4275..495a010 100644
--- a/src/IceTargetLoweringX86Base.h
+++ b/src/IceTargetLoweringX86Base.h
@@ -16,6 +16,7 @@
 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H
 #define SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H
 
+#include <type_traits>
 #include <unordered_map>
 
 #include "IceDefs.h"
@@ -30,71 +31,74 @@
 template <class Machine> struct MachineTraits {};
 
 template <class Machine> class TargetX86Base : public Machine {
+  static_assert(std::is_base_of<::Ice::TargetLowering, Machine>::value,
+                "Machine template parameter must be a TargetLowering.");
+
   TargetX86Base() = delete;
   TargetX86Base(const TargetX86Base &) = delete;
   TargetX86Base &operator=(const TargetX86Base &) = delete;
 
 protected:
-  using TargetLowering::H_bitcast_16xi1_i16;
-  using TargetLowering::H_bitcast_8xi1_i8;
-  using TargetLowering::H_bitcast_i16_16xi1;
-  using TargetLowering::H_bitcast_i8_8xi1;
-  using TargetLowering::H_call_ctpop_i32;
-  using TargetLowering::H_call_ctpop_i64;
-  using TargetLowering::H_call_longjmp;
-  using TargetLowering::H_call_memcpy;
-  using TargetLowering::H_call_memmove;
-  using TargetLowering::H_call_memset;
-  using TargetLowering::H_call_read_tp;
-  using TargetLowering::H_call_setjmp;
-  using TargetLowering::H_fptosi_f32_i64;
-  using TargetLowering::H_fptosi_f64_i64;
-  using TargetLowering::H_fptoui_4xi32_f32;
-  using TargetLowering::H_fptoui_f32_i32;
-  using TargetLowering::H_fptoui_f32_i64;
-  using TargetLowering::H_fptoui_f64_i32;
-  using TargetLowering::H_fptoui_f64_i64;
-  using TargetLowering::H_frem_f32;
-  using TargetLowering::H_frem_f64;
-  using TargetLowering::H_sdiv_i64;
-  using TargetLowering::H_sitofp_i64_f32;
-  using TargetLowering::H_sitofp_i64_f64;
-  using TargetLowering::H_srem_i64;
-  using TargetLowering::H_udiv_i64;
-  using TargetLowering::H_uitofp_4xi32_4xf32;
-  using TargetLowering::H_uitofp_i32_f32;
-  using TargetLowering::H_uitofp_i32_f64;
-  using TargetLowering::H_uitofp_i64_f32;
-  using TargetLowering::H_uitofp_i64_f64;
-  using TargetLowering::H_urem_i64;
+  using Machine::H_bitcast_16xi1_i16;
+  using Machine::H_bitcast_8xi1_i8;
+  using Machine::H_bitcast_i16_16xi1;
+  using Machine::H_bitcast_i8_8xi1;
+  using Machine::H_call_ctpop_i32;
+  using Machine::H_call_ctpop_i64;
+  using Machine::H_call_longjmp;
+  using Machine::H_call_memcpy;
+  using Machine::H_call_memmove;
+  using Machine::H_call_memset;
+  using Machine::H_call_read_tp;
+  using Machine::H_call_setjmp;
+  using Machine::H_fptosi_f32_i64;
+  using Machine::H_fptosi_f64_i64;
+  using Machine::H_fptoui_4xi32_f32;
+  using Machine::H_fptoui_f32_i32;
+  using Machine::H_fptoui_f32_i64;
+  using Machine::H_fptoui_f64_i32;
+  using Machine::H_fptoui_f64_i64;
+  using Machine::H_frem_f32;
+  using Machine::H_frem_f64;
+  using Machine::H_sdiv_i64;
+  using Machine::H_sitofp_i64_f32;
+  using Machine::H_sitofp_i64_f64;
+  using Machine::H_srem_i64;
+  using Machine::H_udiv_i64;
+  using Machine::H_uitofp_4xi32_4xf32;
+  using Machine::H_uitofp_i32_f32;
+  using Machine::H_uitofp_i32_f64;
+  using Machine::H_uitofp_i64_f32;
+  using Machine::H_uitofp_i64_f64;
+  using Machine::H_urem_i64;
 
-  using TargetLowering::alignStackSpillAreas;
-  using TargetLowering::assignVarStackSlots;
-  using TargetLowering::inferTwoAddress;
-  using TargetLowering::makeHelperCall;
-  using TargetLowering::getVarStackSlotParams;
+  using Machine::alignStackSpillAreas;
+  using Machine::assignVarStackSlots;
+  using Machine::inferTwoAddress;
+  using Machine::makeHelperCall;
+  using Machine::getVarStackSlotParams;
 
 public:
   using Traits = MachineTraits<Machine>;
   using BoolFolding = ::Ice::X86Internal::BoolFolding<Traits>;
 
-  using TargetLowering::RegSet_All;
-  using TargetLowering::RegSet_CalleeSave;
-  using TargetLowering::RegSet_CallerSave;
-  using TargetLowering::RegSet_FramePointer;
-  using TargetLowering::RegSet_None;
-  using TargetLowering::RegSet_StackPointer;
-  using TargetLowering::Context;
-  using TargetLowering::Ctx;
-  using TargetLowering::Func;
-  using TargetLowering::RegSetMask;
+  using Machine::RegSet_All;
+  using Machine::RegSet_CalleeSave;
+  using Machine::RegSet_CallerSave;
+  using Machine::RegSet_FramePointer;
+  using Machine::RegSet_None;
+  using Machine::RegSet_StackPointer;
+  using Machine::Context;
+  using Machine::Ctx;
+  using Machine::Func;
+  using RegSetMask = typename Machine::RegSetMask;
 
-  using TargetLowering::_bundle_lock;
-  using TargetLowering::_bundle_unlock;
-  using TargetLowering::getContext;
-  using TargetLowering::getStackAdjustment;
-  using TargetLowering::regAlloc;
-  using TargetLowering::resetStackAdjustment;
+  using Machine::_bundle_lock;
+  using Machine::_bundle_unlock;
+  using Machine::getContext;
+  using Machine::getStackAdjustment;
+  using Machine::regAlloc;
+  using Machine::resetStackAdjustment;
 
   static TargetX86Base *create(Cfg *Func) { return new TargetX86Base(Func); }
 
diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h
index 38ef4c1..6b3a30f 100644
--- a/src/IceTargetLoweringX86BaseImpl.h
+++ b/src/IceTargetLoweringX86BaseImpl.h
@@ -589,7 +589,7 @@
               Store->dump(Func);
               Str << "\n";
             }
-            Variable *Beacon = Func->makeVariable(IceType_i32);
+            Variable *Beacon = Func->template makeVariable(IceType_i32);
             Beacon->setWeight(0);
             Store->setRmwBeacon(Beacon);
             InstFakeDef *BeaconDef = InstFakeDef::create(Func, Beacon);
@@ -746,7 +746,7 @@
   assert(RegNum < PhysicalRegisters[Ty].size());
   Variable *Reg = PhysicalRegisters[Ty][RegNum];
   if (Reg == nullptr) {
-    Reg = Func->makeVariable(Ty);
+    Reg = Func->template makeVariable(Ty);
     Reg->setRegNum(RegNum);
     PhysicalRegisters[Ty][RegNum] = Reg;
     // Specially mark esp as an "argument" so that it is considered
@@ -841,7 +841,7 @@
     // to the assigned location of Arg.
     int32_t RegNum = RegX8632::Reg_xmm0 + NumXmmArgs;
     ++NumXmmArgs;
-    Variable *RegisterArg = Func->makeVariable(Ty);
+    Variable *RegisterArg = Func->template makeVariable(Ty);
     if (BuildDefs::dump())
       RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func));
     RegisterArg->setRegNum(RegNum);
@@ -1188,8 +1188,8 @@
     return;
   }
   assert(Hi == nullptr);
-  Lo = Func->makeVariable(IceType_i32);
-  Hi = Func->makeVariable(IceType_i32);
+  Lo = Func->template makeVariable(IceType_i32);
+  Hi = Func->template makeVariable(IceType_i32);
   if (BuildDefs::dump()) {
     Lo->setName(Func, Var->getName(Func) + "__lo");
     Hi->setName(Func, Var->getName(Func) + "__hi");
@@ -2725,7 +2725,8 @@
       Variable *T = nullptr;
       // TODO: Should be able to force a spill setup by calling legalize() with
       // Legal_Mem and not Legal_Reg or Legal_Imm.
-      SpillVariable *SpillVar = Func->makeVariable<SpillVariable>(SrcType);
+      SpillVariable *SpillVar =
+          Func->template makeVariable<SpillVariable>(SrcType);
       SpillVar->setLinkedTo(Dest);
       Variable *Spill = SpillVar;
       Spill->setWeight(RegWeight::Zero);
@@ -2745,7 +2746,7 @@
       Operand *SpillLo, *SpillHi;
       if (auto *Src0Var = llvm::dyn_cast<Variable>(Src0RM)) {
         SpillVariable *SpillVar =
-            Func->makeVariable<SpillVariable>(IceType_f64);
+            Func->template makeVariable<SpillVariable>(IceType_f64);
         SpillVar->setLinkedTo(Src0Var);
         Variable *Spill = SpillVar;
         Spill->setWeight(RegWeight::Zero);
@@ -2771,7 +2772,7 @@
       Src0 = legalize(Src0);
       assert(Src0->getType() == IceType_i64);
       if (llvm::isa<OperandX8632Mem>(Src0)) {
-        Variable *T = Func->makeVariable(Dest->getType());
+        Variable *T = Func->template makeVariable(Dest->getType());
         _movq(T, Src0);
         _movq(Dest, T);
         break;
@@ -2783,7 +2784,8 @@
       //   t_hi.i32 = b_hi.i32
       //   hi(s.f64) = t_hi.i32
       //   a.f64 = s.f64
-      SpillVariable *SpillVar = Func->makeVariable<SpillVariable>(IceType_f64);
+      SpillVariable *SpillVar =
+          Func->template makeVariable<SpillVariable>(IceType_f64);
       SpillVar->setLinkedTo(Dest);
       Variable *Spill = SpillVar;
       Spill->setWeight(RegWeight::Zero);
@@ -2806,7 +2808,7 @@
     case IceType_v8i1: {
       assert(Src0->getType() == IceType_i8);
       InstCall *Call = makeHelperCall(H_bitcast_i8_8xi1, Dest, 1);
-      Variable *Src0AsI32 = Func->makeVariable(stackSlotType());
+      Variable *Src0AsI32 = Func->template makeVariable(stackSlotType());
       // Arguments to functions are required to be at least 32 bits wide.
       lowerCast(InstCast::create(Func, InstCast::Zext, Src0AsI32, Src0));
       Call->addArg(Src0AsI32);
@@ -2815,7 +2817,7 @@
     case IceType_v16i1: {
       assert(Src0->getType() == IceType_i16);
       InstCall *Call = makeHelperCall(H_bitcast_i16_16xi1, Dest, 1);
-      Variable *Src0AsI32 = Func->makeVariable(stackSlotType());
+      Variable *Src0AsI32 = Func->template makeVariable(stackSlotType());
       // Arguments to functions are required to be at least 32 bits wide.
       lowerCast(InstCast::create(Func, InstCast::Zext, Src0AsI32, Src0));
       Call->addArg(Src0AsI32);
@@ -2886,7 +2888,7 @@
     //
     // TODO(wala): use legalize(SourceVectNotLegalized, Legal_Mem) when
     // support for legalizing to mem is implemented.
-    Variable *Slot = Func->makeVariable(Ty);
+    Variable *Slot = Func->template makeVariable(Ty);
     Slot->setWeight(RegWeight::Zero);
     _movp(Slot, legalizeToVar(SourceVectNotLegalized));
 
@@ -3049,8 +3051,8 @@
         NewTy = IceType_v16i8;
         break;
       }
-      Variable *NewSrc0 = Func->makeVariable(NewTy);
-      Variable *NewSrc1 = Func->makeVariable(NewTy);
+      Variable *NewSrc0 = Func->template makeVariable(NewTy);
+      Variable *NewSrc1 = Func->template makeVariable(NewTy);
       lowerCast(InstCast::create(Func, InstCast::Sext, NewSrc0, Src0));
       lowerCast(InstCast::create(Func, InstCast::Sext, NewSrc1, Src1));
       Src0 = NewSrc0;
@@ -3190,7 +3192,7 @@
   if (ElementTy == IceType_i1) {
     // Expand the element to the appropriate size for it to be inserted
     // in the vector.
-    Variable *Expanded = Func->makeVariable(InVectorElementTy);
+    Variable *Expanded = Func->template makeVariable(InVectorElementTy);
     InstCast *Cast = InstCast::create(Func, InstCast::Zext, Expanded,
                                       ElementToInsertNotLegalized);
     lowerCast(Cast);
@@ -3281,7 +3283,7 @@
     //
     // TODO(wala): use legalize(SourceVectNotLegalized, Legal_Mem) when
     // support for legalizing to mem is implemented.
-    Variable *Slot = Func->makeVariable(Ty);
+    Variable *Slot = Func->template makeVariable(Ty);
     Slot->setWeight(RegWeight::Zero);
     _movp(Slot, legalizeToVar(SourceVectNotLegalized));
 
@@ -3572,7 +3574,7 @@
     // wide.
     Operand *ValOp = Instr->getArg(1);
     assert(ValOp->getType() == IceType_i8);
-    Variable *ValExt = Func->makeVariable(stackSlotType());
+    Variable *ValExt = Func->template makeVariable(stackSlotType());
     lowerCast(InstCast::create(Func, InstCast::Zext, ValExt, ValOp));
     InstCall *Call = makeHelperCall(H_call_memset, nullptr, 3);
     Call->addArg(Instr->getArg(0));
@@ -4379,7 +4381,7 @@
     // Sign extend the condition operand if applicable.
     if (SrcTy == IceType_v4f32) {
       // The sext operation takes only integer arguments.
-      Variable *T3 = Func->makeVariable(IceType_v4i32);
+      Variable *T3 = Func->template makeVariable(IceType_v4i32);
       lowerCast(InstCast::create(Func, InstCast::Sext, T3, Condition));
       _movp(T, T3);
     } else if (typeElementType(SrcTy) != IceType_i1) {
@@ -4579,17 +4581,17 @@
     Constant *Index = Ctx->getConstantInt32(I);
 
     // Extract the next two inputs.
-    Variable *Op0 = Func->makeVariable(ElementTy);
+    Variable *Op0 = Func->template makeVariable(ElementTy);
     lowerExtractElement(InstExtractElement::create(Func, Op0, Src0, Index));
-    Variable *Op1 = Func->makeVariable(ElementTy);
+    Variable *Op1 = Func->template makeVariable(ElementTy);
     lowerExtractElement(InstExtractElement::create(Func, Op1, Src1, Index));
 
     // Perform the arithmetic as a scalar operation.
-    Variable *Res = Func->makeVariable(ElementTy);
+    Variable *Res = Func->template makeVariable(ElementTy);
     lowerArithmetic(InstArithmetic::create(Func, Kind, Res, Op0, Op1));
 
     // Insert the result into position.
-    Variable *DestT = Func->makeVariable(Ty);
+    Variable *DestT = Func->template makeVariable(Ty);
     lowerInsertElement(InstInsertElement::create(Func, DestT, T, Res, Index));
     T = DestT;
   }
@@ -4858,7 +4860,7 @@
         // TODO(stichnot): Opportunity for register randomization.
         RegNum = RegsForType.find_first();
         Preg = getPhysicalRegister(RegNum, Dest->getType());
-        SpillLoc = Func->makeVariable(Dest->getType());
+        SpillLoc = Func->template makeVariable(Dest->getType());
         // Create a fake def of the physical register to avoid
         // liveness inconsistency problems during late-stage liveness
         // analysis (e.g. asm-verbose mode).
@@ -5188,7 +5190,7 @@
 Variable *TargetX86Base<Machine>::makeReg(Type Type, int32_t RegNum) {
   // There aren't any 64-bit integer registers for x86-32.
   assert(Type != IceType_i64);
-  Variable *Reg = Func->makeVariable(Type);
+  Variable *Reg = Func->template makeVariable(Type);
   if (RegNum == Variable::NoRegister)
     Reg->setWeightInfinite();
   else