diff --git a/src/Pipeline/SpirvShaderSampling.cpp b/src/Pipeline/SpirvShaderSampling.cpp
index 25763a9..a54eb8d 100644
--- a/src/Pipeline/SpirvShaderSampling.cpp
+++ b/src/Pipeline/SpirvShaderSampling.cpp
@@ -164,25 +164,24 @@
 		}
 		else if(instruction.samplerMethod == Grad)
 		{
-			for(uint32_t j = 0; j < instruction.gradComponents; j++, i++)
+			for(uint32_t j = 0; j < instruction.grad; j++, i++)
 			{
 				dsx[j] = in[i];
 			}
 
-			for(uint32_t j = 0; j < instruction.gradComponents; j++, i++)
+			for(uint32_t j = 0; j < instruction.grad; j++, i++)
 			{
 				dsy[j] = in[i];
 			}
 		}
 
-		if(instruction.samplerOption == Offset)
+		for(uint32_t j = 0; j < instruction.offset; j++, i++)
 		{
-			for(uint32_t j = 0; j < instruction.offsetComponents; j++, i++)
-			{
-				offset[j] = in[i];
-			}
+			offset[j] = in[i];
 		}
 
+		// TODO(b/133868964): Handle 'Sample' operand.
+
 		SamplerCore s(constants, samplerState);
 
 		// For explicit-lod instructions the LOD can be different per SIMD lane. SamplerCore currently assumes