)]}'
{
  "commit": "2971997a96b7484165cfedead111c7cafb3073ae",
  "tree": "7a502d6494be2c70b4b2cad08d1b5c140fe1d3ed",
  "parents": [
    "537b5ba030eac501734276a39223e2b7a5465ad6"
  ],
  "author": {
    "name": "Jan Voung",
    "email": "jvoung@chromium.org",
    "time": "Tue May 19 11:24:51 2015 -0700"
  },
  "committer": {
    "name": "Jan Voung",
    "email": "jvoung@chromium.org",
    "time": "Tue May 19 11:24:51 2015 -0700"
  },
  "message": "Lower a few basic ARM binops for i{8,16,32,64}.\n\nDo basic lowering for add, sub, and, or, xor, mul.\nWe don\u0027t yet take advantage of commuting immediate operands\n(e.g., use rsb to reverse subtract instead of sub) or\ninverting immediate operands (use bic to bit clear instead\nof using and).\n\nThe binary operations can set the flags register (e.g., to\nhave the carry bit for use with a subsequent adc\ninstruction). That is optional for the \"data processing\"\ninstructions.\n\nI\u0027m not yet able to compile 8bit.pnacl.ll and\n64bit.pnacl.ll so 8-bit and 64-bit are not well tested yet.\nOnly tests are in the arith.ll file (like arith-opt.ll, but\nassembled instead of testing the \"verbose inst\" output).\n\nNot doing divide yet. ARM divide by 0 does not trap, but\nPNaCl requires uniform behavior for such bad code. Thus,\nin LLVM we insert a 0 check and would have to do the same.\n\nBUG\u003d https://code.google.com/p/nativeclient/issues/detail?id\u003d4076\nR\u003dstichnot@chromium.org\n\nReview URL: https://codereview.chromium.org/1127003003\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6ac169862b063dcb3149c765a8ef9c0977d7f182",
      "old_mode": 33188,
      "old_path": "src/IceInstARM32.cpp",
      "new_id": "67f0fd4ad7bb8c336a64161f230d2708ebdeeddb",
      "new_mode": 33188,
      "new_path": "src/IceInstARM32.cpp"
    },
    {
      "type": "modify",
      "old_id": "7970e587343cacd74a0b9a42003519f12922b26f",
      "old_mode": 33188,
      "old_path": "src/IceInstARM32.def",
      "new_id": "c314305d8aa07d58bd8bac3c6b8b9dbc15851f05",
      "new_mode": 33188,
      "new_path": "src/IceInstARM32.def"
    },
    {
      "type": "modify",
      "old_id": "2e3f764d2953740ccfbbf3c4aa526af9c4c96e14",
      "old_mode": 33188,
      "old_path": "src/IceInstARM32.h",
      "new_id": "c8d01e64391a187b991822c73cb1e31cfeae38ce",
      "new_mode": 33188,
      "new_path": "src/IceInstARM32.h"
    },
    {
      "type": "modify",
      "old_id": "d65b5469c18c7f6b175b9a916c9474ec7bc37e6b",
      "old_mode": 33188,
      "old_path": "src/IceTargetLoweringARM32.cpp",
      "new_id": "73eb77c0f841b873fb542cbee4b895a3c82353d7",
      "new_mode": 33188,
      "new_path": "src/IceTargetLoweringARM32.cpp"
    },
    {
      "type": "modify",
      "old_id": "0c21c7c9cd859fb8915f917bb63edbebd4a15a54",
      "old_mode": 33188,
      "old_path": "src/IceTargetLoweringARM32.h",
      "new_id": "88a8eb18a13e3017e1678718a0fe6d75b04a1389",
      "new_mode": 33188,
      "new_path": "src/IceTargetLoweringARM32.h"
    },
    {
      "type": "modify",
      "old_id": "1f6a69b857de82c7bd7e6f294340fe9c0028f4fe",
      "old_mode": 33188,
      "old_path": "tests_lit/llvm2ice_tests/arith-opt.ll",
      "new_id": "66be97f0bac4b92e22ca9cf5c272aab63723dea8",
      "new_mode": 33188,
      "new_path": "tests_lit/llvm2ice_tests/arith-opt.ll"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "976af4d34e075e0c7d45fdc83ec128d8ec0ff426",
      "new_mode": 33188,
      "new_path": "tests_lit/llvm2ice_tests/arith.ll"
    },
    {
      "type": "modify",
      "old_id": "2b3da9a928f34d7f6049a8bce607b4cacbef66d4",
      "old_mode": 33188,
      "old_path": "tests_lit/llvm2ice_tests/function_aligned.ll",
      "new_id": "c976dced2ec5caf658a05c9a2008e1f28193d5ec",
      "new_mode": 33188,
      "new_path": "tests_lit/llvm2ice_tests/function_aligned.ll"
    },
    {
      "type": "modify",
      "old_id": "9be4e1ef573d896c4644e3dff4677bb03fe4e1d1",
      "old_mode": 33188,
      "old_path": "tests_lit/llvm2ice_tests/int-arg.ll",
      "new_id": "ae4a6ab0daa324e51a93eb4a6ac04b02eeab62ea",
      "new_mode": 33188,
      "new_path": "tests_lit/llvm2ice_tests/int-arg.ll"
    }
  ]
}