Subzero: Make -reg-use and -reg-exclude specific to register class.
The main feature here is that when listing a register via the -reg-use or -reg-exclude option, we can limit the effect to a single register class, instead of applying it across all register classes. Example:
pnacl-sz -reg-use i32:eax,i32:ecx,i32:edx -reg-exclude f32:xmm0
Note that without the register class prefix, behavior is the same as before, specifically that the restriction applies to all register classes.
This requires a few high-level changes:
1. We need a mechanism to name *all* register classes, not just the standard ones that map to IceType values.
2. While we're at it, give standard types a more usable name, e.g. "v4i32" instead of "<4 x i32>".
3. Since we've commandeered ":" as the class/register token separator, we change ARM i64 register pair names from e.g. "r0:r1" to "r0r1".
The motivation is that for register allocator torture testing, we'd like to drastically restrict the registers available to e.g. the extensively-used i32 register class, while not overly restricting the seldom-used i32to8 register class (which reflects the set of i32 registers that may trivially truncate to i8).
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/1614273002 .
diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 68e8c68..2d998ed 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -271,6 +271,18 @@
#undef X
;
std::array<uint32_t, NumVec128Args> Vec128ArgInitializer;
+
+IceString getRegClassName(RegClass C) {
+ auto ClassNum = static_cast<RegARM32::RegClassARM32>(C);
+ assert(ClassNum < RegARM32::RCARM32_NUM);
+ switch (ClassNum) {
+ default:
+ assert(C < RC_Target);
+ return regClassString(C);
+ // Add handling of new register classes below.
+ }
+}
+
} // end of anonymous namespace
TargetARM32::TargetARM32(Cfg *Func)
@@ -331,18 +343,19 @@
TypeToRegisterSet[IceType_v4f32] = VectorRegisters;
filterTypeToRegisterSet(
- Ctx, RegARM32::Reg_NUM, TypeToRegisterSet, RegARM32::RCARM32_NUM,
- [](int32_t RegNum) -> IceString {
+ Ctx, RegARM32::Reg_NUM, TypeToRegisterSet,
+ llvm::array_lengthof(TypeToRegisterSet), [](int32_t RegNum) -> IceString {
+ // This function simply removes ", " from the register name.
IceString Name = RegARM32::getRegName(RegNum);
constexpr const char RegSeparator[] = ", ";
constexpr size_t RegSeparatorWidth =
llvm::array_lengthof(RegSeparator) - 1;
for (size_t Pos = Name.find(RegSeparator); Pos != std::string::npos;
Pos = Name.find(RegSeparator)) {
- Name.replace(Pos, RegSeparatorWidth, ":");
+ Name.replace(Pos, RegSeparatorWidth, "");
}
return Name;
- });
+ }, getRegClassName);
}
namespace {
@@ -6455,7 +6468,7 @@
Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n";
}
-llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
+llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
} // end of namespace ARM32
