diff --git a/src/Pipeline/SpirvShader.cpp b/src/Pipeline/SpirvShader.cpp
index 0498c6c..b4b1f73 100644
--- a/src/Pipeline/SpirvShader.cpp
+++ b/src/Pipeline/SpirvShader.cpp
@@ -917,12 +917,15 @@
 				break;
 
 			case spv::OpFunctionParameter:
-			case spv::OpFunctionCall:
 				// These should have all been removed by preprocessing passes. If we see them here,
 				// our assumptions are wrong and we will probably generate wrong code.
 				UNREACHABLE("%s should have already been lowered.", OpcodeName(opcode).c_str());
 				break;
 
+			case spv::OpFunctionCall:
+				// TODO(b/141246700): Add full support for spv::OpFunctionCall
+				break;
+
 			case spv::OpFConvert:
 				UNSUPPORTED("SPIR-V Float16 or Float64 Capability (OpFConvert)");
 				break;
@@ -2693,6 +2696,9 @@
 		case spv::OpReturn:
 			return EmitReturn(insn, state);
 
+		case spv::OpFunctionCall:
+			return EmitFunctionCall(insn, state);
+
 		case spv::OpKill:
 			return EmitKill(insn, state);
 
@@ -4833,6 +4839,44 @@
 		return EmitResult::Terminator;
 	}
 
+	SpirvShader::EmitResult SpirvShader::EmitFunctionCall(InsnIterator insn, EmitState *state) const
+	{
+		auto functionId = Function::ID(insn.word(3));
+		const auto& functionIt = functions.find(functionId);
+		ASSERT(functionIt != functions.end());
+		auto& function = functionIt->second;
+
+		// TODO(b/141246700): Add full support for spv::OpFunctionCall
+		// The only supported function is a single OpKill wrapped in a
+		// function, as a result of the "wrap OpKill" SPIRV-Tools pass
+		ASSERT(function.blocks.size() == 1);
+		spv::Op wrapOpKill[] = { spv::OpLabel, spv::OpKill };
+
+		for (auto block : function.blocks)
+		{
+			int insnNumber = 0;
+			for (auto blockInsn : block.second)
+			{
+				if (insnNumber > 1)
+				{
+					UNIMPLEMENTED("Function block number of instructions: %d", insnNumber);
+					return EmitResult::Continue;
+				}
+				if (blockInsn.opcode() != wrapOpKill[insnNumber++])
+				{
+					UNIMPLEMENTED("Function block instruction %d : %s", insnNumber - 1, OpcodeName(blockInsn.opcode()).c_str());
+					return EmitResult::Continue;
+				}
+				if (blockInsn.opcode() == spv::OpKill)
+				{
+					EmitInstruction(blockInsn, state);
+				}
+			}
+		}
+
+		return EmitResult::Continue;
+	}
+
 	SpirvShader::EmitResult SpirvShader::EmitPhi(InsnIterator insn, EmitState *state) const
 	{
 		auto &function = getFunction(state->function);
diff --git a/src/Pipeline/SpirvShader.hpp b/src/Pipeline/SpirvShader.hpp
index 4a28af6..34565cb 100644
--- a/src/Pipeline/SpirvShader.hpp
+++ b/src/Pipeline/SpirvShader.hpp
@@ -1224,6 +1224,7 @@
 		EmitResult EmitUnreachable(InsnIterator insn, EmitState *state) const;
 		EmitResult EmitReturn(InsnIterator insn, EmitState *state) const;
 		EmitResult EmitKill(InsnIterator insn, EmitState *state) const;
+		EmitResult EmitFunctionCall(InsnIterator insn, EmitState *state) const;
 		EmitResult EmitPhi(InsnIterator insn, EmitState *state) const;
 		EmitResult EmitImageSampleImplicitLod(Variant variant, InsnIterator insn, EmitState *state) const;
 		EmitResult EmitImageSampleExplicitLod(Variant variant, InsnIterator insn, EmitState *state) const;
diff --git a/src/Vulkan/VkFormat.cpp b/src/Vulkan/VkFormat.cpp
index 7e7cce7..3746c08 100644
--- a/src/Vulkan/VkFormat.cpp
+++ b/src/Vulkan/VkFormat.cpp
@@ -196,6 +196,7 @@
 	case VK_IMAGE_ASPECT_STENCIL_BIT:
 		switch(format)
 		{
+		case VK_FORMAT_S8_UINT:
 		case VK_FORMAT_D16_UNORM_S8_UINT:
 		case VK_FORMAT_D24_UNORM_S8_UINT:
 		case VK_FORMAT_D32_SFLOAT_S8_UINT:
@@ -211,6 +212,7 @@
 	case VK_IMAGE_ASPECT_PLANE_0_BIT:
 		switch(format)
 		{
+		case VK_FORMAT_R8_UNORM:
 		case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
 		case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
 			return VK_FORMAT_R8_UNORM;
@@ -223,8 +225,10 @@
 	case VK_IMAGE_ASPECT_PLANE_1_BIT:
 		switch(format)
 		{
+		case VK_FORMAT_R8_UNORM:
 		case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
 			return VK_FORMAT_R8_UNORM;
+		case VK_FORMAT_R8G8_UNORM:
 		case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
 			return VK_FORMAT_R8G8_UNORM;
 		default:
@@ -236,6 +240,7 @@
 	case VK_IMAGE_ASPECT_PLANE_2_BIT:
 		switch(format)
 		{
+		case VK_FORMAT_R8_UNORM:
 		case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
 			return VK_FORMAT_R8_UNORM;
 		default:
diff --git a/src/Vulkan/VkImageView.cpp b/src/Vulkan/VkImageView.cpp
index d847aa7..0a61ce6 100644
--- a/src/Vulkan/VkImageView.cpp
+++ b/src/Vulkan/VkImageView.cpp
@@ -253,7 +253,8 @@
 
 Format ImageView::getFormat(Usage usage) const
 {
-	return ((usage == RAW) || (getImage(usage) == image)) ? format : getImage(usage)->getFormat();
+	Format imageFormat = ((usage == RAW) || (getImage(usage) == image)) ? format : getImage(usage)->getFormat();
+	return imageFormat.getAspectFormat(subresourceRange.aspectMask);
 }
 
 int ImageView::rowPitchBytes(VkImageAspectFlagBits aspect, uint32_t mipLevel, Usage usage) const
diff --git a/src/Vulkan/VkPhysicalDevice.cpp b/src/Vulkan/VkPhysicalDevice.cpp
index 1618773..1112b56 100644
--- a/src/Vulkan/VkPhysicalDevice.cpp
+++ b/src/Vulkan/VkPhysicalDevice.cpp
@@ -451,8 +451,10 @@
 	case VK_FORMAT_R32G32B32A32_UINT:
 	case VK_FORMAT_R32G32B32A32_SINT:
 	case VK_FORMAT_R32G32B32A32_SFLOAT:
+	case VK_FORMAT_S8_UINT:
 	case VK_FORMAT_D16_UNORM:
 	case VK_FORMAT_D32_SFLOAT:
+	case VK_FORMAT_D32_SFLOAT_S8_UINT:
 		pFormatProperties->optimalTilingFeatures |=
 			VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT |
 			VK_FORMAT_FEATURE_BLIT_SRC_BIT |
@@ -557,6 +559,7 @@
 			VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT |
 			VK_FORMAT_FEATURE_BLIT_DST_BIT;
 		break;
+	case VK_FORMAT_S8_UINT:
 	case VK_FORMAT_D16_UNORM:
 	case VK_FORMAT_D32_SFLOAT: // Note: either VK_FORMAT_D32_SFLOAT or VK_FORMAT_X8_D24_UNORM_PACK32 must be supported
 	case VK_FORMAT_D32_SFLOAT_S8_UINT: // Note: either VK_FORMAT_D24_UNORM_S8_UINT or VK_FORMAT_D32_SFLOAT_S8_UINT must be supported
diff --git a/src/Vulkan/VkPipeline.cpp b/src/Vulkan/VkPipeline.cpp
index 7c55daa..ebee9f2 100644
--- a/src/Vulkan/VkPipeline.cpp
+++ b/src/Vulkan/VkPipeline.cpp
@@ -193,7 +193,8 @@
 	}
 
 	// Full optimization list taken from spirv-opt.
-	opt.RegisterPass(spvtools::CreateDeadBranchElimPass())
+	opt.RegisterPass(spvtools::CreateWrapOpKillPass())
+		.RegisterPass(spvtools::CreateDeadBranchElimPass())
 		.RegisterPass(spvtools::CreateMergeReturnPass())
 		.RegisterPass(spvtools::CreateInlineExhaustivePass())
 		.RegisterPass(spvtools::CreateAggressiveDCEPass())