commit 0dab032401107239f48cab3605b1f268891cd14e
author Jan Voung <jvoung@chromium.org> Tue Jul 21 14:29:34 2015 -0700
committer Jan Voung <jvoung@chromium.org> Tue Jul 21 14:29:34 2015 -0700
tree ff9dafdb2d87f0a54a97ca732ef2c26441a8037c
parent 5aeed955e17bac8cc44cc6d2b6ff7513cc714c2f

Make ARM RegNames[] static like X86 (no ARM syms in X86-only build).

The X86 code was switch out here:
https://codereview.chromium.org/1216933015/diff/150001/src/IceTargetLoweringX86Base.h

The important bit might be that it's static const char * instead of
static IceString. This removes static ctor/dtor for that array,
which LTO doesn't seem to be able to optimize out, leaving ARM
and MIPS symbols in the X86-only build. After changing it to static
const char *, LTO is able to optimize out the ARM and MIPS
symbols in the x86-only build, saving about 3KB of .text and
few bytes of .rodata.

BUG=none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1246013004 .

src/IceTargetLoweringARM32.cpp

diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 9f7a90d..faf1aa0 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -348,17 +348,17 @@
   return false;
 }
 
-IceString TargetARM32::RegNames[] = {
-#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
-          isFP)                                                                \
-  name,
-    REGARM32_TABLE
-#undef X
-};
-
 IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
   assert(RegNum < RegARM32::Reg_NUM);
   (void)Ty;
+  static const char *RegNames[] = {
+#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
+          isFP)                                                                \
+  name,
+      REGARM32_TABLE
+#undef X
+  };
+
   return RegNames[RegNum];
 }
 

src/IceTargetLoweringARM32.h

diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 1e0f284..198563c 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -389,7 +389,6 @@
   llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
-  static IceString RegNames[];
 
   /// Helper class that understands the Calling Convention and register
   /// assignments. The first few integer type parameters can use r0-r3,

src/IceTargetLoweringMIPS32.cpp

diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index a7e85a8..add97b3 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -220,17 +220,16 @@
   return false;
 }
 
-IceString TargetMIPS32::RegNames[] = {
-#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
-          isFP)                                                                \
-  name,
-    REGMIPS32_TABLE
-#undef X
-};
-
 IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const {
   assert(RegNum < RegMIPS32::Reg_NUM);
   (void)Ty;
+  static const char *RegNames[] = {
+#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
+          isFP)                                                                \
+  name,
+      REGMIPS32_TABLE
+#undef X
+  };
   return RegNames[RegNum];
 }
 

src/IceTargetLoweringMIPS32.h

diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index e581ffa..e63d738 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -129,7 +129,6 @@
   llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
-  static IceString RegNames[];
 
 private:
   ~TargetMIPS32() override = default;