llvm-16.0: Add BUILD.gn for loongarch64.
Tested by building Chrome on linux with Subzero disabled.
Bug: swiftshader:178
Change-Id: Ia2342f43f3b1423caf0f8fdb7ade673dab2d7570
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/73308
Kokoro-Result: kokoro <noreply+kokoro@google.com>
Tested-by: Geoff Lang <geofflang@google.com>
Commit-Queue: Geoff Lang <geofflang@google.com>
Reviewed-by: Geoff Lang <geofflang@google.com>
Reviewed-by: Ben Clayton <bclayton@google.com>
diff --git a/third_party/llvm-16.0/BUILD.gn b/third_party/llvm-16.0/BUILD.gn
index c6bd34b..891a790 100644
--- a/third_party/llvm-16.0/BUILD.gn
+++ b/third_party/llvm-16.0/BUILD.gn
@@ -97,6 +97,7 @@
"llvm/include/",
"llvm/lib/Target/AArch64/",
"llvm/lib/Target/ARM/",
+ "llvm/lib/Target/LoongArch/",
"llvm/lib/Target/Mips/",
"llvm/lib/Target/PowerPC/",
"llvm/lib/Target/RISCV/",
@@ -106,6 +107,7 @@
"configs/common/lib/IR/",
"configs/common/lib/Target/AArch64/",
"configs/common/lib/Target/ARM/",
+ "configs/common/lib/Target/LoongArch/",
"configs/common/lib/Target/Mips/",
"configs/common/lib/Target/PowerPC/",
"configs/common/lib/Target/RISCV/",
@@ -166,6 +168,8 @@
deps += [ ":swiftshader_llvm_aarch64" ]
} else if (current_cpu == "arm") {
deps += [ ":swiftshader_llvm_arm" ]
+ } else if (current_cpu == "loong64") {
+ deps += [ ":swiftshader_llvm_loongarch64" ]
} else if (current_cpu == "mipsel" || current_cpu == "mips64el") {
deps += [ ":swiftshader_llvm_mips" ]
} else if (current_cpu == "ppc64") {
@@ -1443,6 +1447,38 @@
}
}
+swiftshader_llvm_source_set("swiftshader_llvm_loongarch64") {
+ sources = [
+ "llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp",
+ "llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp",
+ "llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp",
+ "llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchTargetStreamer.cpp",
+ "llvm/lib/Target/LoongArch/TargetInfo/LoongArchTargetInfo.cpp",
+ "llvm/lib/TargetParser/LoongArchTargetParser.cpp",
+ "llvm/lib/Transforms/IPO/BarrierNoopPass.cpp",
+ ]
+}
+
swiftshader_llvm_source_set("swiftshader_llvm_mips") {
sources = [
"llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp",
diff --git a/third_party/llvm-16.0/CMakeLists.txt b/third_party/llvm-16.0/CMakeLists.txt
index 62d0cda..3a0bf52 100644
--- a/third_party/llvm-16.0/CMakeLists.txt
+++ b/third_party/llvm-16.0/CMakeLists.txt
@@ -1394,6 +1394,36 @@
${LLVM_DIR}/lib/Target/ARM/Utils/ARMBaseInfo.cpp
${LLVM_DIR}/lib/Transforms/IPO/BarrierNoopPass.cpp
)
+elseif(ARCH STREQUAL "loongarch64")
+ list(APPEND LLVM_LIST
+ ${LLVM_DIR}/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchFrameLowering.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchISelLowering.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchInstrInfo.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchMCInstLower.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchSubtarget.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/MCTargetDesc/LoongArchTargetStreamer.cpp
+ ${LLVM_DIR}/lib/Target/LoongArch/TargetInfo/LoongArchTargetInfo.cpp
+ ${LLVM_DIR}/lib/TargetParser/LoongArchTargetParser.cpp
+ ${LLVM_DIR}/lib/Transforms/IPO/BarrierNoopPass.cpp
+ )
elseif(ARCH STREQUAL "ppc64le")
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1529,6 +1559,7 @@
${LLVM_DIR}/include
${LLVM_DIR}/lib/Target/AArch64
${LLVM_DIR}/lib/Target/ARM
+ ${LLVM_DIR}/lib/Target/LoongArch
${LLVM_DIR}/lib/Target/Mips
${LLVM_DIR}/lib/Target/PowerPC
${LLVM_DIR}/lib/Target/RISCV
@@ -1537,6 +1568,7 @@
${LLVM_CONFIG_DIR}/common/lib/IR
${LLVM_CONFIG_DIR}/common/lib/Target/AArch64
${LLVM_CONFIG_DIR}/common/lib/Target/ARM
+ ${LLVM_CONFIG_DIR}/common/lib/Target/LoongArch
${LLVM_CONFIG_DIR}/common/lib/Target/Mips
${LLVM_CONFIG_DIR}/common/lib/Target/PowerPC
${LLVM_CONFIG_DIR}/common/lib/Target/RISCV
diff --git a/third_party/llvm-16.0/scripts/generate_build_files.py b/third_party/llvm-16.0/scripts/generate_build_files.py
index 63dae3e..4d182e6 100755
--- a/third_party/llvm-16.0/scripts/generate_build_files.py
+++ b/third_party/llvm-16.0/scripts/generate_build_files.py
@@ -371,6 +371,11 @@
"/lib/Transforms/IPO/BarrierNoopPass.cpp",
]
+files_to_add_back_for_llvm_loongarch = [
+ "/lib/TargetParser/LoongArchTargetParser.cpp",
+ "/lib/Transforms/IPO/BarrierNoopPass.cpp",
+]
+
files_to_add_back_for_llvm_riscv = [
"/lib/TargetParser/RISCVTargetParser.cpp",
"/lib/Transforms/IPO/BarrierNoopPass.cpp",
@@ -385,6 +390,9 @@
files_ARM = keep_files_with_prefix(all_files, "/lib/Target/ARM/")
files_ARM.extend(files_to_add_back_for_llvm_arm)
files_ARM.sort()
+files_LoongArch = keep_files_with_prefix(all_files, "/lib/Target/LoongArch/")
+files_LoongArch.extend(files_to_add_back_for_llvm_loongarch)
+files_LoongArch.sort()
files_PowerPC = keep_files_with_prefix(all_files, "/lib/Target/PowerPC/")
files_RISCV = keep_files_with_prefix(all_files, "/lib/Target/RISCV/")
files_RISCV.extend(files_to_add_back_for_llvm_riscv)
@@ -399,6 +407,7 @@
'generated_file_comment' : "# " + generated_file_comment,
'files_llvm' : '\n'.join([" ${LLVM_DIR}" + s for s in files_llvm]),
'files_x86' : format_file_list_for_cmake(files_x86),
+ 'files_LoongArch' : format_file_list_for_cmake(files_LoongArch),
'files_Mips' : format_file_list_for_cmake(files_Mips),
'files_AArch64' : format_file_list_for_cmake(files_AArch64),
'files_ARM' : format_file_list_for_cmake(files_ARM),
@@ -495,6 +504,7 @@
'files_x86' : format_file_list_for_build_gn(files_x86),
'files_AArch64' : format_file_list_for_build_gn(files_AArch64),
'files_ARM' : format_file_list_for_build_gn(files_ARM_build_gn),
+ 'files_LoongArch' : format_file_list_for_build_gn(files_LoongArch),
'files_Mips' : format_file_list_for_build_gn(files_Mips),
'files_PowerPC' : format_file_list_for_build_gn(files_PowerPC),
'files_RISCV' : format_file_list_for_build_gn(files_RISCV),
diff --git a/third_party/llvm-16.0/scripts/template_BUILD.gn b/third_party/llvm-16.0/scripts/template_BUILD.gn
index 3131470..8d18e21 100644
--- a/third_party/llvm-16.0/scripts/template_BUILD.gn
+++ b/third_party/llvm-16.0/scripts/template_BUILD.gn
@@ -97,6 +97,7 @@
"llvm/include/",
"llvm/lib/Target/AArch64/",
"llvm/lib/Target/ARM/",
+ "llvm/lib/Target/LoongArch/",
"llvm/lib/Target/Mips/",
"llvm/lib/Target/PowerPC/",
"llvm/lib/Target/RISCV/",
@@ -106,6 +107,7 @@
"configs/common/lib/IR/",
"configs/common/lib/Target/AArch64/",
"configs/common/lib/Target/ARM/",
+ "configs/common/lib/Target/LoongArch/",
"configs/common/lib/Target/Mips/",
"configs/common/lib/Target/PowerPC/",
"configs/common/lib/Target/RISCV/",
@@ -164,6 +166,8 @@
deps += [ ":swiftshader_llvm_aarch64" ]
} else if (current_cpu == "arm") {
deps += [ ":swiftshader_llvm_arm" ]
+ } else if (current_cpu == "loong64") {
+ deps += [ ":swiftshader_llvm_loongarch64" ]
} else if (current_cpu == "mipsel" || current_cpu == "mips64el") {
deps += [ ":swiftshader_llvm_mips" ]
} else if (current_cpu == "ppc64") {
@@ -213,6 +217,12 @@
}
}
+swiftshader_llvm_source_set("swiftshader_llvm_loongarch64") {
+ sources = [
+%$%files_LoongArch
+ ]
+}
+
swiftshader_llvm_source_set("swiftshader_llvm_mips") {
sources = [
%$%files_Mips
diff --git a/third_party/llvm-16.0/scripts/template_CMakeLists.txt b/third_party/llvm-16.0/scripts/template_CMakeLists.txt
index cbe22d5..d60bf15 100644
--- a/third_party/llvm-16.0/scripts/template_CMakeLists.txt
+++ b/third_party/llvm-16.0/scripts/template_CMakeLists.txt
@@ -37,6 +37,10 @@
list(APPEND LLVM_LIST
%$%files_ARM
)
+elseif(ARCH STREQUAL "loongarch64")
+ list(APPEND LLVM_LIST
+%$%files_LoongArch
+ )
elseif(ARCH STREQUAL "ppc64le")
list(APPEND LLVM_LIST
%$%files_PowerPC
@@ -74,6 +78,7 @@
${LLVM_DIR}/include
${LLVM_DIR}/lib/Target/AArch64
${LLVM_DIR}/lib/Target/ARM
+ ${LLVM_DIR}/lib/Target/LoongArch
${LLVM_DIR}/lib/Target/Mips
${LLVM_DIR}/lib/Target/PowerPC
${LLVM_DIR}/lib/Target/RISCV
@@ -82,6 +87,7 @@
${LLVM_CONFIG_DIR}/common/lib/IR
${LLVM_CONFIG_DIR}/common/lib/Target/AArch64
${LLVM_CONFIG_DIR}/common/lib/Target/ARM
+ ${LLVM_CONFIG_DIR}/common/lib/Target/LoongArch
${LLVM_CONFIG_DIR}/common/lib/Target/Mips
${LLVM_CONFIG_DIR}/common/lib/Target/PowerPC
${LLVM_CONFIG_DIR}/common/lib/Target/RISCV
