[SubZero] Generate relocations for MIPS
The patch generate Hi, Lo, Jal and data relocations. Instruction encoding of instructions like ldc1, sdc1 etc. has been added.
Following tests from cross-test framework were tested successfully: (non-vector, OBJ mode, Om1, O2)
mem_intrin
TotalTests=114300 Passes=114300 Failures=0
simple_loop
TotalTests=102 Passes=102 Failures=0
test_arith
TotalTests=49489704 Passes=49489704 Failures=0
test_bitmanip
TotalTests=1200 Passes=1200 Failures=0
test_cast
TotalTests=7444 Passes=7444 Failures=0
test_fcmp
TotalTests=123904 Passes=123904 Failures=0
test_global
TotalTests=270 Passes=270 Failures=0
test_icmp
TotalTests=3341520 Passes=3341520 Failures=0
test_strengthreduce
TotalTests=240 Passes=240 Failures=0
Following tests are disabled as they are either all-vectors or contain unimplemented intrinsic lowering:
test_calling_conv
test_select
test_stacksave
test_sync_atomic
test_vector_ops
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/2446273003 .
Patch from Jaydeep Patil <jaydeep.patil@imgtec.com>.
8 files changed
