Rename EmitState to SpirvEmitter
The SpirvEmitter class translates the parsed SPIR-V shader into Reactor
code.
Bug: b/247020580
Change-Id: Icb029d16821d010862beae00f151fd72d5df015e
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/68969
Tested-by: Nicolas Capens <nicolascapens@google.com>
Reviewed-by: Alexis Hétu <sugoi@google.com>
diff --git a/src/Pipeline/ComputeProgram.cpp b/src/Pipeline/ComputeProgram.cpp
index 530491a..bb38c13 100644
--- a/src/Pipeline/ComputeProgram.cpp
+++ b/src/Pipeline/ComputeProgram.cpp
@@ -243,7 +243,7 @@
auto groupX = baseGroupX + groupOffsetX;
MARL_SCOPED_EVENT("groupX: %d, groupY: %d, groupZ: %d", groupX, groupY, groupZ);
- using Coroutine = std::unique_ptr<rr::Stream<EmitState::YieldResult>>;
+ using Coroutine = std::unique_ptr<rr::Stream<SpirvEmitter::YieldResult>>;
std::queue<Coroutine> coroutines;
if(shader->getAnalysis().ContainsControlBarriers)
@@ -268,7 +268,7 @@
auto coroutine = std::move(coroutines.front());
coroutines.pop();
- EmitState::YieldResult result;
+ SpirvEmitter::YieldResult result;
if(coroutine->await(result))
{
// TODO: Consider result (when the enum is more than 1 entry).
diff --git a/src/Pipeline/ComputeProgram.hpp b/src/Pipeline/ComputeProgram.hpp
index a4a85d2..2dee95a 100644
--- a/src/Pipeline/ComputeProgram.hpp
+++ b/src/Pipeline/ComputeProgram.hpp
@@ -36,7 +36,7 @@
struct Constants;
// ComputeProgram builds a SPIR-V compute shader.
-class ComputeProgram : public Coroutine<EmitState::YieldResult(
+class ComputeProgram : public Coroutine<SpirvEmitter::YieldResult(
const vk::Device *device,
void *data,
int32_t workgroupX,
diff --git a/src/Pipeline/SpirvShader.cpp b/src/Pipeline/SpirvShader.cpp
index 22eb654..4399bbd 100644
--- a/src/Pipeline/SpirvShader.cpp
+++ b/src/Pipeline/SpirvShader.cpp
@@ -1260,7 +1260,7 @@
}
}
-SIMD::Pointer EmitState::WalkExplicitLayoutAccessChain(Object::ID baseId, Object::ID elementId, const Span &indexIds, bool nonUniform) const
+SIMD::Pointer SpirvEmitter::WalkExplicitLayoutAccessChain(Object::ID baseId, Object::ID elementId, const Span &indexIds, bool nonUniform) const
{
// Produce a offset into external memory in sizeof(float) units
@@ -1372,7 +1372,7 @@
return ptr;
}
-SIMD::Pointer EmitState::WalkAccessChain(Object::ID baseId, Object::ID elementId, const Span &indexIds, bool nonUniform) const
+SIMD::Pointer SpirvEmitter::WalkAccessChain(Object::ID baseId, Object::ID elementId, const Span &indexIds, bool nonUniform) const
{
// TODO: avoid doing per-lane work in some cases if we can?
auto &baseObject = shader.getObject(baseId);
@@ -1817,16 +1817,16 @@
void SpirvShader::emit(SpirvRoutine *routine, const RValue<SIMD::Int> &activeLaneMask, const RValue<SIMD::Int> &storesAndAtomicsMask, const vk::DescriptorSet::Bindings &descriptorSets, unsigned int multiSampleCount) const
{
- EmitState::emit(*this, routine, entryPoint, activeLaneMask, storesAndAtomicsMask, descriptorSets, multiSampleCount);
+ SpirvEmitter::emit(*this, routine, entryPoint, activeLaneMask, storesAndAtomicsMask, descriptorSets, multiSampleCount);
}
-EmitState::EmitState(const SpirvShader &shader,
- SpirvRoutine *routine,
- SpirvShader::Function::ID entryPoint,
- RValue<SIMD::Int> activeLaneMask,
- RValue<SIMD::Int> storesAndAtomicsMask,
- const vk::DescriptorSet::Bindings &descriptorSets,
- unsigned int multiSampleCount)
+SpirvEmitter::SpirvEmitter(const SpirvShader &shader,
+ SpirvRoutine *routine,
+ SpirvShader::Function::ID entryPoint,
+ RValue<SIMD::Int> activeLaneMask,
+ RValue<SIMD::Int> storesAndAtomicsMask,
+ const vk::DescriptorSet::Bindings &descriptorSets,
+ unsigned int multiSampleCount)
: shader(shader)
, routine(routine)
, function(entryPoint)
@@ -1837,15 +1837,15 @@
{
}
-void EmitState::emit(const SpirvShader &shader,
- SpirvRoutine *routine,
- SpirvShader::Function::ID entryPoint,
- RValue<SIMD::Int> activeLaneMask,
- RValue<SIMD::Int> storesAndAtomicsMask,
- const vk::DescriptorSet::Bindings &descriptorSets,
- unsigned int multiSampleCount)
+void SpirvEmitter::emit(const SpirvShader &shader,
+ SpirvRoutine *routine,
+ SpirvShader::Function::ID entryPoint,
+ RValue<SIMD::Int> activeLaneMask,
+ RValue<SIMD::Int> storesAndAtomicsMask,
+ const vk::DescriptorSet::Bindings &descriptorSets,
+ unsigned int multiSampleCount)
{
- EmitState state(shader, routine, entryPoint, activeLaneMask, storesAndAtomicsMask, descriptorSets, multiSampleCount);
+ SpirvEmitter state(shader, routine, entryPoint, activeLaneMask, storesAndAtomicsMask, descriptorSets, multiSampleCount);
// Create phi variables
for(auto insn : shader)
@@ -1873,7 +1873,7 @@
state.EmitBlocks(shader.getFunction(entryPoint).entry);
}
-void EmitState::EmitInstructions(InsnIterator begin, InsnIterator end)
+void SpirvEmitter::EmitInstructions(InsnIterator begin, InsnIterator end)
{
for(auto insn = begin; insn != end; insn++)
{
@@ -1886,7 +1886,7 @@
}
}
-void EmitState::EmitInstruction(InsnIterator insn)
+void SpirvEmitter::EmitInstruction(InsnIterator insn)
{
auto opcode = insn.opcode();
@@ -2283,7 +2283,7 @@
}
}
-void EmitState::EmitAccessChain(InsnIterator insn)
+void SpirvEmitter::EmitAccessChain(InsnIterator insn)
{
Type::ID typeId = insn.word(1);
Object::ID resultId = insn.word(2);
@@ -2324,7 +2324,7 @@
}
}
-void EmitState::EmitCompositeConstruct(InsnIterator insn)
+void SpirvEmitter::EmitCompositeConstruct(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -2344,7 +2344,7 @@
}
}
-void EmitState::EmitCompositeInsert(InsnIterator insn)
+void SpirvEmitter::EmitCompositeInsert(InsnIterator insn)
{
Type::ID resultTypeId = insn.word(1);
auto &type = shader.getType(resultTypeId);
@@ -2373,7 +2373,7 @@
}
}
-void EmitState::EmitCompositeExtract(InsnIterator insn)
+void SpirvEmitter::EmitCompositeExtract(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -2388,7 +2388,7 @@
}
}
-void EmitState::EmitVectorShuffle(InsnIterator insn)
+void SpirvEmitter::EmitVectorShuffle(InsnIterator insn)
{
// Note: number of components in result, first vector, and second vector are all independent.
uint32_t resultSize = shader.getType(insn.resultTypeId()).componentCount;
@@ -2416,7 +2416,7 @@
}
}
-void EmitState::EmitVectorExtractDynamic(InsnIterator insn)
+void SpirvEmitter::EmitVectorExtractDynamic(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -2435,7 +2435,7 @@
dst.move(0, v);
}
-void EmitState::EmitVectorInsertDynamic(InsnIterator insn)
+void SpirvEmitter::EmitVectorInsertDynamic(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -2451,7 +2451,7 @@
}
}
-void EmitState::EmitSelect(InsnIterator insn)
+void SpirvEmitter::EmitSelect(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto result = shader.getObject(insn.resultId());
@@ -2490,7 +2490,7 @@
}
}
-void EmitState::EmitAny(InsnIterator insn)
+void SpirvEmitter::EmitAny(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
ASSERT(type.componentCount == 1);
@@ -2508,7 +2508,7 @@
dst.move(0, result);
}
-void EmitState::EmitAll(InsnIterator insn)
+void SpirvEmitter::EmitAll(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
ASSERT(type.componentCount == 1);
@@ -2526,7 +2526,7 @@
dst.move(0, result);
}
-void EmitState::EmitAtomicOp(InsnIterator insn)
+void SpirvEmitter::EmitAtomicOp(InsnIterator insn)
{
auto &resultType = shader.getType(Type::ID(insn.word(1)));
Object::ID resultId = insn.word(2);
@@ -2598,7 +2598,7 @@
dst.move(0, result);
}
-void EmitState::EmitAtomicCompareExchange(InsnIterator insn)
+void SpirvEmitter::EmitAtomicCompareExchange(InsnIterator insn)
{
// Separate from EmitAtomicOp due to different instruction encoding
auto &resultType = shader.getType(Type::ID(insn.word(1)));
@@ -2630,7 +2630,7 @@
dst.move(0, x);
}
-void EmitState::EmitCopyObject(InsnIterator insn)
+void SpirvEmitter::EmitCopyObject(InsnIterator insn)
{
auto src = Operand(shader, *this, insn.word(3));
if(src.isPointer())
@@ -2652,7 +2652,7 @@
}
}
-void EmitState::EmitArrayLength(InsnIterator insn)
+void SpirvEmitter::EmitArrayLength(InsnIterator insn)
{
auto structPtrId = Object::ID(insn.word(3));
auto arrayFieldIdx = insn.word(4);
@@ -2682,7 +2682,7 @@
result.move(0, SIMD::Int(arrayLength));
}
-void EmitState::EmitExtendedInstruction(InsnIterator insn)
+void SpirvEmitter::EmitExtendedInstruction(InsnIterator insn)
{
auto ext = shader.getExtension(insn.word(3));
switch(ext.name)
@@ -2757,11 +2757,11 @@
}
}
-EmitState::Operand::Operand(const SpirvShader &shader, const EmitState &state, Object::ID objectId)
+SpirvEmitter::Operand::Operand(const SpirvShader &shader, const SpirvEmitter &state, Object::ID objectId)
: Operand(state, shader.getObject(objectId))
{}
-EmitState::Operand::Operand(const EmitState &state, const Object &object)
+SpirvEmitter::Operand::Operand(const SpirvEmitter &state, const Object &object)
: constant(object.kind == Object::Kind::Constant ? object.constantValue.data() : nullptr)
, intermediate(object.kind == Object::Kind::Intermediate ? &state.getIntermediate(object.id()) : nullptr)
, pointer(object.kind == Object::Kind::Pointer ? &state.getPointer(object.id()) : nullptr)
@@ -2771,7 +2771,7 @@
ASSERT(intermediate || constant || pointer || sampledImage);
}
-EmitState::Operand::Operand(const Intermediate &value)
+SpirvEmitter::Operand::Operand(const Intermediate &value)
: intermediate(&value)
, componentCount(value.componentCount)
{
diff --git a/src/Pipeline/SpirvShader.hpp b/src/Pipeline/SpirvShader.hpp
index 478e1e7..072b036 100644
--- a/src/Pipeline/SpirvShader.hpp
+++ b/src/Pipeline/SpirvShader.hpp
@@ -981,7 +981,8 @@
static bool IsTerminator(spv::Op opcode);
};
-class EmitState
+// The SpirvEmitter class translates the parsed SPIR-V shader into Reactor code.
+class SpirvEmitter
{
using Type = SpirvShader::Type;
using Object = SpirvShader::Object;
@@ -1006,13 +1007,13 @@
};
private:
- EmitState(const SpirvShader &shader,
- SpirvRoutine *routine,
- SpirvShader::Function::ID entryPoint,
- RValue<SIMD::Int> activeLaneMask,
- RValue<SIMD::Int> storesAndAtomicsMask,
- const vk::DescriptorSet::Bindings &descriptorSets,
- unsigned int multiSampleCount);
+ SpirvEmitter(const SpirvShader &shader,
+ SpirvRoutine *routine,
+ SpirvShader::Function::ID entryPoint,
+ RValue<SIMD::Int> activeLaneMask,
+ RValue<SIMD::Int> storesAndAtomicsMask,
+ const vk::DescriptorSet::Bindings &descriptorSets,
+ unsigned int multiSampleCount);
// Returns the mask describing the active lanes as updated by dynamic
// control flow. Active lanes include helper invocations, used for
@@ -1136,7 +1137,7 @@
struct ImageInstruction : public ImageInstructionSignature
{
- ImageInstruction(InsnIterator insn, const SpirvShader &shader, const EmitState &state);
+ ImageInstruction(InsnIterator insn, const SpirvShader &shader, const SpirvEmitter &state);
const uint32_t position;
@@ -1176,7 +1177,7 @@
class Operand
{
public:
- Operand(const SpirvShader &shader, const EmitState &state, Object::ID objectId);
+ Operand(const SpirvShader &shader, const SpirvEmitter &state, Object::ID objectId);
Operand(const Intermediate &value);
RValue<SIMD::Float> Float(uint32_t i) const
@@ -1240,7 +1241,7 @@
RR_PRINT_ONLY(friend struct rr::PrintValue::Ty<Operand>;)
// Delegate constructor
- Operand(const EmitState &state, const Object &object);
+ Operand(const SpirvEmitter &state, const Object &object);
const uint32_t *constant = nullptr;
const Intermediate *intermediate = nullptr;
diff --git a/src/Pipeline/SpirvShaderArithmetic.cpp b/src/Pipeline/SpirvShaderArithmetic.cpp
index 613b0db..5176837 100644
--- a/src/Pipeline/SpirvShaderArithmetic.cpp
+++ b/src/Pipeline/SpirvShaderArithmetic.cpp
@@ -23,7 +23,7 @@
namespace sw {
-void EmitState::EmitVectorTimesScalar(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitVectorTimesScalar(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -36,7 +36,7 @@
}
}
-void EmitState::EmitState::EmitMatrixTimesVector(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitMatrixTimesVector(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -54,7 +54,7 @@
}
}
-void EmitState::EmitVectorTimesMatrix(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitVectorTimesMatrix(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -72,7 +72,7 @@
}
}
-void EmitState::EmitMatrixTimesMatrix(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitMatrixTimesMatrix(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -97,7 +97,7 @@
}
}
-void EmitState::EmitOuterProduct(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitOuterProduct(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -116,7 +116,7 @@
}
}
-void EmitState::EmitState::EmitTranspose(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitTranspose(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -134,7 +134,7 @@
}
}
-void EmitState::EmitBitcastPointer(SpirvShader::Object::ID resultID, Operand &src)
+void SpirvEmitter::EmitBitcastPointer(SpirvShader::Object::ID resultID, Operand &src)
{
if(src.isPointer()) // Pointer -> Integer bits
{
@@ -174,7 +174,7 @@
}
}
-void EmitState::EmitUnaryOp(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitUnaryOp(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto src = Operand(shader, *this, insn.word(3));
@@ -345,7 +345,7 @@
}
}
-void EmitState::EmitBinaryOp(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitBinaryOp(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -556,7 +556,7 @@
SPIRV_SHADER_DBG("{0}: {1}", insn.word(4), rhs);
}
-void EmitState::EmitDot(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitDot(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
ASSERT(type.componentCount == 1);
@@ -608,7 +608,7 @@
SPIRV_SHADER_DBG("{0}: {1}", insn.word(4), rhs);
}
-SIMD::Float EmitState::FDot(unsigned numComponents, const Operand &x, const Operand &y)
+SIMD::Float SpirvEmitter::FDot(unsigned numComponents, const Operand &x, const Operand &y)
{
SIMD::Float d = x.Float(0) * y.Float(0);
@@ -620,7 +620,7 @@
return d;
}
-SIMD::Int EmitState::SDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
+SIMD::Int SpirvEmitter::SDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
{
SIMD::Int d(0);
@@ -656,7 +656,7 @@
return d;
}
-SIMD::UInt EmitState::UDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
+SIMD::UInt SpirvEmitter::UDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
{
SIMD::UInt d(0);
@@ -692,7 +692,7 @@
return d;
}
-SIMD::Int EmitState::SUDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
+SIMD::Int SpirvEmitter::SUDot(unsigned numComponents, const Operand &x, const Operand &y, const Operand *accum)
{
SIMD::Int d(0);
@@ -728,7 +728,7 @@
return d;
}
-SIMD::Int EmitState::AddSat(RValue<SIMD::Int> a, RValue<SIMD::Int> b)
+SIMD::Int SpirvEmitter::AddSat(RValue<SIMD::Int> a, RValue<SIMD::Int> b)
{
SIMD::Int sum = a + b;
SIMD::Int sSign = sum >> 31;
@@ -745,7 +745,7 @@
(~oob & sum);
}
-SIMD::UInt EmitState::AddSat(RValue<SIMD::UInt> a, RValue<SIMD::UInt> b)
+SIMD::UInt SpirvEmitter::AddSat(RValue<SIMD::UInt> a, RValue<SIMD::UInt> b)
{
SIMD::UInt sum = a + b;
diff --git a/src/Pipeline/SpirvShaderControlFlow.cpp b/src/Pipeline/SpirvShaderControlFlow.cpp
index bfe93ae..63b6b13 100644
--- a/src/Pipeline/SpirvShaderControlFlow.cpp
+++ b/src/Pipeline/SpirvShaderControlFlow.cpp
@@ -195,12 +195,12 @@
return false;
}
-void EmitState::addOutputActiveLaneMaskEdge(Block::ID to, RValue<SIMD::Int> mask)
+void SpirvEmitter::addOutputActiveLaneMaskEdge(Block::ID to, RValue<SIMD::Int> mask)
{
addActiveLaneMaskEdge(block, to, mask & activeLaneMask());
}
-void EmitState::addActiveLaneMaskEdge(Block::ID from, Block::ID to, RValue<SIMD::Int> mask)
+void SpirvEmitter::addActiveLaneMaskEdge(Block::ID from, Block::ID to, RValue<SIMD::Int> mask)
{
auto edge = Block::Edge{ from, to };
auto it = edgeActiveLaneMasks.find(edge);
@@ -216,7 +216,7 @@
}
}
-RValue<SIMD::Int> EmitState::GetActiveLaneMaskEdge(Block::ID from, Block::ID to) const
+RValue<SIMD::Int> SpirvEmitter::GetActiveLaneMaskEdge(Block::ID from, Block::ID to) const
{
auto edge = Block::Edge{ from, to };
auto it = edgeActiveLaneMasks.find(edge);
@@ -224,7 +224,7 @@
return it->second;
}
-void EmitState::EmitBlocks(Block::ID id, Block::ID ignore /* = 0 */)
+void SpirvEmitter::EmitBlocks(Block::ID id, Block::ID ignore /* = 0 */)
{
auto oldPending = this->pending;
auto &function = shader.getFunction(this->function);
@@ -284,7 +284,7 @@
this->pending = oldPending;
}
-void EmitState::EmitNonLoop()
+void SpirvEmitter::EmitNonLoop()
{
auto &function = shader.getFunction(this->function);
auto blockId = block;
@@ -322,7 +322,7 @@
SPIRV_SHADER_DBG("Block {0} done", blockId);
}
-void EmitState::EmitLoop()
+void SpirvEmitter::EmitLoop()
{
auto &function = shader.getFunction(this->function);
auto blockId = block;
@@ -494,13 +494,13 @@
}
}
-void EmitState::EmitBranch(InsnIterator insn)
+void SpirvEmitter::EmitBranch(InsnIterator insn)
{
auto target = Block::ID(insn.word(1));
addActiveLaneMaskEdge(block, target, activeLaneMask());
}
-void EmitState::EmitBranchConditional(InsnIterator insn)
+void SpirvEmitter::EmitBranchConditional(InsnIterator insn)
{
auto &function = shader.getFunction(this->function);
auto block = function.getBlock(this->block);
@@ -519,7 +519,7 @@
addOutputActiveLaneMaskEdge(falseBlockId, ~cond.Int(0));
}
-void EmitState::EmitSwitch(InsnIterator insn)
+void SpirvEmitter::EmitSwitch(InsnIterator insn)
{
auto &function = shader.getFunction(this->function);
auto block = function.getBlock(this->block);
@@ -556,38 +556,38 @@
addOutputActiveLaneMaskEdge(defaultBlockId, defaultLaneMask);
}
-void EmitState::EmitUnreachable(InsnIterator insn)
+void SpirvEmitter::EmitUnreachable(InsnIterator insn)
{
// TODO: Log something in this case?
SetActiveLaneMask(SIMD::Int(0));
}
-void EmitState::EmitReturn(InsnIterator insn)
+void SpirvEmitter::EmitReturn(InsnIterator insn)
{
SetActiveLaneMask(SIMD::Int(0));
}
-void EmitState::EmitTerminateInvocation(InsnIterator insn)
+void SpirvEmitter::EmitTerminateInvocation(InsnIterator insn)
{
routine->discardMask |= SignMask(activeLaneMask());
SetActiveLaneMask(SIMD::Int(0));
}
-void EmitState::EmitDemoteToHelperInvocation(InsnIterator insn)
+void SpirvEmitter::EmitDemoteToHelperInvocation(InsnIterator insn)
{
routine->helperInvocation |= activeLaneMask();
routine->discardMask |= SignMask(activeLaneMask());
SetStoresAndAtomicsMask(storesAndAtomicsMask() & ~activeLaneMask());
}
-void EmitState::EmitIsHelperInvocation(InsnIterator insn)
+void SpirvEmitter::EmitIsHelperInvocation(InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
dst.move(0, routine->helperInvocation);
}
-void EmitState::EmitFunctionCall(InsnIterator insn)
+void SpirvEmitter::EmitFunctionCall(InsnIterator insn)
{
auto functionId = SpirvShader::Function::ID(insn.word(3));
const auto &functionIt = shader.functions.find(functionId);
@@ -623,7 +623,7 @@
}
}
-void EmitState::EmitControlBarrier(InsnIterator insn)
+void SpirvEmitter::EmitControlBarrier(InsnIterator insn)
{
auto executionScope = spv::Scope(shader.GetConstScalarInt(insn.word(1)));
auto semantics = spv::MemorySemanticsMask(shader.GetConstScalarInt(insn.word(3)));
@@ -645,7 +645,7 @@
}
}
-void EmitState::EmitPhi(InsnIterator insn)
+void SpirvEmitter::EmitPhi(InsnIterator insn)
{
auto &function = shader.getFunction(this->function);
auto currentBlock = function.getBlock(block);
@@ -661,7 +661,7 @@
LoadPhi(insn);
}
-void EmitState::LoadPhi(InsnIterator insn)
+void SpirvEmitter::LoadPhi(InsnIterator insn)
{
auto typeId = Type::ID(insn.word(1));
auto type = shader.getType(typeId);
@@ -680,7 +680,7 @@
}
}
-void EmitState::StorePhi(Block::ID currentBlock, InsnIterator insn, const std::unordered_set<Block::ID> &filter)
+void SpirvEmitter::StorePhi(Block::ID currentBlock, InsnIterator insn, const std::unordered_set<Block::ID> &filter)
{
auto typeId = Type::ID(insn.word(1));
auto type = shader.getType(typeId);
@@ -717,17 +717,17 @@
}
}
-void EmitState::Yield(YieldResult res) const
+void SpirvEmitter::Yield(YieldResult res) const
{
rr::Yield(RValue<Int>(int(res)));
}
-void EmitState::SetActiveLaneMask(RValue<SIMD::Int> mask)
+void SpirvEmitter::SetActiveLaneMask(RValue<SIMD::Int> mask)
{
activeLaneMaskValue = mask.value();
}
-void EmitState::SetStoresAndAtomicsMask(RValue<SIMD::Int> mask)
+void SpirvEmitter::SetStoresAndAtomicsMask(RValue<SIMD::Int> mask)
{
storesAndAtomicsMaskValue = mask.value();
}
diff --git a/src/Pipeline/SpirvShaderDebug.hpp b/src/Pipeline/SpirvShaderDebug.hpp
index 78d4eaa..b8eecd8 100644
--- a/src/Pipeline/SpirvShaderDebug.hpp
+++ b/src/Pipeline/SpirvShaderDebug.hpp
@@ -129,14 +129,14 @@
};
template<>
-struct PrintValue::Ty<sw::EmitState::Operand>
+struct PrintValue::Ty<sw::SpirvEmitter::Operand>
{
- static inline std::string fmt(const sw::EmitState::Operand &v)
+ static inline std::string fmt(const sw::SpirvEmitter::Operand &v)
{
return (v.intermediate != nullptr) ? PrintValue::Ty<sw::Intermediate>::fmt(*v.intermediate) : PrintValue::Ty<sw::SIMD::UInt>::fmt(v.UInt(0));
}
- static inline std::vector<Value *> val(const sw::EmitState::Operand &v)
+ static inline std::vector<Value *> val(const sw::SpirvEmitter::Operand &v)
{
return (v.intermediate != nullptr) ? PrintValue::Ty<sw::Intermediate>::val(*v.intermediate) : PrintValue::Ty<sw::SIMD::UInt>::val(v.UInt(0));
}
diff --git a/src/Pipeline/SpirvShaderGLSLstd450.cpp b/src/Pipeline/SpirvShaderGLSLstd450.cpp
index 3c70888..87a2522 100644
--- a/src/Pipeline/SpirvShaderGLSLstd450.cpp
+++ b/src/Pipeline/SpirvShaderGLSLstd450.cpp
@@ -25,7 +25,7 @@
static constexpr float PI = 3.141592653589793f;
-void EmitState::EmitExtGLSLstd450(SpirvShader::InsnIterator insn)
+void SpirvEmitter::EmitExtGLSLstd450(SpirvShader::InsnIterator insn)
{
auto &type = shader.getType(insn.resultTypeId());
auto &dst = createIntermediate(insn.resultId(), type.componentCount);
@@ -976,8 +976,8 @@
return interpolant;
}
-SIMD::Float EmitState::EmitInterpolate(const SIMD::Pointer &ptr, int32_t location, SpirvShader::Object::ID paramId,
- uint32_t component, InterpolationType type) const
+SIMD::Float SpirvEmitter::EmitInterpolate(const SIMD::Pointer &ptr, int32_t location, SpirvShader::Object::ID paramId,
+ uint32_t component, InterpolationType type) const
{
uint32_t interpolant = (location * 4);
uint32_t components_per_row = shader.GetNumInputComponents(location);
diff --git a/src/Pipeline/SpirvShaderGroup.cpp b/src/Pipeline/SpirvShaderGroup.cpp
index 64bc5e4..c06d8a6 100644
--- a/src/Pipeline/SpirvShaderGroup.cpp
+++ b/src/Pipeline/SpirvShaderGroup.cpp
@@ -64,7 +64,7 @@
}
}
-void EmitState::EmitGroupNonUniform(InsnIterator insn)
+void SpirvEmitter::EmitGroupNonUniform(InsnIterator insn)
{
ASSERT(SIMD::Width == 4); // EmitGroupNonUniform makes many assumptions that the SIMD vector width is 4
diff --git a/src/Pipeline/SpirvShaderImage.cpp b/src/Pipeline/SpirvShaderImage.cpp
index 5b64307..1292b9b 100644
--- a/src/Pipeline/SpirvShaderImage.cpp
+++ b/src/Pipeline/SpirvShaderImage.cpp
@@ -74,7 +74,7 @@
}
}
-EmitState::ImageInstruction::ImageInstruction(InsnIterator insn, const SpirvShader &shader, const EmitState &state)
+SpirvEmitter::ImageInstruction::ImageInstruction(InsnIterator insn, const SpirvShader &shader, const SpirvEmitter &state)
: ImageInstructionSignature(parseVariantAndMethod(insn))
, position(insn.distanceFrom(shader.begin()))
{
@@ -254,7 +254,7 @@
}
}
-EmitState::ImageInstructionSignature EmitState::ImageInstruction::parseVariantAndMethod(InsnIterator insn)
+SpirvEmitter::ImageInstructionSignature SpirvEmitter::ImageInstruction::parseVariantAndMethod(InsnIterator insn)
{
uint32_t imageOperands = getImageOperandsMask(insn);
bool bias = imageOperands & spv::ImageOperandsBiasMask;
@@ -285,7 +285,7 @@
}
// Returns the instruction word index at which the Image Operands mask is located, or 0 if not present.
-uint32_t EmitState::ImageInstruction::getImageOperandsIndex(InsnIterator insn)
+uint32_t SpirvEmitter::ImageInstruction::getImageOperandsIndex(InsnIterator insn)
{
switch(insn.opcode())
{
@@ -323,13 +323,13 @@
}
}
-uint32_t EmitState::ImageInstruction::getImageOperandsMask(InsnIterator insn)
+uint32_t SpirvEmitter::ImageInstruction::getImageOperandsMask(InsnIterator insn)
{
uint32_t operandsIndex = getImageOperandsIndex(insn);
return (operandsIndex != 0) ? insn.word(operandsIndex) : 0;
}
-void EmitState::EmitImageSample(const ImageInstruction &instruction)
+void SpirvEmitter::EmitImageSample(const ImageInstruction &instruction)
{
auto &resultType = shader.getType(instruction.resultTypeId);
auto &result = createIntermediate(instruction.resultId, resultType.componentCount);
@@ -346,7 +346,7 @@
for(auto i = 0u; i < resultType.componentCount; i++) { result.move(i, out[i]); }
}
-void EmitState::EmitImageSampleUnconditional(Array<SIMD::Float> &out, const ImageInstruction &instruction) const
+void SpirvEmitter::EmitImageSampleUnconditional(Array<SIMD::Float> &out, const ImageInstruction &instruction) const
{
auto decorations = shader.GetDecorationsForId(instruction.imageId);
@@ -385,17 +385,17 @@
}
}
-Pointer<Byte> EmitState::getSamplerDescriptor(Pointer<Byte> imageDescriptor, const ImageInstruction &instruction) const
+Pointer<Byte> SpirvEmitter::getSamplerDescriptor(Pointer<Byte> imageDescriptor, const ImageInstruction &instruction) const
{
return ((instruction.samplerId == instruction.imageId) || (instruction.samplerId == 0)) ? imageDescriptor : getImage(instruction.samplerId).getUniformPointer();
}
-Pointer<Byte> EmitState::getSamplerDescriptor(Pointer<Byte> imageDescriptor, const ImageInstruction &instruction, int laneIdx) const
+Pointer<Byte> SpirvEmitter::getSamplerDescriptor(Pointer<Byte> imageDescriptor, const ImageInstruction &instruction, int laneIdx) const
{
return ((instruction.samplerId == instruction.imageId) || (instruction.samplerId == 0)) ? imageDescriptor : getImage(instruction.samplerId).getPointerForLane(laneIdx);
}
-Pointer<Byte> EmitState::lookupSamplerFunction(Pointer<Byte> imageDescriptor, Pointer<Byte> samplerDescriptor, const ImageInstruction &instruction) const
+Pointer<Byte> SpirvEmitter::lookupSamplerFunction(Pointer<Byte> imageDescriptor, Pointer<Byte> samplerDescriptor, const ImageInstruction &instruction) const
{
Int samplerId = (instruction.samplerId != 0) ? *Pointer<rr::Int>(samplerDescriptor + OFFSET(vk::SampledImageDescriptor, samplerId)) : Int(0);
@@ -413,7 +413,7 @@
return cache.function;
}
-void EmitState::callSamplerFunction(Pointer<Byte> samplerFunction, Array<SIMD::Float> &out, Pointer<Byte> imageDescriptor, const ImageInstruction &instruction) const
+void SpirvEmitter::callSamplerFunction(Pointer<Byte> samplerFunction, Array<SIMD::Float> &out, Pointer<Byte> imageDescriptor, const ImageInstruction &instruction) const
{
Array<SIMD::Float> in(16); // Maximum 16 input parameter components.
@@ -500,7 +500,7 @@
Call<ImageSampler>(samplerFunction, texture, &in, &out, routine->constants);
}
-void EmitState::EmitImageQuerySizeLod(InsnIterator insn)
+void SpirvEmitter::EmitImageQuerySizeLod(InsnIterator insn)
{
auto &resultTy = shader.getType(insn.resultTypeId());
auto imageId = Object::ID(insn.word(3));
@@ -510,7 +510,7 @@
GetImageDimensions(resultTy, imageId, lodId, dst);
}
-void EmitState::EmitImageQuerySize(InsnIterator insn)
+void SpirvEmitter::EmitImageQuerySize(InsnIterator insn)
{
auto &resultTy = shader.getType(insn.resultTypeId());
auto imageId = Object::ID(insn.word(3));
@@ -520,7 +520,7 @@
GetImageDimensions(resultTy, imageId, lodId, dst);
}
-void EmitState::GetImageDimensions(const Type &resultTy, Object::ID imageId, Object::ID lodId, Intermediate &dst) const
+void SpirvEmitter::GetImageDimensions(const Type &resultTy, Object::ID imageId, Object::ID lodId, Intermediate &dst) const
{
auto &image = shader.getObject(imageId);
auto &imageType = shader.getType(image);
@@ -582,7 +582,7 @@
}
}
-void EmitState::EmitImageQueryLevels(InsnIterator insn)
+void SpirvEmitter::EmitImageQueryLevels(InsnIterator insn)
{
auto &resultTy = shader.getType(insn.resultTypeId());
ASSERT(resultTy.componentCount == 1);
@@ -608,7 +608,7 @@
dst.move(0, SIMD::Int(mipLevels));
}
-void EmitState::EmitImageQuerySamples(InsnIterator insn)
+void SpirvEmitter::EmitImageQuerySamples(InsnIterator insn)
{
auto &resultTy = shader.getType(insn.resultTypeId());
ASSERT(resultTy.componentCount == 1);
@@ -641,7 +641,7 @@
dst.move(0, SIMD::Int(sampleCount));
}
-EmitState::TexelAddressData EmitState::setupTexelAddressData(SIMD::Int rowPitch, SIMD::Int slicePitch, SIMD::Int samplePitch, ImageInstructionSignature instruction, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, const SpirvRoutine *routine)
+SpirvEmitter::TexelAddressData SpirvEmitter::setupTexelAddressData(SIMD::Int rowPitch, SIMD::Int slicePitch, SIMD::Int samplePitch, ImageInstructionSignature instruction, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, const SpirvRoutine *routine)
{
TexelAddressData data;
@@ -701,7 +701,7 @@
return data;
}
-SIMD::Pointer EmitState::GetNonUniformTexelAddress(ImageInstructionSignature instruction, SIMD::Pointer descriptor, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, OutOfBoundsBehavior outOfBoundsBehavior, SIMD::Int activeLaneMask, const SpirvRoutine *routine)
+SIMD::Pointer SpirvEmitter::GetNonUniformTexelAddress(ImageInstructionSignature instruction, SIMD::Pointer descriptor, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, OutOfBoundsBehavior outOfBoundsBehavior, SIMD::Int activeLaneMask, const SpirvRoutine *routine)
{
const bool useStencilAspect = (imageFormat == VK_FORMAT_S8_UINT);
auto rowPitch = (descriptor + (useStencilAspect
@@ -762,7 +762,7 @@
return SIMD::Pointer(imageBase) + texelData.ptrOffset;
}
-SIMD::Pointer EmitState::GetTexelAddress(ImageInstructionSignature instruction, Pointer<Byte> descriptor, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, OutOfBoundsBehavior outOfBoundsBehavior, const SpirvRoutine *routine)
+SIMD::Pointer SpirvEmitter::GetTexelAddress(ImageInstructionSignature instruction, Pointer<Byte> descriptor, SIMD::Int coordinate[], SIMD::Int sample, vk::Format imageFormat, OutOfBoundsBehavior outOfBoundsBehavior, const SpirvRoutine *routine)
{
const bool useStencilAspect = (imageFormat == VK_FORMAT_S8_UINT);
auto rowPitch = SIMD::Int(*Pointer<Int>(descriptor + (useStencilAspect
@@ -820,7 +820,7 @@
return SIMD::Pointer(imageBase, imageSizeInBytes, texelData.ptrOffset);
}
-void EmitState::EmitImageRead(const ImageInstruction &instruction)
+void SpirvEmitter::EmitImageRead(const ImageInstruction &instruction)
{
auto &resultType = shader.getObjectType(instruction.resultId);
auto &image = shader.getObject(instruction.imageId);
@@ -1233,7 +1233,7 @@
}
}
-void EmitState::EmitImageWrite(const ImageInstruction &instruction)
+void SpirvEmitter::EmitImageWrite(const ImageInstruction &instruction)
{
auto &image = shader.getObject(instruction.imageId);
auto &imageType = shader.getType(image);
@@ -1307,7 +1307,7 @@
}
}
-void EmitState::WriteImage(ImageInstructionSignature instruction, Pointer<Byte> descriptor, const Pointer<SIMD::Int> &coord, const Pointer<SIMD::Int> &texelAndMask, vk::Format imageFormat)
+void SpirvEmitter::WriteImage(ImageInstructionSignature instruction, Pointer<Byte> descriptor, const Pointer<SIMD::Int> &coord, const Pointer<SIMD::Int> &texelAndMask, vk::Format imageFormat)
{
SIMD::Int texel[4];
texel[0] = texelAndMask[0];
@@ -1537,7 +1537,7 @@
UNREACHABLE("texelSize: %d", int(texelSize));
}
-void EmitState::EmitImageTexelPointer(const ImageInstruction &instruction)
+void SpirvEmitter::EmitImageTexelPointer(const ImageInstruction &instruction)
{
auto coordinate = Operand(shader, *this, instruction.coordinateId);
@@ -1564,7 +1564,7 @@
createPointer(instruction.resultId, texelPtr);
}
-void EmitState::EmitSampledImage(InsnIterator insn)
+void SpirvEmitter::EmitSampledImage(InsnIterator insn)
{
Object::ID resultId = insn.word(2);
Object::ID imageId = insn.word(3);
@@ -1574,7 +1574,7 @@
createSampledImage(resultId, { getPointer(imageId), samplerId });
}
-void EmitState::EmitImage(InsnIterator insn)
+void SpirvEmitter::EmitImage(InsnIterator insn)
{
Object::ID resultId = insn.word(2);
Object::ID imageId = insn.word(3);
diff --git a/src/Pipeline/SpirvShaderMemory.cpp b/src/Pipeline/SpirvShaderMemory.cpp
index 666afa4..b2c45c0 100644
--- a/src/Pipeline/SpirvShaderMemory.cpp
+++ b/src/Pipeline/SpirvShaderMemory.cpp
@@ -23,7 +23,7 @@
namespace sw {
-void EmitState::EmitLoad(InsnIterator insn)
+void SpirvEmitter::EmitLoad(InsnIterator insn)
{
bool atomic = (insn.opcode() == spv::OpAtomicLoad);
Object::ID resultId = insn.word(2);
@@ -77,7 +77,7 @@
}
}
-void EmitState::EmitStore(InsnIterator insn)
+void SpirvEmitter::EmitStore(InsnIterator insn)
{
bool atomic = (insn.opcode() == spv::OpAtomicStore);
Object::ID pointerId = insn.word(1);
@@ -96,7 +96,7 @@
Store(pointerId, value, atomic, memoryOrder);
}
-void EmitState::Store(Object::ID pointerId, const Operand &value, bool atomic, std::memory_order memoryOrder) const
+void SpirvEmitter::Store(Object::ID pointerId, const Operand &value, bool atomic, std::memory_order memoryOrder) const
{
auto &pointer = shader.getObject(pointerId);
auto &pointerTy = shader.getType(pointer);
@@ -132,7 +132,7 @@
}
}
-void EmitState::EmitVariable(InsnIterator insn)
+void SpirvEmitter::EmitVariable(InsnIterator insn)
{
Object::ID resultId = insn.word(2);
auto &object = shader.getObject(resultId);
@@ -259,7 +259,7 @@
}
}
-void EmitState::EmitCopyMemory(InsnIterator insn)
+void SpirvEmitter::EmitCopyMemory(InsnIterator insn)
{
Object::ID dstPtrId = insn.word(1);
Object::ID srcPtrId = insn.word(2);
@@ -291,7 +291,7 @@
});
}
-void EmitState::EmitMemoryBarrier(InsnIterator insn)
+void SpirvEmitter::EmitMemoryBarrier(InsnIterator insn)
{
auto semantics = spv::MemorySemanticsMask(shader.GetConstScalarInt(insn.word(2)));
// TODO(b/176819536): We probably want to consider the memory scope here.
@@ -393,7 +393,7 @@
}
}
-SIMD::Pointer EmitState::GetPointerToData(Object::ID id, SIMD::Int arrayIndices, bool nonUniform) const
+SIMD::Pointer SpirvEmitter::GetPointerToData(Object::ID id, SIMD::Int arrayIndices, bool nonUniform) const
{
auto &object = shader.getObject(id);
switch(object.kind)
@@ -479,7 +479,7 @@
}
}
-void EmitState::OffsetToElement(SIMD::Pointer &ptr, Object::ID elementId, int32_t arrayStride) const
+void SpirvEmitter::OffsetToElement(SIMD::Pointer &ptr, Object::ID elementId, int32_t arrayStride) const
{
if(elementId != 0 && arrayStride != 0)
{
@@ -497,7 +497,7 @@
}
}
-void EmitState::Fence(spv::MemorySemanticsMask semantics) const
+void SpirvEmitter::Fence(spv::MemorySemanticsMask semantics) const
{
if(semantics != spv::MemorySemanticsMaskNone)
{
@@ -558,7 +558,7 @@
}
}
-sw::SIMD::Pointer EmitState::GetElementPointer(sw::SIMD::Pointer structure, uint32_t offset, spv::StorageClass storageClass)
+sw::SIMD::Pointer SpirvEmitter::GetElementPointer(sw::SIMD::Pointer structure, uint32_t offset, spv::StorageClass storageClass)
{
if(IsStorageInterleavedByLane(storageClass))
{
@@ -575,7 +575,7 @@
}
}
-bool EmitState::IsStorageInterleavedByLane(spv::StorageClass storageClass)
+bool SpirvEmitter::IsStorageInterleavedByLane(spv::StorageClass storageClass)
{
switch(storageClass)
{
diff --git a/src/Pipeline/SpirvShaderSampling.cpp b/src/Pipeline/SpirvShaderSampling.cpp
index 47b0713..5225a79 100644
--- a/src/Pipeline/SpirvShaderSampling.cpp
+++ b/src/Pipeline/SpirvShaderSampling.cpp
@@ -30,7 +30,7 @@
namespace sw {
-EmitState::ImageSampler *EmitState::getImageSampler(const vk::Device *device, uint32_t signature, uint32_t samplerId, uint32_t imageViewId)
+SpirvEmitter::ImageSampler *SpirvEmitter::getImageSampler(const vk::Device *device, uint32_t signature, uint32_t samplerId, uint32_t imageViewId)
{
ImageInstructionSignature instruction(signature);
ASSERT(imageViewId != 0 && (samplerId != 0 || instruction.samplerMethod == Fetch || instruction.samplerMethod == Write));
@@ -125,7 +125,7 @@
return (ImageSampler *)(routine->getEntry());
}
-std::shared_ptr<rr::Routine> EmitState::emitWriteRoutine(ImageInstructionSignature instruction, const Sampler &samplerState)
+std::shared_ptr<rr::Routine> SpirvEmitter::emitWriteRoutine(ImageInstructionSignature instruction, const Sampler &samplerState)
{
// TODO(b/129523279): Hold a separate mutex lock for the sampler being built.
rr::Function<Void(Pointer<Byte>, Pointer<SIMD::Float>, Pointer<SIMD::Float>, Pointer<Byte>)> function;
@@ -141,7 +141,7 @@
return function("sampler");
}
-std::shared_ptr<rr::Routine> EmitState::emitSamplerRoutine(ImageInstructionSignature instruction, const Sampler &samplerState)
+std::shared_ptr<rr::Routine> SpirvEmitter::emitSamplerRoutine(ImageInstructionSignature instruction, const Sampler &samplerState)
{
// TODO(b/129523279): Hold a separate mutex lock for the sampler being built.
rr::Function<Void(Pointer<Byte>, Pointer<SIMD::Float>, Pointer<SIMD::Float>, Pointer<Byte>)> function;
@@ -263,7 +263,7 @@
return function("sampler");
}
-sw::FilterType EmitState::convertFilterMode(const vk::SamplerState *samplerState, VkImageViewType imageViewType, SamplerMethod samplerMethod)
+sw::FilterType SpirvEmitter::convertFilterMode(const vk::SamplerState *samplerState, VkImageViewType imageViewType, SamplerMethod samplerMethod)
{
if(samplerMethod == Gather)
{
@@ -316,7 +316,7 @@
return FILTER_POINT;
}
-sw::MipmapType EmitState::convertMipmapMode(const vk::SamplerState *samplerState)
+sw::MipmapType SpirvEmitter::convertMipmapMode(const vk::SamplerState *samplerState)
{
if(!samplerState)
{
@@ -339,7 +339,7 @@
}
}
-sw::AddressingMode EmitState::convertAddressingMode(int coordinateIndex, const vk::SamplerState *samplerState, VkImageViewType imageViewType)
+sw::AddressingMode SpirvEmitter::convertAddressingMode(int coordinateIndex, const vk::SamplerState *samplerState, VkImageViewType imageViewType)
{
switch(imageViewType)
{
