tree 6c7359234e550187d41b60b2a0d725ebabad41e4
parent f85911d274afbcdf3094664c5e1f53e96f954c7f
author Jean-François Geyelin <jif@google.com> 1686593288 +0200
committer swiftshader-scoped@luci-project-accounts.iam.gserviceaccount.com <swiftshader-scoped@luci-project-accounts.iam.gserviceaccount.com> 1687264898 +0000

Update Reactor/LLVMJIT for RISC-V.

This CL fixes 3 RISC-V issues:
* JIT Linking on RISC-V is only supported with
  ObjectLinkingLayer.
* jitTargetMachineBuilder.getFeatures() on RISC-V does
  not return the RISC-V CPU extensions, so they are
  manually added.
  Note that these CPU extensions will be widely supported.
  Android for instance will require at least RV64GC, where
  the "G" stands for the +m +a +f +d extensions, and the C
  stands for the +c extension.
* setCodeModel needs to be set to Medium on RISC-V.

Bug: b/273278430
Test: succesfully ran graphics tests in risc-v cuttlefish
with swiftshader running in the guest.

Change-Id: I9081be16450b9bd4d2b1e67e5777578fb1a688fc
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/71768
Commit-Queue: Jean-François Geyelin <jif@google.com>
Reviewed-by: Ben Clayton <bclayton@google.com>
Tested-by: Jean-François Geyelin <jif@google.com>